*STB?
Syntax
*STB?
Description
This command queries the condition register for the Status Byte Register group. This command is similar to a Serial Poll but it is processed like any other instrument command. This is a read-only register and the bits are not cleared when you read the register.
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For more information on the SCPI Status System for the Agilent 34980A, see Status System Introduction. |
Remarks
The following table lists the bit definitions for the Status Byte Register.
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Bit Number |
Decimal Value |
Definition |
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0 Module Event Summary |
1 |
One of more bits are set in the Module Event Register (bits must be enabled, see STATus:MODule:ENABle command). |
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1 Alarm Condition |
2 |
One or more bits are set in the Alarm Register (bits must be enabled, see STATus:ALARm:ENABle command). |
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2 Error Queue |
4 |
One or more errors have been stored in the Error Queue. Use the SYSTem:ERRor? command to read and delete errors. |
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3 Questionable Data Summary |
8 |
One or more bits are set in the Questionable Data Register (bits must be enabled, see STATus:QUEStionable:ENABle command). |
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4 Message Available |
16 |
Data is available in the instrument's output buffer. |
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5 Standard Event Summary |
32 |
One or more bits are set in the Standard Event Register (bits must be enabled, see *ESE command). |
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6 Master Summary |
64 |
One or more bits are set in the Status Byte Register and may generate a Request for Service (RQS). Bits must be enabled using the *SRE command. |
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7 Standard Operation Summary |
128 |
One or more bits are set in the Standard Operation Register (bits must be enabled, see STATus:OPERation:ENABle command). |
This command returns the same results as a Serial Poll but the "Master Summary" bit (bit 6) is not cleared if a Serial Poll has occurred.
The Status Byte condition register is cleared when you execute the *CLS (clear status) command.
The Status Byte condition register is cleared when you read the event register from one of the other register groups (only the corresponding bits are cleared in the condition register).
Return Format
The command reads the condition register and returns a decimal value which corresponds to the binary-weighted sum of all bits set in the register (see table above). For example, if bit 1 (decimal value = 2) and bit 4 (decimal value = 16) are set (and the corresponding bits are enabled), this command will return "+18".
Example
The following command reads the condition register (bits 3 and 4 are set).
*STB?
Typical Response: +24