[SENSe:]DIGital:MEMory:CLEar

34980A

[SENSe:]DIGital:MEMory:CLEar

Syntax

[SENSe:]DIGital:MEMory:CLEar (@<ch_list>)

Description

This command clears the memory for buffered input operations on the 34950A Digital I/O Module. You can execute this command while a buffered input operation is in progress. The width of the first channel in each bank (i.e., channels 101 and 201) controls the width of the memory operations (64K x 8 Bits, 64K x 16 Bits, or 32K x 32 Bits). The first channel on the specified bank must be configured as an input prior to starting a buffered read (see CONFigure:DIGital command).

Used With:

  • 34950A Digital I/O Module

Parameters

Name

Type

Range of Values

Default Value

<ch_list>

Numeric

The first channel on a bank in the form (@sccc).
Select from s101 or s201.

This is a required parameter

Remarks

  • Depending on the width specified (see CONFigure:DIGital:WIDTh command), the channel numbering is modified as shown below. For example, if you specify the width as a 16-bit WORD, channels 101 and 102 are combined and addressed collectively as channel 101.  

 

Bank 2

Bank 1

BYTE (8 Bits):

Ch 204

Ch 203

Ch 202

Ch 201

Ch 104

Ch 103

Ch 102

Ch 101

WORD (16 Bits):

Ch 203

Ch 201

Ch 103

Ch 101

LWORd (32 Bits):

Ch 201

Ch 101

Example

The following command clears memory on channels 101 and 201 on the module in slot 3.

DIG:MEM:CLE (@3101,3201)

See Also

CONFigure:DIGital

CONFigure:DIGital:WIDTh

[SENSe:]DIGital:MEMory[:DATA]?