SOURce:DIGital:MEMory:NCYCles
Syntax
SOURce:DIGital:MEMory:NCYCles {<count>|MIN|MAX|DEF|INFinity}, (@<ch_list>)
SOURce:DIGital:MEMory:NCYCles? [{MIN|MAX},] (@<ch_list>)
Description
This command sets the number of times to output the trace pattern for buffered (memory) output operations on the 34950A Digital I/O Module. The specified cycle count can be set at any time, but it will not take effect until the next time you enable memory (see SOURce:DIGital:MEMory:ENABle command), execute the SOURce:DIGital:MEMory:ABORt command, or execute the SOURce:DIGital:MEMory:STARt command.
The width of the first channel in each bank (i.e., channels 101 and 201) controls the width of the memory operations (64K x 8 Bits, 64K x 16 Bits, or 32K x 32 Bits). The first channel on the specified bank must be configured as an output prior to starting a buffered write (see SOURce:DIGital:DATA[:<width>] command) and a trace must be downloaded to memory and assigned to the specified bank (see SOURce:DIGital:MEMory:TRACe command).
Used With:
34950A Digital I/O Module
Parameters
|
Name |
Type |
Range of Values |
Default Value |
|
<count> |
Numeric |
Desired cycle count between 1 and 255. MIN = 1, MAX = 255, INF = continuous |
0 (continuous) |
|
<ch_list> |
Numeric |
The first channel on a bank in the form (@sccc).
|
This is a required parameter |
Remarks
Depending on the width specified (see SOURce:DIGital:DATA[:<width>] command), the channel numbering is modified as shown below. For example, if you specify the width as a 16-bit WORD, channels 101 and 102 are combined and addressed collectively as channel 101.
|
|
Bank 2 |
Bank 1 |
||||||
|
BYTE (8 Bits): |
Ch 204 |
Ch 203 |
Ch 202 |
Ch 201 |
Ch 104 |
Ch 103 |
Ch 102 |
Ch 101 |
|
WORD (16 Bits): |
Ch 203 |
Ch 201 |
Ch 103 |
Ch 101 |
||||
|
LWORd (32 Bits): |
Ch 201 |
Ch 101 |
||||||
If you specify an infinite cycle count (default, INFinity or "0"), the bank will continue to write traces until you stop it (see SOURce:DIGital:MEMory:STOP or SOURce:DIGital:MEMory:ABORt commands).
For a finite cycle count, the bank will automatically stop after outputting the trace the specified number of times.
The selected cycle count is stored in volatile memory and will be set to 0 (continuous) when power is turned off or after a Factory Reset (*RST command).
Return Format
The query command returns the cycle count for each channel specified. Multiple responses are separated by commas. For a continuous count ("0" or INFinity), the query command returns "0".
Examples
The following program segment configures a buffered write on channel 101 on the module in slot 3. The cycle count is set to output the complete trace 50 times.
SOUR:DIG:DATA:WORD
#HFFFF,(@3101) !Set
initial output pattern
SOUR:DIG:MEM:NCYC 50,(@3101) !Output
complete trace 50 times
TRAC:DIG:FUNC (@3101),WONES,PATTERN_1,32 !Download
"walking ones" pattern
SOUR:DIG:MEM:TRAC PATTERN_1,(@3101) !Assign
trace to channel 101
SOUR:DIG:MEM:ENAB ON,(@3101) !Enable
memory on channel 101
SOUR:DIG:MEM:START (@3101) !Trigger
memory output
The following query returns the cycle count on channel 101 on the module in slot 3.
SOUR:DIG:MEM:NCYC? (@3101)
Typical Response: 50
See Also
SOURce:DIGital:MEMory:ABORt
SOURce:DIGital:MEMory:TRACe