documentation.HELP! NI Digital Waveform Generator/Analyzer Documentation

NI Digital Waveform Generator/Analyzer Help

NI Digital Waveform Generator/Analyzer

Table of contents

• NI Digital Waveform Generator/Analyzer Help
  • Conventions
  • Related Documentation
  • Fundamentals
    • Voltage Levels
      • Single-Ended Voltage Levels
      • Differential Voltage Levels
    • Digital Logic
      • Logic Families
        • Single-Ended Logic Families
        • Differential Logic Families
      • Digital Logic States
    • Hysteresis
    • AC Waveform Characteristics
    • Termination
      • Transmission Lines
      • Characteristic Impedance
      • Signal Reflections
      • Types of Termination
    • Crosstalk
    • Understanding I/O Current
      • Sinking and Sourcing Current
      • AC and DC Current
    • Digital Terminology
      • Timing and Triggering
        • Clocks
          • Sample Clock
          • Reference Clock
          • STROBE
        • Triggers
          • Types of Triggers
            • Edge Trigger
            • Level Trigger
            • Pattern-Match Trigger
            • Software Trigger
          • Triggers Summary
        • Events
          • Events Summary
      • Generation
        • Drive Type
          • Active Drive
          • Open Collector
        • Static Generation
        • Dynamic Generation
          • Waveforms
          • Scripts
          • Initial and Idle States
          • Per Cycle Tristate
          • Streaming
            • Direct DMA
      • Acquisition
        • Static Acquisition
        • Dynamic Acquisition
          • Records
      • Hardware Comparison
      • Onboard Memory
        • Generation Onboard Memory
        • Acquisition Onboard Memory
      • Data and Clock Position
        • Data Position Settings
        • Clock Position Settings
        • Data Position Delay Resolution
      • Data Width
      • Data Rate Multiplier
        • Single Data Rate (SDR)
        • Double Data Rate (DDR)
          • Data Position with DDR
          • Generation Considerations for DDR
          • Acquisition Considerations for DDR
      • Channel-to-Channel Skew
  • Devices
    • NI 654x
      • Hardware Architecture
        • Block Diagram
        • Channel Electronics
          • Voltage Ranges and Settings
          • Logic Families
          • Input Impedance
          • Source Impedance
        • Input Protection
        • Signal Routing
          • Signal Routing for PXI Devices
          • Signal Routing for PCI Devices
        • Clocking
          • Clock Sources Summary
          • Exporting a Clock
      • Channel Interface
        • Front Panel and Connector Pinout
        • LED Indicators
      • Acquisition
        • Static Acquisition
        • Dynamic Acquisition
          • Dynamic Acquisition Clock Sources
          • Dynamic Acquisition State Diagram
          • Dynamic Acquisition Timing Diagrams
          • Dynamic Acquisition Triggers and Events
      • Generation
        • Static Generation
        • Dynamic Generation
          • Dynamic Generation Clock Sources
          • Dynamic Generation State Diagram
          • Dynamic Generation Timing Diagrams
          • Dynamic Generation Triggers and Events
    • NI 655x
      • Hardware Architecture
        • Block Diagram
        • Channel Electronics
          • Voltage Ranges and Settings
          • Data Interpretation
          • Logic Families
          • Input Impedance
          • Source Impedance
        • Input Protection
        • Signal Routing
          • Signal Routing for PXI Devices
          • Signal Routing for PCI Devices
        • Clocking
          • Clock Sources Summary
          • Exporting a Clock
      • Channel Interface
        • Front Panel and Connector Pinout
        • LED Indicators
      • Acquisition
        • Static Acquisition
        • Dynamic Acquisition
          • Dynamic Acquisition Clock Sources
          • Dynamic Acquisition State Diagram
          • Dynamic Acquisition Timing Diagrams
          • Dynamic Acquisition Triggers and Events
      • Generation
        • Static Generation
        • Dynamic Generation
          • Dynamic Generation Clock Sources
          • Dynamic Generation State Diagram
          • Dynamic Generation Timing Diagrams
          • Dynamic Generation Triggers and Events
          • Per Cycle Tristate
      • Hardware Comparison
        • Hardware Comparison Triggers and Events
    • NI 656x
      • Hardware Architecture
        • Block Diagram
        • Channel Electronics
          • Voltage Ranges and Settings
          • Logic Families
          • Input Impedance
          • Source Impedance
        • Data Rate Multiplier
        • Input Protection
        • Signal Routing
          • Signal Routing for PXI Devices
          • Signal Routing for PCI Devices
        • Clocking
          • Clock Sources Summary
          • Exporting a Clock
          • Valid Data Delay Ranges
      • Channel Interface
        • Front Panel and Connector Pinout
        • LEDs and Indicators
      • Acquisition
        • Static Acquisition
        • Dynamic Acquisition
          • Dynamic Acquisition Clock Sources
          • Dynamic Acquisition State Diagram
          • Dynamic Acquisition Timing Diagrams
          • Dynamic Acquisition Triggers and Events
      • Generation
        • Static Generation
        • Dynamic Generation
          • Dynamic Generation Clock Sources
          • Dynamic Generation State Diagram
          • Dynamic Generation Timing Diagrams
          • Dynamic Generation Triggers and Events
  • Integration and System Considerations
    • Terminating Your Module
      • Terminating Your NI 654x
        • NI 654x Generation Termination
        • NI 654x Acquisition Termination
        • NI 654x Termination Summary
      • Terminating Your NI 655x
        • NI 655x Generation Termination
        • NI 655x Acquisition Termination
        • NI 655x Termination Summary
      • Terminating Your NI 656x
        • NI 656x Generation Termination
        • NI 656x Acquisition Termination
    • Thermal Shutdown
    • PXI
      • Chassis Considerations
    • PCI
      • RTSI
    • Synchronizing Multiple Devices
  • Programming
    • Getting Started with NI-HSDIO
      • Using NI-HSDIO in LabVIEW
        • Considerations for using the LabVIEW Real-Time Module
      • Using NI-HSDIO in LabWindows/CVI
      • Using NI-HSDIO in Visual C++
      • Digital Waveform Data Representation
        • Digital Waveform Data Representation in LabVIEW
        • Digital Waveform Data Representation in C
        • File I/O and Digital Waveform Data
    • Programming Flow
      • Initialize Your Session
      • Select Channels
      • Configure the Hardware
        • Acquisition Configuration Functions
        • Generation Configuration Functions
        • Advanced Attributes
      • Acquiring or Generating Static Data
        • Reading and Writing Static Data
      • Acquiring Dynamic Data
        • Read
        • Initiate and Fetch
        • Making Multiple-Record Acquisitions
      • Generating Dynamic Data
        • Writing Waveforms to Your Device
        • Generating Data in Single-Waveform Mode
        • Generating Multiple Waveforms/Linking & Looping
          • Common Scripting Use Cases
      • Comparing Response Data with Expected Data
        • Comparing Response Data in Software
        • Comparing Response Data in Hardware
        • Hardware Comparison Functions
      • Using Attributes with NI-HSDIO
      • Closing Your Session
    • Using the NI Digital Waveform Editor
    • Features
      • Configuring Voltage Levels
      • Configuring Generation/Acquisition Frequencies
      • Configuring Data Interpretation
      • Configuring Initial and Idle States
      • Configuring Data Position
      • Configuring Input Impedance
      • Configuring Terminal Configuration
      • Configuring a Data Rate Multiplier
      • Configuring Data Width
      • Configuring Triggers
      • Configuring Events
      • Eliminating Round Trip Delay
    • Reference
      • LabVIEW Reference
        • VIs
          • Dynamic & Static Acquisition VIs
            • niHSDIO Init Acqusition Session
            • niHSDIO Assign Dynamic Channels
            • niHSDIO Configure Sample Clock
            • niHSDIO Configure Acquisition Size
            • niHSDIO Read Waveform
            • niHSDIO Close
            • Acquisition Configuration
              • niHSDIO Configure Trigger
              • niHSDIO Export Signal
              • niHSDIO Configure Voltage
              • niHSDIO Configure Data Interpretation
              • niHSDIO Configure Data Position
              • niHSDIO Configure Data Position Delay
              • Adv Timing
                • niHSDIO Configure Ref Clock
                • niHSDIO Adjust Sample Clock Relative Delay
              • niHSDIO Tristate Channels
            • Advanced Acquisition Control
              • niHSDIO Initiate
              • niHSDIO Abort
              • niHSDIO Wait Until Done
              • niHSDIO Fetch Waveform
              • niHSDIO HWC Fetch Sample Errors (U32)
            • Static Acquisition
              • niHSDIO Assign Static Channels
              • niHSDIO Read Static (U32)
            • Utility
              • niHSDIO Is Done
              • niHSDIO Commit
              • niHSDIO Reset
              • niHSDIO Reset Device
              • niHSDIO Send Software Edge Trigger
              • niHSDIO Error Message
              • niHSDIO Self Test
              • Calibration
                • niHSDIO Self Calibrate
                • niHSDIO Change Ext Cal Password
                • niHSDIO Init Ext Cal
                • niHSDIO Cal Adjust Channel Voltage
                • niHSDIO Close Ext Cal
              • niHSDIO Convert Binary to WDT (U32)
              • niHSDIO Get Session Reference VI
          • Dynamic & Static Generation VIs
            • niHSDIO Init Generation Session
            • niHSDIO Assign Dynamic Channels
            • niHSDIO Configure Sample Clock
            • niHSDIO Write Named Waveform
            • niHSDIO Initiate
            • niHSDIO Wait Until Done
            • niHSDIO Close
            • Generation Configuration
              • niHSDIO Configure Trigger
              • niHSDIO Export Signal
              • niHSDIO Configure Voltage
              • niHSDIO Configure Generation Repeat
              • niHSDIO Configure Initial State
              • niHSDIO Configure Idle State
              • niHSDIO Configure Data Position
              • niHSDIO Configure Data Position Delay
              • Waveform Control
                • niHSDIO Configure Waveform To Generate
                • niHSDIO Allocate Named Waveform
                • niHSDIO Delete Named Waveform
                • niHSDIO Set Named Waveform Next Write Position
              • Scripting
                • niHSDIO Configure Generation Mode
                • niHSDIO Write Script
                • niHSDIO Configure Script To Generate
              • Adv Timing
                • niHSDIO Configure Ref Clock
                • niHSDIO Adjust Sample Clock Relative Delay
              • niHSDIO Tristate Channels
            • Static Generation
              • niHSDIO Assign Static Channels
              • niHSDIO Write Static (U32)
            • niHSDIO Abort
            • Utility
              • niHSDIO Is Done
              • niHSDIO Commit
              • niHSDIO Reset
              • niHSDIO Reset Device
              • niHSDIO Send Software Edge Trigger
              • niHSDIO Error Message
              • niHSDIO Self Test
              • Calibration
                • niHSDIO Self Cal
                • niHSDIO Change Ext Cal Password
                • niHSDIO Init Ext Cal
                • niHSDIO Cal Adjust Channel Voltage
                • niHSDIO Close Ext Cal
              • niHSDIO Convert Binary to WDT
              • niHSDIO Get Session Reference
          • NI-HSDIO Express (Acquisition) VI
          • NI-HSDIO Express (Generation) VI
          • NI-HSDIO Express (Stimulus/Response) VI
        • Properties
          • Active Channels
          • Dynamic Channels
          • Static Channels
          • Voltage Levels
            • Data High
            • Data Low
            • Trigger High
            • Trigger Low
            • Event High
            • Event Low
          • Dynamic Acquisition
            • Samples Per Record
            • Number of Records To Acquire
            • Fetch
              • Fetch Relative To
              • Fetch Offset
              • Fetch Backlog
              • Records Done
            • Input Impedance
            • Data Interpretation
          • Dynamic Generation
            • Initial State
            • Idle State
            • Drive Type
            • Repeat Mode
            • Repeat Count
            • Generation Mode
            • Waveform to Generate
            • Script to Generate
            • Data Transfer
              • Streaming
                • Streaming Enable
                • Streaming Waveform Name
                • Space Available in Streaming Waveform
              • Direct DMA
                • Direct DMA Enable
                • Direct DMA Window Size
                • Direct DMA Window Address
              • Data Transfer Block Size
          • Timing
            • Sample Clock
              • Rate
              • Source
              • Impedance
              • Export
                • Output Terminal
                • Mode
                • Delay
            • Ref Clock
              • Rate
              • Source
              • Impedance
              • Export Output Terminal
            • Onboard Ref Clock
              • Export Output Terminal
            • Data Position
              • Position
              • Delay
            • Advanced
              • Oscillator Phase DAC Value
              • Exported Sample Clock Offset
          • Triggers
            • Start
              • Type
              • Digital Edge
                • Source
                • Edge
                • Position
                • Terminal Configuration
                • Impedance
              • Pattern Match
                • Pattern
                • Pattern When
              • Export
                • Output Terminal
                • Terminal Configuration
            • Reference
              • Type
              • Pretrigger Samples Per Record
              • Digital Edge
                • Edge
                • Source
                • Position
                • Terminal Configuration
                • Impedance
              • Pattern Match
                • Pattern
                • Trigger When
              • Export
                • Output Terminal
                • Terminal Configuration
              • Advanced
                • Start to Reference Trigger Holdoff
                • Reference to Reference Trigger Holdoff
            • Advance
              • Type
              • Digital Edge
                • Source
                • Edge
                • Position
                • Terminal Configuration
                • Impedance
              • Pattern Match
                • Pattern
                • Trigger When
              • Export
                • Output Terminal
                • Terminal Configuration
            • Script
              • Type
              • Digital Edge
                • Source
                • Edge
                • Terminal Configuration
                • Impedance
              • Digital Level
                • Source
                • Trigger When
                • Terminal Configuration
                • Impedance
              • Export
                • Output Terminal
                • Terminal Configuration
            • Pause
              • Type
              • Digital Level
                • Source
                • Trigger When
                • Position
                • Terminal Configuration
                • Impedance
              • Pattern Match
                • Pattern
                • Trigger When
              • Export
                • Output Terminal
                • Terminal Configuration
          • Events
            • Ready for Start
              • Output Terminal
              • Active Level
              • Terminal Configuration
            • Ready for Advance
              • Output Terminal
              • Active Level
              • Terminal Configuration
            • End of Record
              • Output Terminal
              • Pulse Polarity
              • Terminal Configuration
            • Data Active
              • Output Terminal
              • Active Level
              • Position
              • Terminal Configuration
            • Marker
              • Output Terminal
              • Pulse Polarity
              • Position
              • Terminal Configuration
            • Sample Error Output Terminal
          • Device Characteristics
            • Total Acquisition Memory Size
            • Total Generation Memory Size
            • Serial Number
            • Resource Descriptor
          • Advanced
            • Data Width
            • Data Rate Multiplier
            • Data Active Internal Route Delay
            • Hardware Compare
              • Hardware Compare Mode
              • Sample Error Backlog
              • Number Of Sample Errors
              • Samples Compared
              • Filter Repeated Sample Errors
              • Samples Error Buffer Overflowed
        • Alphabetical Property List and Default Values
      • C/C++ Reference
        • Functions
          • niHSDIO_InitAcquisitionSession
          • niHSDIO_InitGenerationSession
          • niHSDIO_close
          • Voltage
            • niHSDIO_ConfigureDataVoltageLogicFamily
            • niHSDIO_ConfigureDataVoltageCustomLevels
            • niHSDIO_ConfigureTriggerVoltageLogicFamily
            • niHSDIO_ConfigureTriggerVoltageCustomLevels
            • niHSDIO_ConfigureEventVoltageLogicFamily
            • niHSDIO_ConfigureEventVoltageCustomLevels
          • Dynamic I/O
            • niHSDIO_AssignDynamicChannels
            • niHSDIO_Initiate
            • niHSDIO_WaitUntilDone
            • niHSDIO_Abort
            • Dynamic Acquisition
              • niHSDIO_ConfigureAcquisitionSize
              • niHSDIO_ConfigureDataInterpretation
              • niHSDIO_ReadWaveformU32
              • niHSDIO_FetchWaveformU32
              • niHSDIO_ReadWaveformU16
              • niHSDIO_FetchWaveformU16
              • niHSDIO_ReadWaveformU8
              • niHSDIO_FetchWaveformU8
              • niHSDIO_FetchWaveformDirectDMA
              • niHSDIO_ReadMultiRecordU32
              • niHSDIO_FetchMultiRecordU32
              • niHSDIO_ReadMultiRecordU16
              • niHSDIO_ReadMultiRecordU8
              • niHSDIO_FetchMultiRecordU16
              • niHSDIO_FetchMultiRecordU8
              • niHSDIO_HWC_FetchSampleErrors
            • Dynamic Generation
              • niHSDIO_WriteNamedWaveformU32
              • niHSDIO_WriteNamedWaveformU16
              • niHSDIO_WriteNamedWaveformU8
              • niHSDIO_WriteNamedWaveformWDT
              • niHSDIO_WriteNamedWaveformFromFileHWS
              • Initial/Idle States
                • niHSDIO_ConfigureIdleState
                • niHSDIO_ConfigureIdleStateU32
                • niHSDIO_ConfigureInitialState
                • niHSDIO_ConfigureInitialStateU32
              • Waveform Control
                • niHSDIO_ConfigureGenerationRepeat
                • niHSDIO_ConfigureWaveformToGenerate
                • niHSDIO_AllocateNamedWaveform
                • niHSDIO_SetNamedWaveformNextWritePosition
                • niHSDIO_DeleteNamedWaveform
              • Scripting
                • niHSDIO_ConfigureGenerationMode
                • niHSDIO_WriteScript
                • niHSDIO_ConfigureScriptToGenerate
            • Timing and Triggering
              • Timing
                • niHSDIO_ConfigureSampleClock
                • niHSDIO_ConfigureDataPosition
                • niHSDIO_ConfigureDataPositionDelay
                • Advanced
                  • niHSDIO_ConfigureRefClock
                  • niHSDIO_AdjustSampleClockRelativeDelay
              • Triggers
                • Start Trigger
                  • niHSDIO_ConfigureDigitalEdgeStartTrigger
                  • niHSDIO_ConfigurePatternMatchStartTrigger
                  • niHSDIO_ConfigurePatternMatchStartTriggerU32
                  • niHSDIO_ConfigureSoftwareStartTrigger
                  • niHSDIO_DisableStartTrigger
                • Reference Trigger
                  • niHSDIO_ConfigureDigitalEdgeRefTrigger
                  • niHSDIO_ConfigurePatternMatchRefTrigger
                  • niHSDIO_ConfigurePatternMatchRefTriggerU32
                  • niHSDIO_ConfigureSoftwareRefTrigger
                  • niHSDIO_DisableRefTrigger
                • Advance Trigger
                  • niHSDIO_ConfigureDigitalEdgeAdvanceTrigger
                  • niHSDIO_ConfigurePatternMatchAdvanceTrigger
                  • niHSDIO_ConfigurePatternMatchAdvanceTriggerU32
                  • niHSDIO_ConfigureSoftwareAdvanceTrigger
                  • niHSDIO_DisableAdvanceTrigger
                • Pause Trigger
                  • niHSDIO_ConfigureDigitalLevelPauseTrigger
                  • niHSDIO_ConfigurePatternMatchPauseTrigger
                  • niHSDIO_ConfigurePatternMatchPauseTriggerU32
                  • niHSDIO_DisablePauseTrigger
                • Script Trigger
                  • niHSDIO_ConfigureDigitalEdgeScriptTrigger
                  • niHSDIO_ConfigureDigitalLevelScriptTrigger
                  • niHSDIO_ConfigureSoftwareScriptTrigger
                  • niHSDIO_DisableScriptTrigger
                • niHSDIO_SendSoftwareEdgeTrigger
              • Events
                • niHSDIO_ExportSignal
          • Static I/O
            • niHSDIO_AssignStaticChannels
            • niHSDIO_ReadStaticU32
            • niHSDIO_WriteStaticU32
          • Calibration
            • niHSDIO_SelfCal
            • niHSDIO_ChangeExtCalPassword
            • niHSDIO_InitExtCal
            • niHSDIO_CalAdjustChannelVoltage
            • niHSDIO_CloseExtCal
          • Utility
            • Device Control
              • niHSDIO_TristateChannels
              • niHSDIO_CommitDynamic
              • niHSDIO_CommitStatic
              • niHSDIO_reset
              • niHSDIO_ResetDevice
            • Error Handling
              • niHSDIO_ClearError
              • niHSDIO_error_message
              • niHSDIO_GetError
            • niHSDIO_IsDone
            • Locking
              • niHSDIO_LockSession
              • niHSDIO_UnlockSession
            • niHSDIO_self_test
            • Set/Get Attribute
              • Get Attribute
                • niHSDIO_GetAttributeViBoolean
                • niHSDIO_GetAttributeViInt32
                • niHSDIO_GetAttributeViReal64
                • niHSDIO_GetAttributeViSession
                • niHSDIO_GetAttributeViString
              • Set Attribute
                • niHSDIO_SetAttributeViBoolean
                • niHSDIO_SetAttributeViInt32
                • niHSDIO_SetAttributeViReal64
                • niHSDIO_SetAttributeViSession
                • niHSDIO_SetAttributeViString
        • Attributes
          • NIHSDIO_ATTR_DYNAMIC_CHANNELS
          • NIHSDIO_ATTR_STATIC_CHANNELS
          • Voltage Levels
            • NIHSDIO_ATTR_DATA_VOLTAGE_HIGH_LEVEL
            • NIHSDIO_ATTR_DATA_VOLTAGE_LOW_LEVEL
            • NIHSDIO_ATTR_EVENT_VOLTAGE_HIGH_LEVEL
            • NIHSDIO_ATTR_EVENT_VOLTAGE_LOW_LEVEL
            • NIHSDIO_ATTR_TRIGGER_VOLTAGE_LOW_LEVEL
            • NIHSDIO_ATTR_TRIGGER_VOLTAGE_HIGH_LEVEL
          • Dynamic Acquisition
            • NIHSDIO_ATTR_SAMPLES_PER_RECORD
            • NIHSDIO_ATTR_INPUT_IMPEDANCE
            • NIHSDIO_ATTR_DATA_INTERPRETATION
            • NIHSDIO_ATTR_FETCH_BACKLOG
            • NIHSDIO_ATTR_FETCH_RELATIVE_TO
            • NIHSDIO_ATTR_FETCH_OFFSET
            • NIHSDIO_ATTR_RECORDS_DONE
            • NIHSDIO_ATTR_NUM_RECORDS
          • Dynamic Generation
            • NIHSDIO_ATTR_INITIAL_STATE
            • NIHSDIO_ATTR_IDLE_STATE
            • NIHSDIO_ATTR_DRIVE_TYPE
            • NIHSDIO_ATTR_REPEAT_MODE
            • NIHSDIO_ATTR_REPEAT_COUNT
            • NIHSDIO_ATTR_GENERATION_MODE
            • NIHSDIO_ATTR_WAVEFORM_TO_GENERATE
            • NIHSDIO_ATTR_SCRIPT_TO_GENERATE
            • Data Transfer
              • Streaming
                • NIHSDIO_ATTR_STREAMING_ENABLED
                • NIHSDIO_ATTR_STREAMING_WAVEFORM_NAME
                • NIHSDIO_ATTR_SPACE_AVAILABLE_IN_STREAMING_WAVEFORM
              • Direct DMA
                • NIHSDIO_ATTR_DIRECT_DMA_ENABLED
                • NIHSDIO_ATTR_DIRECT_DMA_WINDOW_SIZE
                • NIHSDIO_ATTR_DIRECT_DMA_WINDOW_ADDRESS
              • NIHSDIO_ATTR_DATA_TRANSFER_BLOCK_SIZE
          • Timing
            • Sample Clock
              • NIHSDIO_ATTR_SAMPLE_CLOCK_RATE
              • NIHSDIO_ATTR_SAMPLE_CLOCK_SOURCE
              • NIHSDIO_ATTR_SAMPLE_CLOCK_IMPEDANCE
              • NIHSDIO_ATTR_EXPORTED_SAMPLE_CLOCK_OUTPUT_TERMINAL
              • NIHSDIO_ATTR_EXPORTED_SAMPLE_CLOCK_MODE
              • NIHSDIO_ATTR_EXPORTED_SAMPLE_CLOCK_DELAY
            • Ref Clock
              • NIHSDIO_ATTR_REF_CLOCK_RATE
              • NIHSDIO_ATTR_REF_CLOCK_SOURCE
              • NIHSDIO_ATTR_REF_CLOCK_IMPEDANCE
              • NIHSDIO_ATTR_EXPORTED_REF_CLOCK_OUTPUT_TERMINAL
            • Onboard Ref Clock
              • NIHSDIO_ATTR_EXPORTED_ONBOARD_REF_CLOCK_OUTPUT_TERMINAL
            • Data Position
              • NIHSDIO_ATTR_DATA_POSITION
              • NIHSDIO_ATTR_DATA_POSITION_DELAY
            • Advanced
              • NIHSDIO_ATTR_EXPORTED_SAMPLE_CLOCK_OFFSET
              • NIHSDIO_ATTR_OSCILLATOR_PHASE_DAC_VALUE
          • Triggers
            • Start Trigger
              • NIHSDIO_ATTR_START_TRIGGER_TYPE
              • Digital Edge
                • NIHSDIO_ATTR_DIGITAL_EDGE_START_TRIGGER_SOURCE
                • NIHSDIO_ATTR_DIGITAL_EDGE_START_TRIGGER_EDGE
                • NIHSDIO_ATTR_DIGITAL_EDGE_START_TRIGGER_POSITION
                • NIHSDIO_ATTR_DIGITAL_EDGE_START_TRIGGER_IMPEDANCE
                • NIHSDIO_ATTR_DIGITAL_EDGE_START_TRIGGER_TERMINAL_CONFIGURATION
              • Pattern Match
                • NIHSDIO_ATTR_PATTERN_MATCH_START_TRIGGER_PATTERN
                • NIHSDIO_ATTR_PATTERN_MATCH_START_TRIGGER_WHEN
              • Export
                • NIHSDIO_ATTR_EXPORTED_START_TRIGGER_OUTPUT_TERMINAL
                • NIHSDIO_ATTR_EXPORTED_START_TRIGGER_TERMINAL_CONFIGURATION
            • Reference Trigger
              • NIHSDIO_ATTR_REF_TRIGGER_TYPE
              • NIHSDIO_ATTR_REF_TRIGGER_PRETRIGGER_SAMPLES
              • Digital Edge
                • NIHSDIO_ATTR_DIGITAL_EDGE_REF_TRIGGER_SOURCE
                • NIHSDIO_ATTR_DIGITAL_EDGE_REF_TRIGGER_EDGE
                • NIHSDIO_ATTR_DIGITAL_EDGE_REF_TRIGGER_POSITION
                • NIHSDIO_ATTR_DIGITAL_EDGE_REF_TRIGGER_IMPEDANCE
                • NIHSDIO_ATTR_DIGITAL_EDGE_REF_TRIGGER_TERMINAL_CONFIGURATION
              • Pattern Match
                • NIHSDIO_ATTR_PATTERN_MATCH_REF_TRIGGER_PATTERN
                • NIHSDIO_ATTR_PATTERN_MATCH_REF_TRIGGER_WHEN
              • Export
                • NIHSDIO_ATTR_EXPORTED_REF_TRIGGER_OUTPUT_TERMINAL
                • NIHSDIO_ATTR_EXPORTED_REF_TRIGGER_TERMINAL_CONFIGURATION
              • Advanced
                • NIHSDIO_ATTR_START_TO_REF_TRIGGER_HOLDOFF
                • NIHSDIO_ATTR_REF_TO_REF_TRIGGER_HOLDOFF
            • Advance Trigger
              • NIHSDIO_ATTR_ADVANCE_TRIGGER_TYPE
              • Digital Edge
                • NIHSDIO_ATTR_DIGITAL_EDGE_ADVANCE_TRIGGER_SOURCE
                • NIHSDIO_ATTR_DIGITAL_EDGE_ADVANCE_TRIGGER_EDGE
                • NIHSDIO_ATTR_DIGITAL_EDGE_ADVANCE_TRIGGER_POSITION
                • NIHSDIO_ATTR_DIGITAL_EDGE_ADVANCE_TRIGGER_IMPEDANCE
                • NIHSDIO_ATTR_DIGITAL_EDGE_ADVANCE_TRIGGER_TERMINAL_CONFIGURATION
              • Pattern Match
                • NIHSDIO_ATTR_PATTERN_MATCH_ADVANCE_TRIGGER_PATTERN
                • NIHSDIO_ATTR_PATTERN_MATCH_ADVANCE_TRIGGER_WHEN
              • Export
                • NIHSDIO_ATTR_EXPORTED_ADVANCE_TRIGGER_OUTPUT_TERMINAL
                • NIHSDIO_ATTR_EXPORTED_ADVANCE_TRIGGER_TERMINAL_CONFIGURATION
            • Script Trigger
              • NIHSDIO_ATTR_SCRIPT_TRIGGER_TYPE
              • Digital Edge
                • NIHSDIO_ATTR_DIGITAL_EDGE_SCRIPT_TRIGGER_SOURCE
                • NIHSDIO_ATTR_DIGITAL_EDGE_SCRIPT_TRIGGER_EDGE
                • NIHSDIO_ATTR_DIGITAL_EDGE_SCRIPT_TRIGGER_IMPEDANCE
                • NIHSDIO_ATTR_DIGITAL_EDGE_SCRIPT_TRIGGER_TERMINAL_CONFIGURATION
              • Digital Level
                • NIHSDIO_ATTR_DIGITAL_LEVEL_SCRIPT_TRIGGER_SOURCE
                • NIHSDIO_ATTR_DIGITAL_LEVEL_SCRIPT_TRIGGER_WHEN
                • NIHSDIO_ATTR_DIGITAL_LEVEL_SCRIPT_TRIGGER_IMPEDANCE
                • NIHSDIO_ATTR_DIGITAL_LEVEL_SCRIPT_TRIGGER_TERMINAL_CONFIGURATION
              • Export
                • NIHSDIO_ATTR_EXPORTED_SCRIPT_TRIGGER_OUTPUT_TERMINAL
                • NIHSDIO_ATTR_EXPORTED_SCRIPT_TRIGGER_TERMINAL_CONFIGURATION
            • Pause Trigger
              • NIHSDIO_ATTR_PAUSE_TRIGGER_TYPE
              • Digital Level
                • NIHSDIO_ATTR_DIGITAL_LEVEL_PAUSE_TRIGGER_SOURCE
                • NIHSDIO_ATTR_DIGITAL_LEVEL_PAUSE_TRIGGER_WHEN
                • NIHSDIO_ATTR_DIGITAL_LEVEL_PAUSE_TRIGGER_POSITION
                • NIHSDIO_ATTR_DIGITAL_LEVEL_PAUSE_TRIGGER_TERMINAL_CONFIGURATION
                • NIHSDIO_ATTR_DIGITAL_LEVEL_PAUSE_TRIGGER_IMPEDANCE
              • Pattern Match
                • NIHSDIO_ATTR_PATTERN_MATCH_PAUSE_TRIGGER_PATTERN
                • NIHSDIO_ATTR_PATTERN_MATCH_PAUSE_TRIGGER_WHEN
              • Export
                • NIHSDIO_ATTR_EXPORTED_PAUSE_TRIGGER_OUTPUT_TERMINAL
                • NIHSDIO_ATTR_EXPORTED_PAUSE_TRIGGER_TERMINAL_CONFIGURATION
          • Events
            • Ready for Start Event
              • NIHSDIO_ATTR_READY_FOR_START_EVENT_OUTPUT_TERMINAL
              • NIHSDIO_ATTR_READY_FOR_START_EVENT_LEVEL_ACTIVE_LEVEL
              • NIHSDIO_ATTR_READY_FOR_START_EVENT_TERMINAL_CONFIGURATION
            • Ready for Advance Event
              • NIHSDIO_ATTR_READY_FOR_ADVANCE_EVENT_OUTPUT_TERMINAL
              • NIHSDIO_ATTR_READY_FOR_ADVANCE_EVENT_LEVEL_ACTIVE_LEVEL
              • NIHSDIO_ATTR_READY_FOR_ADVANCE_EVENT_TERMINAL_CONFIGURATION
            • End of Record Event
              • NIHSDIO_ATTR_END_OF_RECORD_EVENT_OUTPUT_TERMINAL
              • NIHSDIO_ATTR_END_OF_RECORD_EVENT_PULSE_POLARITY
              • NIHSDIO_ATTR_END_OF_RECORD_EVENT_TERMINAL_CONFIGURATION
            • Data Active Event
              • NIHSDIO_ATTR_DATA_ACTIVE_EVENT_OUTPUT_TERMINAL
              • NIHSDIO_ATTR_DATA_ACTIVE_EVENT_LEVEL_ACTIVE_LEVEL
              • NIHSDIO_ATTR_DATA_ACTIVE_EVENT_POSITION
              • NIHSDIO_ATTR_DATA_ACTIVE_EVENT_TERMINAL_CONFIGURATION
            • Marker Event
              • NIHSDIO_ATTR_MARKER_EVENT_OUTPUT_TERMINAL
              • NIHSDIO_ATTR_MARKER_EVENT_PULSE_POLARITY
              • NIHSDIO_ATTR_MARKER_EVENT_POSITION
              • NIHSDIO_ATTR_MARKER_EVENT_TERMINAL_CONFIGURATION
            • NIHSDIO_ATTR_SAMPLE_ERROR_EVENT_OUTPUT_TERMINAL
          • Device Characteristics
            • NIHSDIO_ATTR_TOTAL_ACQUISITION_MEMORY_SIZE
            • NIHSDIO_ATTR_TOTAL_GENERATION_MEMORY_SIZE
            • NIHSDIO_ATTR_SERIAL_NUMBER
          • Advanced
            • NIHSDIO_ATTR_DATA_WIDTH
            • NIHSDIO_ATTR_DATA_RATE_MULTIPLIER
            • NIHSDIO_ATTR_DATA_ACTIVE_INTERNAL_ROUTE_DELAY
            • Hardware Compare
              • NIHSDIO_ATTR_HWC_HARDWARE_COMPARE_MODE
              • NIHSDIO_ATTR_HWC_SAMPLE_ERROR_BACKLOG
              • NIHSDIO_ATTR_HWC_NUM_SAMPLE_ERRORS
              • NIHSDIO_ATTR_HWC_SAMPLES_COMPARED
              • NIHSDIO_ATTR_HWC_FILTER_REPEATED_SAMPLE_ERRORS
              • NIHSDIO_ATTR_HWC_SAMPLE_ERROR_BUFFER_OVERFLOWED
        • Alphabetical Attribute List and Default Values
      • Return Value
      • Scripting Instructions
        • script/end script
        • generate
        • repeat/end repeat
        • if/else/end if
        • wait
        • clear
  • Operating System Support
  • Glossary
  • Important Information
    • Warranty
    • Copyright
    • Trademarks
    • Patents
    • Warning Regarding Use of NI Products
  • Technical Support and Professional Services

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