Front Panel and Connector Pinout
The NI 655x front panel, shown below, has three SMB jack connectors and one 68-pin Digital Data & Control (DDC) VHDCI connector. The SMB jack connectors are described in the SMB Jack Connector Names and Descriptions table. The DDC connector signals are described in the DDC Connector Names and Descriptions table.
SMB Jack Connector Names and Descriptions
Connector | Signal Name | Signal Type | Signal Description |
---|---|---|---|
CLK IN | Reference/Clock Input | Control | External reference clock used for the PLL or for the external Sample clock used for pattern generation and/or acquisition. |
PFI 0 | Programmable Function Interface (PFI) 0 | Control | Input terminal to the NI 655x for external triggers or the output terminal from the NI 655x for events. |
CLK OUT | Reference/Clock Output | Control | Terminal for the exported PLL Reference clock or the exported Sample clock. |
DDC Connector Names and Descriptions |
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Pins | Signal Name | Signal Type | Signal Description |
33 | DDC CLK OUT | Control | Terminal for the exported Sample clock. |
67 | STROBE | Control | External Sample clock source which can be used for dynamic acquisition. |
13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65 | DIO <0..19> | Data | Bidirectional digital I/O data channels 0 through 19. |
26, 30, 64 | PFI<1..3> | Control | Input terminals to the NI 655x for external triggers or output terminals from the NI 655x for events. |
2, 4, 6, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 54, 56, 58, 62, 66 | GND | Ground | Ground reference for signals. |
1, 3, 5, 7, 8, 9, 11, 35, 37, 39, 41, 43, 45, 52, 60 | RESERVED | N/A | These terminals are reserved for future use. Do not connect to these pins. |