Valid Data Delay Ranges
At frequencies higher than 50 MHz, you can legally configure your data delay as any fractional value from 0 to 1 clock period.
At the 25 to 50 MHz frequency range, however, portions of the Sample clock period do not support the data delay. For frequencies between 25 and 50 MHz, you can legally configure data delay as any value from 0 to 1 Sample clock periods except:
where tp represents the period of the Sample clock.
The following figure compares the legal and illegal settings for delayed data position.
