Per Cycle Tristate

The NI 655x is capable of tristating channels on a per pin, per cycle basis while generating waveforms. In addition to the standard digital states of 0 and 1, the NI 655x digital waveforms also support the Z state, so during each clock cycle (sample) a channel can drive low, drive high, or go to a high-impedance state.

To use this feature, write your waveforms using the digital waveform data type (WDT). For more information about writing digital data using the digital waveform data type, refer to Digital Waveform Data Representation.

The NI 655x stores information about which channels to tristate in a section of onboard memory that is separate from the waveform data. The NI 655x implementation of per pin, per cycle tristate is optimized for memory usage so that each distinct combination of channels to tristate is stored only once in memory. Thus, if a waveform tristates the same combination of channels at various samples throughout the waveform, only one memory location of the tristate memory is used. The tristate memory can store up to 4,095 distinct combinations of channels to tristate.

Note  If the input impedance for a channel is configured for 50 Ω, the channel has a 50 Ω impedance connection to ground. Thus, when the line is set to tristate, this connection pulls the channel to ground instead of placing the channel in a high-impedance state.