Reference Clock
The onboard frequency generator on the NI digital waveform generator/analyzer uses a phase-locked loop (PLL) circuit to lock the high-frequency internal timebase of the device to a known reference frequency. The most common clock to which the NI device is locked is the 10 MHz reference clock signal on the PXI backplane (PXI_CLK10). This clock signal is shared among all modules in the PXI system, so you can lock all the modules in your system to this stable clock.
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Note PXI_CLK10 is only available on NI digital waveform generator/analyzers for the PXI bus. The Onboard Reference clock is a 10 MHZ clock signal that is available for use with NI digital waveform generator/analyzers for the PCI bus. |
You can use the Reference clock only when On Board Clock is selected as the Sample clock source for a dynamic generation or acquisition session.
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