niHSDIO Configure Ref Clock
Configures the Reference clock. Use this VI when you are using the On Board Clock as a Sample clock, and you want the Sample clock to be phase-locked to a reference signal. Phase-locking the Sample clock to a Reference clock prevents the Sample clock from "drifting" relative to the Reference clock.
Refer to Clocks for Digital Waveform Generator/Analyzers for more information about the Reference clock.
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instrument handle identifies your instrument session. instrument handle was obtained from the niHSDIO Init Acquisition Session VI or the niHSDIO Init Generation Session VI. | ||||||
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source specifies the PLL Reference clock source. You can choose None, ClkIn, PXI Clock 10 Line, or RTSI 7.
Set clock source to None if you do not want to phase lock the onboard clock with a Reference clock. |
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clock rate specifies the reference clock rate, expressed in hertz. | ||||||
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error in describes error conditions that occur before this VI or function runs.
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instrument handle out passes a reference to your instrument session to the next VI. instrument handle was obtained from the niHSDIO Init Acquisition Session VI or the niHSDIO Init Generation Session VI. | ||||||
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error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
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