Single-Ended Logic Families
Includes TTL, LVTTL, CMOS, and LVCMOS
Single-ended logic families use standardized single-ended voltage levels to interpret the voltage swing between the voltage driven by the device and ground as either a binary one or a zero.
Examples of the voltage levels for common single-ended logic families are shown in the following table.
| Logic Family | Voltage Range |
|---|---|
| CMOS | 0 to 5 V |
| TTL | 0 to 5 V |
| LVTTL | 0 to 3.3 V |
| LVCMOS | 0 to 3.3 V |
The single-ended logic families for NI digital waveform generator/analyzers are named after the voltage the NI device interprets as a binary 1 when configured for active drive generation. These logic families include 1.8V, 2.5V, 3.3V, and 5.0V.