Timing:Data Position:Position

Short Name: DataPos.Position

Specifies which edge of the Sample clock signal is used to time the acquisition or generation. You can also configure the device to acquire or generate data at a configurable delay past each rising edge of the Sample clock.

Sample clock rising edge (18)	The device samples or generates data on the Sample clock rising edge.
Sample clock falling edge (19)	The device samples or generates data on the Sample clock falling edge.
Delay from sample clock rising edge (20)	The device samples or generates data with a delay from the Sample clock rising edge. Specify the delay using the Data Position Delay property. This choice has more jitter than the rising or falling edge values. Certain devices have Sample clock frequency limitations on when a custom delay can be used. Refer to the device documentation for details. Note  To configure a delay on NI 656x devices,you must delay all channels on the device. NI-HSDIO returns an error if you apply a delay to only a partial channel list.

Remarks

The following table lists the characteristics of this property.

Data Type	ViInt32
Permissions	R/W
Channel Based	Yes