NI 5442
Sample Clock Considerations

The performance of the signal generator that is using the OSP block can be significantly affected by the purity of its Sample clock. Sample clocks with high amounts of jitter or phase noise can create spurs in the signal generator spectrum that are not present when a pure Sample clock is used. If you configure the signal generator for Automatic Clock mode through the Clock Mode property or the NIFGEN_ATTR_CLOCK_MODE attribute, NI-FGEN often selects High-Resolution clocking in order to achieve a specific IQ rate. Because High-Resolution clocking has more jitter than Divide-By-N clocking, extra spurs may occur in the signal generator output spectrum. If you cannot tolerate these spurs, either use a pure external clock as the Sample clock of the signal generator, or use software resampling to change the IQ data to an IQ rate that works with Divide-By-N clocking. If you are resampling, pulse shaping should be done in software and the Filter Type property should be set to Flat or the NIFGEN_ATTR_OSP_FIR_FILTER_TYPE attribute should be set to NIFGEN_VAL_OSP_FLAT.