NI PCI-5412
Block Diagram

This topic contains information about the NI PCI-5412 top-level block diagram and descriptions of the individual blocks.

Legend

The following list describes the individual blocks:

• Onboard Reference clock derives frequencies and sample rates when generating waveforms.
• Onboard Memory stores the waveform data and generation instructions that you load into the device.
• Clocking allows you to create your Sample clock and Reference clock.
• The Waveform Generation Engine retrieves the waveform data and instructions from the Onboard Memory using the Sample clock. The Waveform Generation Engine also uses this clock to retrieve triggers from Trigger and Event Control.
• The output from the Waveform Generation Engine is sent to the DAC device after any digital gain is applied.
• The DAC also contains an selectable Digital Filter, which interpolates and filters the waveform data.
• The waveform data is sent from the DAC to the Analog Output path where the waveform data is amplified.
• The Routing Matrix allows flexible routing of the RTSI trigger lines and the external PFI lines.