NI 5421/5422/5441/5442
External Sample Clock Sources

The NI 5421/5422/5441/5442 can accept an external clock to directly drive the Sample clock. When using an external Sample clock, the frequency stability and accuracy of the Sample clock is determined by the provided external Sample clock.

The following figure shows the possible Sample Clock paths.

You have five options when choosing an external Sample clock to be the source of the Sample clock for the NI 5421/5422/5441/5442: the CLK IN front panel connector, DDC CLK IN on the NI 5421/5422/5441 DIGITAL DATA & CONTROL front panel connector (not available on the NI 5442), the PXI_STAR line or the PXI_Trig<0..6> lines on the PXI trigger bus, or the RTSI<0..6> lines.

Refer to niFgen Configure Sample Clock Source VI or the niFgen_ConfigureSampleClockSource function for more information about setting up the clock source.

The following table is a subset of the table in Sample Clock Sources, and shows the valid NI-FGEN property value combinations that can be used to configure the NI 5412/5421/5422/5441/5442 clock settings for an external Sample clock. The attributes that correspond to these properties are NIFGEN_ATTR_SAMPLE_CLOCK_SOURCE, NIFGEN_ATTR_CLOCK_MODE, and NIFGEN_ATTR_REFERENCE_CLOCK_SOURCE. The valid attribute value combinations will reflect the valid property combinations.

Sample Clock Source	Clock Mode	PLL Reference Clock Source
"ClkIn"	Not Applicable<	Not Applicable
"PXI_STAR"
"PXI_Trig<0..6>"
"DDC_ClkIn"

You should configure the Sample clock rate when using an external Sample clock. Refer to the niFgen Set Sample Rate VI or the niFgen_ConfigureSampleRate function for more information about setting the Sample clock rate.

Note  Refer to the device specifications for the allowable voltages, signal types, and clocks that you can use as an external Sample clock for all external Sample clocks.

External Sample Clock Considerations

The NI 5421/5422/5441/5442 incorporates high-speed digital clocking technology and requires a stable, free-running Sample clock to operate properly. When the NI 5421/5422/5441/5442 is committed—either explicitly by calling the niFgen Commit VI or the niFgen_Commit function or implicitly by writing waveforms or sequences or initiating a generation—the external Sample clock must be available to the device. If the external clock becomes unstable due to glitching, changing frequency, or is removed entirely, NI-FGEN returns a hardware clocking error.

Note  If you are using NI 5441 or the NI 5442 with the OSP block enabled, refer to Sample Clock Considerations for more information about clocking while using onboard signal processing.

If necessary, you can change the rate or the source of the external Sample clock between subsequent generations by first calling the niFgen Abort Generation VI or the niFgen_AbortGeneration function, changing the rate or source, and then calling the niFgen Commit VI or the niFgen_Commit function. NI-FGEN reprograms the NI 5421/5422/5441/5442 for the new settings, and you can call the niFgen Initiate Generation VI or the niFgen_InitiateGeneration function to start the next generation.

If you must remove the external Sample clock between generations (after calling the niFgen Abort Generation VI or niFgen_AbortGeneration function, but before calling the niFgen Initiate VI or the niFgen_Init function), but are not changing the frequency or source of the external clock, you can choose one of the following options:

• Call the niFgen Initiate VI or the niFgen_Init function, which returns a hardware clocking error because the external Sample clock is gone, then clear the error and call the niFgen Initiate VI or the niFgen_Init function again–causing NI-FGEN to reprogram the hardware to use the external clock again.
• Force the device to be recommitted by changing some property or attribute to another value and then back to its original value. This action causes NI-FGEN to re-commit the settings to hardware, which would not happen otherwise because NI-FGEN would not know that the external Sample clock was gone.

Caution  When configuring an external Sample clock, set the sample rate to the exact frequency you are using to avoid data errors. Refer to the niFgen Set Sample Rate VI or the niFgen_ConfigureSampleRate function for more information about configuring the sample rate.