NI 5412 External Sample Clock Sources

NI Signal Generator

NI 5412
External Sample Clock


The NI 5412 can accept an external clock to directly drive the Sample clock. In the case of an external Sample clock, the frequency stability and accuracy of the Sample clock is determined by the provided external Sample clock.


NI 5412 External Sample Clock image


There are three external Sample clock sources for PXI and two external Sample clock sources for PCI to be the Sample clock for the NI 5412: CLK IN on the front panel, the PXI_STAR and PXI_Trig<0..7> lines on the PXI trigger bus, or the RTSI<0..7> (PCI) lines.

Refer to the Configure Sample Clock Source VI or the niFgen_ConfigureSampleClockSource function for more information about setting up the clock source.

The following table is a subset of the table in Sample Clock Sources, and shows the valid NI-FGEN property and attribute values and combinations to configure the NI 5412 clock settings for an external Sample clock.

Sample Clock Source Clock Mode PLL Reference Clock
ClkIn
Not Applicable
Not Applicable
PXI_Star
PXI_Trig<0..7>
RTSI<0..7> (PCI)

You should configure the Sample clock rate when using an external Sample clock. Refer to the niFgen Set Sample Rate VI or niFgen_ConfigureSampleRate function topics for more information about setting the Sample clock rate.

Note  Refer to the module specifications for the allowable voltages, signal types, and clocks that you can use as an external Sample clock for all external Sample clocks.

External Sample Clock Considerations

The NI 5412 incorporates high-speed digital clocking technology, and requires a stable, free-running Sample clock to operate properly. When the NI 5412 is committed—either explicitly by calling niFgen Commit VI or the niFgen_Commit function or implicitly by writing waveforms or sequences or Initiating a generation—the external Sample clock must be available to the device. If the external clock becomes unstable due to glitching, changing frequency, or is removed entirely, NI-FGEN returns a hardware clocking error.

Refer to the NI-FGEN Programming State Model for more information.

If necessary, you can change the rate or the source of the external Sample clock between subsequent generations by first calling the niFgen Abort Generation VI or the niFgen_AbortGeneration function, changing the rate or source, and then calling niFgen_Commit. NI-FGEN re-programs the NI 5412 for the new settings, and you can call the niFgen Initiate Generation VI or niFgen_InitiateGeneration function to start the next generation.

If you must remove the external Sample clock between generations (after niFgen Abort, but before niFgen Initiate), but are not changing the frequency or source of the external clock, you have two options:

  1. Call niFgen Initiate, which returns a hardware clocking error because the external Sample clock is gone, then clear the error and call niFgen Initiate again—causing NI-FGEN to reprogram the hardware to use the external clock again.
  2. Force the device to be re-committed by changing some attribute to another value and then back to its original value. This action causes NI-FGEN to re-commit the settings to hardware, which would not have happened otherwise because NI-FGEN would not have known that the external Sample clock was gone.
Caution  When configuring an external Sample clock, you must set the sample rate to the exact frequency your are using to avoid data errors. Refer to the niFgen Set Sample Rate VI or niFgen_ConfigureSampleRate function topics for more information.