Stray Admittance
For the NI 4072 only, Admittance is the reciprocal of the residual impedance. Stray admittances, which are found in series between the DMM and the DUT, result from the connectivity required between the DMM and the DUT. The stray admittance on the test setup introduces an error on the voltage reading by dividing the excitation current. This error can affect the accuracy of inductance and capacitance measurements, particularly when it is comparable to the admittance of the DUT. The following figure illustrates stray admittance in a typical measurement:
![](loc_eps_stray_admittance.gif)
where
VM = total input voltage measured by the DMM
YP = stray admittance
YX = admittance of the DUT
I = test current
IP = current going through the stray admittance
IX = current going through the DUT
I = IP + IX
VM = I/(YP + YX)
YM = I/VM = YP + YX
![]() |
Note Bold values denote vector quantities or complex numbers. |
For example, in an application with a 10 nF capacitor in parallel with 1 nF of stray capacitance, the meter reads a 10% error, or 11 nF (10 nF + 1 nF).
To reduce stray admittances on test fixture and cables, take the following steps:
- Keep the cables as short as possible.
- Avoid any variations due to mechanical vibrations, handling, and temperature changes.
- Use the compensation techniques available on the NI 4072. Refer to OPEN/SHORT Compensation for more information.
In addition to stray admittance, residual impedance can also be found in test setups. Refer to Residual Impedance for more information.