#define TCP_ETH_RAM_SIZE (3900ul) #define TCP_PIC_RAM_SIZE (0ul) #define TCP_SPI_RAM_SIZE (0ul) #define TCP_SPI_RAM_BASE_ADDRESS (0ul)
The first four macros in the socket section are used to describe the total amount of memory used to contain sockets. When data is sent from a TCP socket, it will first be copied into the socket's transmit FIFO, and then to the MAC/PHY transmit buffer. Similarly, received data will be read from the MAC/PHY chip into the receive FIFO. These FIFOs, as well as the TCB, can be stored in 3 places.
TCP_ETH_RAM_SIZE is used to define the RAM available for sockets on the actual TCP/IP MAC/PHY chip. This will not be the same as the total RAM on the chip; some memory must be reserved for packets being transmitted and received. By default ~1518 bytes (the maximum single-packet transmission size) will be reserved for TX packets on Microchip parts. The amount reserved for the receive packet buffer will equal the amount remaining after allocating the memory for the TX buffer and the memory for the sockets. You may receive a compile-time warning if the RX buffer is unreasonably small.
TCP_PIC_RAM_SIZE is used to define the RAM available for sockets on the PIC microcontroller that's driving your application.
TCP_SPI_RAM_SIZE defines the RAM available for sockets on an external SPI RAM (see External Storage). You can specify the base address in this RAM chip to use with the TCP_SPI_RAM_BASE_ADDRESS macro.