C:/nxpdrv/LPC1700CMSIS/Core/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c File Reference
CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series. More...
#include <stdint.h>
#include "LPC17xx.h"
Go to the source code of this file.
Defines | |
| #define | CLOCK_SETUP 1 |
| #define | SCS_Val 0x00000020 |
| #define | CLKSRCSEL_Val 0x00000001 |
| #define | PLL0_SETUP 1 |
| #define | PLL0CFG_Val 0x00050063 |
| #define | PLL1_SETUP 1 |
| #define | PLL1CFG_Val 0x00000023 |
| #define | CCLKCFG_Val 0x00000003 |
| #define | USBCLKCFG_Val 0x00000000 |
| #define | PCLKSEL0_Val 0x00000000 |
| #define | PCLKSEL1_Val 0x00000000 |
| #define | PCONP_Val 0x042887DE |
| #define | CLKOUTCFG_Val 0x00000000 |
| #define | FLASH_SETUP 1 |
| #define | FLASHCFG_Val 0x0000303A |
| #define | CHECK_RANGE(val, min, max) ((val < min) || (val > max)) |
| #define | CHECK_RSVD(val, mask) (val & mask) |
| #define | XTAL (12000000UL) |
| #define | OSC_CLK ( XTAL) |
| #define | RTC_CLK ( 32000UL) |
| #define | IRC_OSC ( 4000000UL) |
| #define | __M (((PLL0CFG_Val ) & 0x7FFF) + 1) |
| #define | __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1) |
| #define | __FCCO(__F_IN) ((2 * __M * __F_IN) / __N) |
| #define | __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1) |
| #define | __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV) |
Functions | |
| void | SystemCoreClockUpdate (void) |
| Updates the SystemCoreClock with current core Clock retrieved from cpu registers. | |
| void | SystemInit (void) |
| Setup the microcontroller system. Initialize the System. | |
Variables | |
| uint32_t | SystemCoreClock = __CORE_CLK |
Detailed Description
CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series.
- Version:
- V1.03
- Date:
- 07. October 2009
- Note:
- Copyright (C) 2009 ARM Limited. All rights reserved.
- ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
- THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Definition in file system_LPC17xx.c.
Define Documentation
| #define __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1) |
Definition at line 388 of file system_LPC17xx.c.
| #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV) |
Definition at line 393 of file system_LPC17xx.c.
| #define __FCCO | ( | __F_IN | ) | ((2 * __M * __F_IN) / __N) |
Definition at line 387 of file system_LPC17xx.c.
| #define __M (((PLL0CFG_Val ) & 0x7FFF) + 1) |
Definition at line 385 of file system_LPC17xx.c.
| #define __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1) |
Definition at line 386 of file system_LPC17xx.c.
| #define CCLKCFG_Val 0x00000003 |
Definition at line 290 of file system_LPC17xx.c.
| #define CHECK_RANGE | ( | val, | |||
| min, | |||||
| max | ) | ((val < min) || (val > max)) |
Definition at line 321 of file system_LPC17xx.c.
| #define CHECK_RSVD | ( | val, | |||
| mask | ) | (val & mask) |
Definition at line 322 of file system_LPC17xx.c.
| #define CLKOUTCFG_Val 0x00000000 |
Definition at line 295 of file system_LPC17xx.c.
| #define CLKSRCSEL_Val 0x00000001 |
Definition at line 285 of file system_LPC17xx.c.
| #define CLOCK_SETUP 1 |
Definition at line 283 of file system_LPC17xx.c.
| #define FLASH_SETUP 1 |
Definition at line 311 of file system_LPC17xx.c.
| #define FLASHCFG_Val 0x0000303A |
Definition at line 312 of file system_LPC17xx.c.
| #define IRC_OSC ( 4000000UL) |
Definition at line 381 of file system_LPC17xx.c.
| #define OSC_CLK ( XTAL) |
Definition at line 379 of file system_LPC17xx.c.
| #define PCLKSEL0_Val 0x00000000 |
Definition at line 292 of file system_LPC17xx.c.
| #define PCLKSEL1_Val 0x00000000 |
Definition at line 293 of file system_LPC17xx.c.
| #define PCONP_Val 0x042887DE |
Definition at line 294 of file system_LPC17xx.c.
| #define PLL0_SETUP 1 |
Definition at line 286 of file system_LPC17xx.c.
| #define PLL0CFG_Val 0x00050063 |
Definition at line 287 of file system_LPC17xx.c.
| #define PLL1_SETUP 1 |
Definition at line 288 of file system_LPC17xx.c.
| #define PLL1CFG_Val 0x00000023 |
Definition at line 289 of file system_LPC17xx.c.
| #define RTC_CLK ( 32000UL) |
Definition at line 380 of file system_LPC17xx.c.
| #define SCS_Val 0x00000020 |
Definition at line 284 of file system_LPC17xx.c.
| #define USBCLKCFG_Val 0x00000000 |
Definition at line 291 of file system_LPC17xx.c.
| #define XTAL (12000000UL) |
Definition at line 378 of file system_LPC17xx.c.
Function Documentation
| void SystemCoreClockUpdate | ( | void | ) |
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
Update SystemCoreClock variable
- Parameters:
-
none
- Returns:
- none
Definition at line 419 of file system_LPC17xx.c.
| void SystemInit | ( | void | ) |
Setup the microcontroller system. Initialize the System.
Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.
Initialize the system
- Parameters:
-
none
- Returns:
- none
Definition at line 503 of file system_LPC17xx.c.
Variable Documentation
| uint32_t SystemCoreClock = __CORE_CLK |
System Clock Frequency (Core Clock)
Definition at line 413 of file system_LPC17xx.c.
Generated on Mon Feb 8 10:01:38 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by
1.5.9