C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h File Reference
: Contains all macro definitions and function prototypes support for SSP firmware library on LPC17xx More...
#include "LPC17xx.h"
#include "lpc_types.h"
Go to the source code of this file.
Data Structures | |
struct | SSP_CFG_Type |
SSP configuration structure. More... | |
struct | SSP_DATA_SETUP_Type |
SPI Data configuration structure definitions. More... | |
Defines | |
#define | SSP_CR0_DSS(n) ((uint32_t)((n-1)&0xF)) |
#define | SSP_CR0_FRF_SPI ((uint32_t)(0<<4)) |
#define | SSP_CR0_FRF_TI ((uint32_t)(1<<4)) |
#define | SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4)) |
#define | SSP_CR0_CPOL_HI ((uint32_t)(1<<6)) |
#define | SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7)) |
#define | SSP_CR0_SCR(n) ((uint32_t)((n&0xFF)<<8)) |
#define | SSP_CR0_BITMASK ((uint32_t)(0xFFFF)) |
#define | SSP_CR1_LBM_EN ((uint32_t)(1<<0)) |
#define | SSP_CR1_SSP_EN ((uint32_t)(1<<1)) |
#define | SSP_CR1_SLAVE_EN ((uint32_t)(1<<2)) |
#define | SSP_CR1_SO_DISABLE ((uint32_t)(1<<3)) |
#define | SSP_CR1_BITMASK ((uint32_t)(0x0F)) |
#define | SSP_DR_BITMASK(n) ((n)&0xFFFF) |
#define | SSP_SR_TFE ((uint32_t)(1<<0)) |
#define | SSP_SR_TNF ((uint32_t)(1<<1)) |
#define | SSP_SR_RNE ((uint32_t)(1<<2)) |
#define | SSP_SR_RFF ((uint32_t)(1<<3)) |
#define | SSP_SR_BSY ((uint32_t)(1<<4)) |
#define | SSP_SR_BITMASK ((uint32_t)(0x1F)) |
#define | SSP_CPSR_CPDVSR(n) ((uint32_t)(n&0xFF)) |
#define | SSP_CPSR_BITMASK ((uint32_t)(0xFF)) |
#define | SSP_IMSC_ROR ((uint32_t)(1<<0)) |
#define | SSP_IMSC_RT ((uint32_t)(1<<1)) |
#define | SSP_IMSC_RX ((uint32_t)(1<<2)) |
#define | SSP_IMSC_TX ((uint32_t)(1<<3)) |
#define | SSP_IMSC_BITMASK ((uint32_t)(0x0F)) |
#define | SSP_RIS_ROR ((uint32_t)(1<<0)) |
#define | SSP_RIS_RT ((uint32_t)(1<<1)) |
#define | SSP_RIS_RX ((uint32_t)(1<<2)) |
#define | SSP_RIS_TX ((uint32_t)(1<<3)) |
#define | SSP_RIS_BITMASK ((uint32_t)(0x0F)) |
#define | SSP_MIS_ROR ((uint32_t)(1<<0)) |
#define | SSP_MIS_RT ((uint32_t)(1<<1)) |
#define | SSP_MIS_RX ((uint32_t)(1<<2)) |
#define | SSP_MIS_TX ((uint32_t)(1<<3)) |
#define | SSP_MIS_BITMASK ((uint32_t)(0x0F)) |
#define | SSP_ICR_ROR ((uint32_t)(1<<0)) |
#define | SSP_ICR_RT ((uint32_t)(1<<1)) |
#define | SSP_ICR_BITMASK ((uint32_t)(0x03)) |
#define | SSP_DMA_RXDMA_EN ((uint32_t)(1<<0)) |
#define | SSP_DMA_TXDMA_EN ((uint32_t)(1<<1)) |
#define | SSP_DMA_BITMASK ((uint32_t)(0x03)) |
#define | PARAM_SSPx(n) |
#define | SSP_CPHA_FIRST ((uint32_t)(0)) |
#define | SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND |
#define | PARAM_SSP_CPHA(n) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND)) |
#define | SSP_CPOL_HI ((uint32_t)(0)) |
#define | SSP_CPOL_LO SSP_CR0_CPOL_HI |
#define | PARAM_SSP_CPOL(n) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO)) |
#define | SSP_SLAVE_MODE SSP_CR1_SLAVE_EN |
#define | SSP_MASTER_MODE ((uint32_t)(0)) |
#define | PARAM_SSP_MODE(n) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE)) |
#define | SSP_DATABIT_4 SSP_CR0_DSS(4) |
#define | SSP_DATABIT_5 SSP_CR0_DSS(5) |
#define | SSP_DATABIT_6 SSP_CR0_DSS(6) |
#define | SSP_DATABIT_7 SSP_CR0_DSS(7) |
#define | SSP_DATABIT_8 SSP_CR0_DSS(8) |
#define | SSP_DATABIT_9 SSP_CR0_DSS(9) |
#define | SSP_DATABIT_10 SSP_CR0_DSS(10) |
#define | SSP_DATABIT_11 SSP_CR0_DSS(11) |
#define | SSP_DATABIT_12 SSP_CR0_DSS(12) |
#define | SSP_DATABIT_13 SSP_CR0_DSS(13) |
#define | SSP_DATABIT_14 SSP_CR0_DSS(14) |
#define | SSP_DATABIT_15 SSP_CR0_DSS(15) |
#define | SSP_DATABIT_16 SSP_CR0_DSS(16) |
#define | PARAM_SSP_DATABIT(n) |
#define | SSP_FRAME_SPI SSP_CR0_FRF_SPI |
#define | SSP_FRAME_TI SSP_CR0_FRF_TI |
#define | SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE |
#define | PARAM_SSP_FRAME(n) |
#define | SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE |
#define | SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF |
#define | SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE |
#define | SSP_STAT_RXFIFO_FULL SSP_SR_RFF |
#define | SSP_STAT_BUSY SSP_SR_BSY |
#define | PARAM_SSP_STAT(n) |
#define | SSP_INTCFG_ROR SSP_IMSC_ROR |
#define | SSP_INTCFG_RT SSP_IMSC_RT |
#define | SSP_INTCFG_RX SSP_IMSC_RX |
#define | SSP_INTCFG_TX SSP_IMSC_TX |
#define | PARAM_SSP_INTCFG(n) |
#define | SSP_INTSTAT_ROR SSP_MIS_ROR |
#define | SSP_INTSTAT_RT SSP_MIS_RT |
#define | SSP_INTSTAT_RX SSP_MIS_RX |
#define | SSP_INTSTAT_TX SSP_MIS_TX |
#define | PARAM_SSP_INTSTAT(n) |
#define | SSP_INTSTAT_RAW_ROR SSP_RIS_ROR |
#define | SSP_INTSTAT_RAW_RT SSP_RIS_RT |
#define | SSP_INTSTAT_RAW_RX SSP_RIS_RX |
#define | SSP_INTSTAT_RAW_TX SSP_RIS_TX |
#define | PARAM_SSP_INTSTAT_RAW(n) |
#define | SSP_INTCLR_ROR SSP_ICR_ROR |
#define | SSP_INTCLR_RT SSP_ICR_RT |
#define | PARAM_SSP_INTCLR(n) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT)) |
#define | SSP_DMA_TX SSP_DMA_RXDMA_EN |
#define | SSP_DMA_RX SSP_DMA_TXDMA_EN |
#define | PARAM_SSP_DMA(n) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX)) |
#define | SSP_STAT_DONE (1UL<<8) |
#define | SSP_STAT_ERROR (1UL<<9) |
Enumerations | |
enum | SSP_TRANSFER_Type { SSP_TRANSFER_POLLING = 0, SSP_TRANSFER_INTERRUPT } |
SSP Transfer Type definitions. More... | |
Functions | |
void | SSP_SetClock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock) |
Setup clock rate for SSP device. | |
void | SSP_DeInit (LPC_SSP_TypeDef *SSPx) |
De-initializes the SSPx peripheral registers to their default reset values. | |
void | SSP_Init (LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct) |
Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct. | |
void | SSP_ConfigStructInit (SSP_CFG_Type *SSP_InitStruct) |
Fills each SSP_InitStruct member with its default value:
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void | SSP_Cmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState) |
Enable or disable SSP peripheral's operation. | |
void | SSP_LoopBackCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState) |
Enable or disable Loop Back mode function in SSP peripheral. | |
void | SSP_SlaveOutputCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState) |
Enable or disable Slave Output function in SSP peripheral. | |
void | SSP_SendData (LPC_SSP_TypeDef *SSPx, uint16_t Data) |
Transmit a single data through SSPx peripheral. | |
uint16_t | SSP_ReceiveData (LPC_SSP_TypeDef *SSPx) |
Receive a single data from SSPx peripheral. | |
int32_t | SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, SSP_TRANSFER_Type xfType) |
SSP Read write data function. | |
FlagStatus | SSP_GetStatus (LPC_SSP_TypeDef *SSPx, uint32_t FlagType) |
Checks whether the specified SSP status flag is set or not. | |
void | SSP_IntConfig (LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState) |
Enable or disable specified interrupt type in SSP peripheral. | |
IntStatus | SSP_GetRawIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t RawIntType) |
Check whether the specified Raw interrupt status flag is set or not. | |
IntStatus | SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType) |
Check whether the specified interrupt status flag is set or not. | |
void | SSP_ClearIntPending (LPC_SSP_TypeDef *SSPx, uint32_t IntType) |
Clear specified interrupt pending in SSP peripheral. | |
void | SSP_DMACmd (LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState) |
Enable/Disable DMA function for SSP peripheral. | |
void | SSP0_StdIntHandler (void) |
Standard SSP0 Interrupt handler. | |
void | SSP1_StdIntHandler (void) |
Standard SSP1 Interrupt handler. |
Detailed Description
: Contains all macro definitions and function prototypes support for SSP firmware library on LPC17xx
- Version:
- : 1.0
- Date:
- : 9. April. 2009
- Author:
- : HieuNguyen
Definition in file lpc17xx_ssp.h.
Generated on Mon Feb 8 10:01:40 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by
