SPI_REGISTER_BIT_DEFINITION
[SPI_Private_Macros]
Defines | |
| #define | SPI_SPCR_BIT_EN ((uint32_t)(1<<2)) |
| #define | SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3)) |
| #define | SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4)) |
| #define | SPI_SPCR_MSTR ((uint32_t)(1<<5)) |
| #define | SPI_SPCR_LSBF ((uint32_t)(1<<6)) |
| #define | SPI_SPCR_SPIE ((uint32_t)(1<<7)) |
| #define | SPI_SPCR_BITS(n) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8))) |
| #define | SPI_SPCR_BITMASK ((uint32_t)(0xFFC)) |
| #define | SPI_SPSR_ABRT ((uint32_t)(1<<3)) |
| #define | SPI_SPSR_MODF ((uint32_t)(1<<4)) |
| #define | SPI_SPSR_ROVR ((uint32_t)(1<<5)) |
| #define | SPI_SPSR_WCOL ((uint32_t)(1<<6)) |
| #define | SPI_SPSR_SPIF ((uint32_t)(1<<7)) |
| #define | SPI_SPSR_BITMASK ((uint32_t)(0xF8)) |
| #define | SPI_SPDR_LO_MASK ((uint32_t)(0xFF)) |
| #define | SPI_SPDR_HI_MASK ((uint32_t)(0xFF00)) |
| #define | SPI_SPDR_BITMASK ((uint32_t)(0xFFFF)) |
| #define | SPI_SPCCR_COUNTER(n) ((uint32_t)(n&0xFF)) |
| #define | SPI_SPCCR_BITMASK ((uint32_t)(0xFF)) |
| #define | SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE)) |
| #define | SPI_SPTCR_BITMASK ((uint32_t)(0xFE)) |
| #define | SPI_SPTSR_ABRT ((uint32_t)(1<<3)) |
| #define | SPI_SPTSR_MODF ((uint32_t)(1<<4)) |
| #define | SPI_SPTSR_ROVR ((uint32_t)(1<<5)) |
| #define | SPI_SPTSR_WCOL ((uint32_t)(1<<6)) |
| #define | SPI_SPTSR_SPIF ((uint32_t)(1<<7)) |
| #define | SPI_SPTSR_MASKBIT ((uint32_t)(0xF8)) |
| #define | SPI_SPINT_INTFLAG ((uint32_t)(1<<0)) |
| #define | SPI_SPINT_BITMASK ((uint32_t)(0x01)) |
Detailed Description
Macro defines for SPI Control RegisterDefine Documentation
| #define SPI_SPCCR_BITMASK ((uint32_t)(0xFF)) |
SPI clock counter bit-mask
Definition at line 106 of file lpc17xx_spi.h.
| #define SPI_SPCCR_COUNTER | ( | n | ) | ((uint32_t)(n&0xFF)) |
Macro defines for SPI Clock Counter Register SPI clock counter setting
Definition at line 104 of file lpc17xx_spi.h.
| #define SPI_SPCR_BIT_EN ((uint32_t)(1<<2)) |
Bit enable, the SPI controller sends and receives the number of bits selected by bits 11:8
Definition at line 54 of file lpc17xx_spi.h.
| #define SPI_SPCR_BITMASK ((uint32_t)(0xFFC)) |
SPI Control bit mask
Definition at line 69 of file lpc17xx_spi.h.
| #define SPI_SPCR_BITS | ( | n | ) | ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8))) |
When bit 2 of this register is 1, this field controls the number of bits per transfer
Definition at line 67 of file lpc17xx_spi.h.
| #define SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3)) |
Clock phase control bit
Definition at line 56 of file lpc17xx_spi.h.
| #define SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4)) |
Clock polarity control bit
Definition at line 58 of file lpc17xx_spi.h.
| #define SPI_SPCR_LSBF ((uint32_t)(1<<6)) |
LSB enable bit
Definition at line 62 of file lpc17xx_spi.h.
| #define SPI_SPCR_MSTR ((uint32_t)(1<<5)) |
SPI master mode enable
Definition at line 60 of file lpc17xx_spi.h.
| #define SPI_SPCR_SPIE ((uint32_t)(1<<7)) |
SPI interrupt enable bit
Definition at line 64 of file lpc17xx_spi.h.
| #define SPI_SPDR_BITMASK ((uint32_t)(0xFFFF)) |
SPI Data bit-mask
Definition at line 97 of file lpc17xx_spi.h.
| #define SPI_SPDR_HI_MASK ((uint32_t)(0xFF00)) |
SPI Data high bit-mask
Definition at line 95 of file lpc17xx_spi.h.
| #define SPI_SPDR_LO_MASK ((uint32_t)(0xFF)) |
Macro defines for SPI Data Register SPI Data low bit-mask
Definition at line 93 of file lpc17xx_spi.h.
| #define SPI_SPINT_BITMASK ((uint32_t)(0x01)) |
SPI interrupt register bit mask
Definition at line 143 of file lpc17xx_spi.h.
| #define SPI_SPINT_INTFLAG ((uint32_t)(1<<0)) |
Macro defines for SPI Interrupt Register SPI interrupt flag
Definition at line 141 of file lpc17xx_spi.h.
| #define SPI_SPSR_ABRT ((uint32_t)(1<<3)) |
Macro defines for SPI Status Register Slave abort
Definition at line 76 of file lpc17xx_spi.h.
| #define SPI_SPSR_BITMASK ((uint32_t)(0xF8)) |
SPI Status bit mask
Definition at line 86 of file lpc17xx_spi.h.
| #define SPI_SPSR_MODF ((uint32_t)(1<<4)) |
Mode fault
Definition at line 78 of file lpc17xx_spi.h.
| #define SPI_SPSR_ROVR ((uint32_t)(1<<5)) |
Read overrun
Definition at line 80 of file lpc17xx_spi.h.
| #define SPI_SPSR_SPIF ((uint32_t)(1<<7)) |
SPI transfer complete flag
Definition at line 84 of file lpc17xx_spi.h.
| #define SPI_SPSR_WCOL ((uint32_t)(1<<6)) |
Write collision
Definition at line 82 of file lpc17xx_spi.h.
| #define SPI_SPTCR_BITMASK ((uint32_t)(0xFE)) |
SPI Test register bit mask
Definition at line 115 of file lpc17xx_spi.h.
| #define SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE)) |
SPI Test bit
Definition at line 113 of file lpc17xx_spi.h.
| #define SPI_SPTSR_ABRT ((uint32_t)(1<<3)) |
Macro defines for SPI Test Status Register Slave abort
Definition at line 123 of file lpc17xx_spi.h.
| #define SPI_SPTSR_MASKBIT ((uint32_t)(0xF8)) |
SPI Status bit mask
Definition at line 133 of file lpc17xx_spi.h.
| #define SPI_SPTSR_MODF ((uint32_t)(1<<4)) |
Mode fault
Definition at line 125 of file lpc17xx_spi.h.
| #define SPI_SPTSR_ROVR ((uint32_t)(1<<5)) |
Read overrun
Definition at line 127 of file lpc17xx_spi.h.
| #define SPI_SPTSR_SPIF ((uint32_t)(1<<7)) |
SPI transfer complete flag
Definition at line 131 of file lpc17xx_spi.h.
| #define SPI_SPTSR_WCOL ((uint32_t)(1<<6)) |
Write collision
Definition at line 129 of file lpc17xx_spi.h.
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