DMA_REGISTER_BIT_DEFINITIONS
[GPDMA_Private_Macros]
Define Documentation
#define GPDMA_DMACConfig_BITMASK ((0x03)) |
Definition at line 103 of file lpc17xx_gpdma.h.
#define GPDMA_DMACConfig_E ((0x01)) |
DMA Configuration register bit description DMA Controller enable
Definition at line 101 of file lpc17xx_gpdma.h.
#define GPDMA_DMACConfig_M ((0x02)) |
AHB Master endianness configuration
Definition at line 102 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_A ((1UL<<17)) |
Active
Definition at line 141 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_BITMASK ((0x7FFFF)) |
DMA Channel Configuration registers bit mask
Definition at line 144 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_DestPeripheral | ( | n | ) | (((n&0x1F)<<6)) |
Destination peripheral
Definition at line 136 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_E ((1UL<<0)) |
DMA Channel Configuration registers bit description DMA control enable
Definition at line 134 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_H ((1UL<<18)) |
Halt
Definition at line 142 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_IE ((1UL<<14)) |
Interrupt error mask
Definition at line 138 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_ITC ((1UL<<15)) |
Terminal count interrupt mask
Definition at line 139 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_L ((1UL<<16)) |
Lock
Definition at line 140 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_SrcPeripheral | ( | n | ) | (((n&0x1F)<<1)) |
Source peripheral
Definition at line 135 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxConfig_TransferType | ( | n | ) | (((n&0x7)<<11)) |
This value indicates the type of transfer
Definition at line 137 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF)) |
DMA channel control registers bit mask
Definition at line 130 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_DBSize | ( | n | ) | (((n&0x07)<<15)) |
Destination burst size
Definition at line 120 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_DI ((1UL<<27)) |
Destination increment
Definition at line 124 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_DWidth | ( | n | ) | (((n&0x07)<<21)) |
Destination transfer width
Definition at line 122 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_I ((1UL<<31)) |
Terminal count interrupt enable bit
Definition at line 128 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_Prot1 ((1UL<<28)) |
Indicates that the access is in user mode or privileged mode
Definition at line 125 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_Prot2 ((1UL<<29)) |
Indicates that the access is bufferable or not bufferable
Definition at line 126 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_Prot3 ((1UL<<30)) |
Indicates that the access is cacheable or not cacheable
Definition at line 127 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_SBSize | ( | n | ) | (((n&0x07)<<12)) |
Source burst size
Definition at line 119 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_SI ((1UL<<26)) |
Source increment
Definition at line 123 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_SWidth | ( | n | ) | (((n&0x07)<<18)) |
Source transfer width
Definition at line 121 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxControl_TransferSize | ( | n | ) | (((n&0xFFF)<<0)) |
DMA channel control registers bit description Transfer size
Definition at line 118 of file lpc17xx_gpdma.h.
#define GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC)) |
DMA Channel Linked List Item registers bit mask
Definition at line 115 of file lpc17xx_gpdma.h.
#define GPDMA_DMACEnbldChns_BITMASK ((0xFF)) |
Definition at line 81 of file lpc17xx_gpdma.h.
#define GPDMA_DMACEnbldChns_Ch | ( | n | ) | (((1UL<<n)&0xFF)) |
DMA Enabled Channel register
Definition at line 80 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntErrClr_BITMASK ((0xFF)) |
Definition at line 69 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntErrClr_Ch | ( | n | ) | (((1UL<<n)&0xFF)) |
DMA Interrupt Error Clear register
Definition at line 68 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntErrStat_BITMASK ((0xFF)) |
Definition at line 65 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntErrStat_Ch | ( | n | ) | (((1UL<<n)&0xFF)) |
DMA Interrupt Error Status register
Definition at line 64 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntStat_BITMASK ((0xFF)) |
Definition at line 53 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntStat_Ch | ( | n | ) | (((1UL<<n)&0xFF)) |
Macros define for DMA interrupt DMA Interrupt Status register
Definition at line 52 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntTCClear_BITMASK ((0xFF)) |
Definition at line 61 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntTCClear_Ch | ( | n | ) | (((1UL<<n)&0xFF)) |
DMA Interrupt Terminal Count Request Clear register
Definition at line 60 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntTCStat_BITMASK ((0xFF)) |
Definition at line 57 of file lpc17xx_gpdma.h.
#define GPDMA_DMACIntTCStat_Ch | ( | n | ) | (((1UL<<n)&0xFF)) |
DMA Interrupt Terminal Count Request Status register
Definition at line 56 of file lpc17xx_gpdma.h.
#define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF)) |
Definition at line 77 of file lpc17xx_gpdma.h.
#define GPDMA_DMACRawIntErrStat_Ch | ( | n | ) | (((1UL<<n)&0xFF)) |
DMA Raw Error Interrupt Status register
Definition at line 76 of file lpc17xx_gpdma.h.
#define GPDMA_DMACRawIntTCStat_BITMASK ((0xFF)) |
Definition at line 73 of file lpc17xx_gpdma.h.
#define GPDMA_DMACRawIntTCStat_Ch | ( | n | ) | (((1UL<<n)&0xFF)) |
DMA Raw Interrupt Terminal Count Status register
Definition at line 72 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftBReq_BITMASK ((0xFFFF)) |
Definition at line 86 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftBReq_Src | ( | n | ) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Software Burst Request register
Definition at line 85 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF)) |
Definition at line 94 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftLBReq_Src | ( | n | ) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Software Last Burst Request register
Definition at line 93 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF)) |
Definition at line 98 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftLSReq_Src | ( | n | ) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Software Last Single Request register
Definition at line 97 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftSReq_BITMASK ((0xFFFF)) |
Definition at line 90 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSoftSReq_Src | ( | n | ) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Software Single Request register
Definition at line 89 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSync_BITMASK ((0xFFFF)) |
Definition at line 108 of file lpc17xx_gpdma.h.
#define GPDMA_DMACSync_Src | ( | n | ) | (((1UL<<n)&0xFFFF)) |
Macro defines for DMA Synchronization register
Definition at line 107 of file lpc17xx_gpdma.h.
#define GPDMA_DMAReqSel_BITMASK ((0xFF)) |
Definition at line 112 of file lpc17xx_gpdma.h.
#define GPDMA_DMAReqSel_Input | ( | n | ) | (((1UL<<(n-8))&0xFF)) |
Macro defines for DMA Request Select register
Definition at line 111 of file lpc17xx_gpdma.h.
Generated on Mon Feb 8 10:01:44 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by 1.5.9