QEI_REGISTER_BIT_DEFINITIONS
[QEI_Private_Macros]
Defines | |
#define | QEI_CON_RESP ((uint32_t)(1<<0)) |
#define | QEI_CON_RESPI ((uint32_t)(1<<1)) |
#define | QEI_CON_RESV ((uint32_t)(1<<2)) |
#define | QEI_CON_RESI ((uint32_t)(1<<3)) |
#define | QEI_CON_BITMASK ((uint32_t)(0x0F)) |
#define | QEI_CONF_DIRINV ((uint32_t)(1<<0)) |
#define | QEI_CONF_SIGMODE ((uint32_t)(1<<1)) |
#define | QEI_CONF_CAPMODE ((uint32_t)(1<<2)) |
#define | QEI_CONF_INVINX ((uint32_t)(1<<3)) |
#define | QEI_CONF_BITMASK ((uint32_t)(0x0F)) |
#define | QEI_STAT_DIR ((uint32_t)(1<<0)) |
#define | QEI_STAT_BITMASK ((uint32_t)(1<<0)) |
#define | QEI_INTSTAT_INX_Int ((uint32_t)(1<<0)) |
#define | QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1)) |
#define | QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2)) |
#define | QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3)) |
#define | QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4)) |
#define | QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5)) |
#define | QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6)) |
#define | QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7)) |
#define | QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8)) |
#define | QEI_INTSTAT_REV_Int ((uint32_t)(1<<9)) |
#define | QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10)) |
#define | QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11)) |
#define | QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12)) |
#define | QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF)) |
#define | QEI_INTSET_INX_Int ((uint32_t)(1<<0)) |
#define | QEI_INTSET_TIM_Int ((uint32_t)(1<<1)) |
#define | QEI_INTSET_VELC_Int ((uint32_t)(1<<2)) |
#define | QEI_INTSET_DIR_Int ((uint32_t)(1<<3)) |
#define | QEI_INTSET_ERR_Int ((uint32_t)(1<<4)) |
#define | QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5)) |
#define | QEI_INTSET_POS0_Int ((uint32_t)(1<<6)) |
#define | QEI_INTSET_POS1_Int ((uint32_t)(1<<7)) |
#define | QEI_INTSET_POS2_Int ((uint32_t)(1<<8)) |
#define | QEI_INTSET_REV_Int ((uint32_t)(1<<9)) |
#define | QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10)) |
#define | QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11)) |
#define | QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12)) |
#define | QEI_INTSET_BITMASK ((uint32_t)(0x1FFF)) |
#define | QEI_INTCLR_INX_Int ((uint32_t)(1<<0)) |
#define | QEI_INTCLR_TIM_Int ((uint32_t)(1<<1)) |
#define | QEI_INTCLR_VELC_Int ((uint32_t)(1<<2)) |
#define | QEI_INTCLR_DIR_Int ((uint32_t)(1<<3)) |
#define | QEI_INTCLR_ERR_Int ((uint32_t)(1<<4)) |
#define | QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5)) |
#define | QEI_INTCLR_POS0_Int ((uint32_t)(1<<6)) |
#define | QEI_INTCLR_POS1_Int ((uint32_t)(1<<7)) |
#define | QEI_INTCLR_POS2_Int ((uint32_t)(1<<8)) |
#define | QEI_INTCLR_REV_Int ((uint32_t)(1<<9)) |
#define | QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10)) |
#define | QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11)) |
#define | QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12)) |
#define | QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF)) |
#define | QEI_INTEN_INX_Int ((uint32_t)(1<<0)) |
#define | QEI_INTEN_TIM_Int ((uint32_t)(1<<1)) |
#define | QEI_INTEN_VELC_Int ((uint32_t)(1<<2)) |
#define | QEI_INTEN_DIR_Int ((uint32_t)(1<<3)) |
#define | QEI_INTEN_ERR_Int ((uint32_t)(1<<4)) |
#define | QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5)) |
#define | QEI_INTEN_POS0_Int ((uint32_t)(1<<6)) |
#define | QEI_INTEN_POS1_Int ((uint32_t)(1<<7)) |
#define | QEI_INTEN_POS2_Int ((uint32_t)(1<<8)) |
#define | QEI_INTEN_REV_Int ((uint32_t)(1<<9)) |
#define | QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10)) |
#define | QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11)) |
#define | QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12)) |
#define | QEI_INTEN_BITMASK ((uint32_t)(0x1FFF)) |
#define | QEI_IESET_INX_Int ((uint32_t)(1<<0)) |
#define | QEI_IESET_TIM_Int ((uint32_t)(1<<1)) |
#define | QEI_IESET_VELC_Int ((uint32_t)(1<<2)) |
#define | QEI_IESET_DIR_Int ((uint32_t)(1<<3)) |
#define | QEI_IESET_ERR_Int ((uint32_t)(1<<4)) |
#define | QEI_IESET_ENCLK_Int ((uint32_t)(1<<5)) |
#define | QEI_IESET_POS0_Int ((uint32_t)(1<<6)) |
#define | QEI_IESET_POS1_Int ((uint32_t)(1<<7)) |
#define | QEI_IESET_POS2_Int ((uint32_t)(1<<8)) |
#define | QEI_IESET_REV_Int ((uint32_t)(1<<9)) |
#define | QEI_IESET_POS0REV_Int ((uint32_t)(1<<10)) |
#define | QEI_IESET_POS1REV_Int ((uint32_t)(1<<11)) |
#define | QEI_IESET_POS2REV_Int ((uint32_t)(1<<12)) |
#define | QEI_IESET_BITMASK ((uint32_t)(0x1FFF)) |
#define | QEI_IECLR_INX_Int ((uint32_t)(1<<0)) |
#define | QEI_IECLR_TIM_Int ((uint32_t)(1<<1)) |
#define | QEI_IECLR_VELC_Int ((uint32_t)(1<<2)) |
#define | QEI_IECLR_DIR_Int ((uint32_t)(1<<3)) |
#define | QEI_IECLR_ERR_Int ((uint32_t)(1<<4)) |
#define | QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5)) |
#define | QEI_IECLR_POS0_Int ((uint32_t)(1<<6)) |
#define | QEI_IECLR_POS1_Int ((uint32_t)(1<<7)) |
#define | QEI_IECLR_POS2_Int ((uint32_t)(1<<8)) |
#define | QEI_IECLR_REV_Int ((uint32_t)(1<<9)) |
#define | QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10)) |
#define | QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11)) |
#define | QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12)) |
#define | QEI_IECLR_BITMASK ((uint32_t)(0x1FFF)) |
Define Documentation
#define QEI_CON_BITMASK ((uint32_t)(0x0F)) |
QEI Control register bit-mask
Definition at line 56 of file lpc17xx_qei.h.
#define QEI_CON_RESI ((uint32_t)(1<<3)) |
Reset Index Counter
Definition at line 55 of file lpc17xx_qei.h.
#define QEI_CON_RESP ((uint32_t)(1<<0)) |
Reset position counter
Definition at line 52 of file lpc17xx_qei.h.
#define QEI_CON_RESPI ((uint32_t)(1<<1)) |
Reset Posistion Counter on Index
Definition at line 53 of file lpc17xx_qei.h.
#define QEI_CON_RESV ((uint32_t)(1<<2)) |
Reset Velocity
Definition at line 54 of file lpc17xx_qei.h.
#define QEI_CONF_BITMASK ((uint32_t)(0x0F)) |
QEI Configuration register bit-mask
Definition at line 63 of file lpc17xx_qei.h.
#define QEI_CONF_CAPMODE ((uint32_t)(1<<2)) |
Capture mode
Definition at line 61 of file lpc17xx_qei.h.
#define QEI_CONF_DIRINV ((uint32_t)(1<<0)) |
Direction Invert
Definition at line 59 of file lpc17xx_qei.h.
#define QEI_CONF_INVINX ((uint32_t)(1<<3)) |
Invert index
Definition at line 62 of file lpc17xx_qei.h.
#define QEI_CONF_SIGMODE ((uint32_t)(1<<1)) |
Signal mode
Definition at line 60 of file lpc17xx_qei.h.
#define QEI_IECLR_BITMASK ((uint32_t)(0x1FFF)) |
QEI Interrupt Enable Clear register bit-mask
Definition at line 218 of file lpc17xx_qei.h.
#define QEI_IECLR_DIR_Int ((uint32_t)(1<<3)) |
Clear Enabled Interrupt Bit Indicates that a change of direction was detected
Definition at line 204 of file lpc17xx_qei.h.
#define QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5)) |
Clear Enabled Interrupt Bit Indicates that and encoder clock pulse was detected
Definition at line 206 of file lpc17xx_qei.h.
#define QEI_IECLR_ERR_Int ((uint32_t)(1<<4)) |
Clear Enabled Interrupt Bit Indicates that an encoder phase error was detected
Definition at line 205 of file lpc17xx_qei.h.
#define QEI_IECLR_INX_Int ((uint32_t)(1<<0)) |
Clear Enabled Interrupt Bit Indicates that an index pulse was detected
Definition at line 201 of file lpc17xx_qei.h.
#define QEI_IECLR_POS0_Int ((uint32_t)(1<<6)) |
Clear Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the current position
Definition at line 207 of file lpc17xx_qei.h.
#define QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10)) |
Clear Enabled Interrupt Bit that combined position 0 and revolution count interrupt
Definition at line 215 of file lpc17xx_qei.h.
#define QEI_IECLR_POS1_Int ((uint32_t)(1<<7)) |
Clear Enabled Interrupt Bit Indicates that the position 1compare value is equal to the current position
Definition at line 209 of file lpc17xx_qei.h.
#define QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11)) |
Clear Enabled Interrupt Bit that Combined position 1 and revolution count interrupt
Definition at line 216 of file lpc17xx_qei.h.
#define QEI_IECLR_POS2_Int ((uint32_t)(1<<8)) |
Clear Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the current position
Definition at line 211 of file lpc17xx_qei.h.
#define QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12)) |
Clear Enabled Interrupt Bit that Combined position 2 and revolution count interrupt
Definition at line 217 of file lpc17xx_qei.h.
#define QEI_IECLR_REV_Int ((uint32_t)(1<<9)) |
Clear Enabled Interrupt Bit Indicates that the index compare value is equal to the current index count
Definition at line 213 of file lpc17xx_qei.h.
#define QEI_IECLR_TIM_Int ((uint32_t)(1<<1)) |
Clear Enabled Interrupt Bit Indicates that a velocity timer overflow occurred
Definition at line 202 of file lpc17xx_qei.h.
#define QEI_IECLR_VELC_Int ((uint32_t)(1<<2)) |
Clear Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity
Definition at line 203 of file lpc17xx_qei.h.
#define QEI_IESET_BITMASK ((uint32_t)(0x1FFF)) |
QEI Interrupt Enable Set register bit-mask
Definition at line 198 of file lpc17xx_qei.h.
#define QEI_IESET_DIR_Int ((uint32_t)(1<<3)) |
Set Enable Interrupt Bit Indicates that a change of direction was detected
Definition at line 184 of file lpc17xx_qei.h.
#define QEI_IESET_ENCLK_Int ((uint32_t)(1<<5)) |
Set Enable Interrupt Bit Indicates that and encoder clock pulse was detected
Definition at line 186 of file lpc17xx_qei.h.
#define QEI_IESET_ERR_Int ((uint32_t)(1<<4)) |
Set Enable Interrupt Bit Indicates that an encoder phase error was detected
Definition at line 185 of file lpc17xx_qei.h.
#define QEI_IESET_INX_Int ((uint32_t)(1<<0)) |
Set Enable Interrupt Bit Indicates that an index pulse was detected
Definition at line 181 of file lpc17xx_qei.h.
#define QEI_IESET_POS0_Int ((uint32_t)(1<<6)) |
Set Enable Interrupt Bit Indicates that the position 0 compare value is equal to the current position
Definition at line 187 of file lpc17xx_qei.h.
#define QEI_IESET_POS0REV_Int ((uint32_t)(1<<10)) |
Set Enable Interrupt Bit that combined position 0 and revolution count interrupt
Definition at line 195 of file lpc17xx_qei.h.
#define QEI_IESET_POS1_Int ((uint32_t)(1<<7)) |
Set Enable Interrupt Bit Indicates that the position 1compare value is equal to the current position
Definition at line 189 of file lpc17xx_qei.h.
#define QEI_IESET_POS1REV_Int ((uint32_t)(1<<11)) |
Set Enable Interrupt Bit that Combined position 1 and revolution count interrupt
Definition at line 196 of file lpc17xx_qei.h.
#define QEI_IESET_POS2_Int ((uint32_t)(1<<8)) |
Set Enable Interrupt Bit Indicates that the position 2 compare value is equal to the current position
Definition at line 191 of file lpc17xx_qei.h.
#define QEI_IESET_POS2REV_Int ((uint32_t)(1<<12)) |
Set Enable Interrupt Bit that Combined position 2 and revolution count interrupt
Definition at line 197 of file lpc17xx_qei.h.
#define QEI_IESET_REV_Int ((uint32_t)(1<<9)) |
Set Enable Interrupt Bit Indicates that the index compare value is equal to the current index count
Definition at line 193 of file lpc17xx_qei.h.
#define QEI_IESET_TIM_Int ((uint32_t)(1<<1)) |
Set Enable Interrupt Bit Indicates that a velocity timer overflow occurred
Definition at line 182 of file lpc17xx_qei.h.
#define QEI_IESET_VELC_Int ((uint32_t)(1<<2)) |
Set Enable Interrupt Bit Indicates that capture velocity is less than compare velocity
Definition at line 183 of file lpc17xx_qei.h.
#define QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF)) |
QEI Interrupt Clear register bit-mask
Definition at line 158 of file lpc17xx_qei.h.
#define QEI_INTCLR_DIR_Int ((uint32_t)(1<<3)) |
Clear Bit Indicates that a change of direction was detected
Definition at line 144 of file lpc17xx_qei.h.
#define QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5)) |
Clear Bit Indicates that and encoder clock pulse was detected
Definition at line 146 of file lpc17xx_qei.h.
#define QEI_INTCLR_ERR_Int ((uint32_t)(1<<4)) |
Clear Bit Indicates that an encoder phase error was detected
Definition at line 145 of file lpc17xx_qei.h.
#define QEI_INTCLR_INX_Int ((uint32_t)(1<<0)) |
Clear Bit Indicates that an index pulse was detected
Definition at line 141 of file lpc17xx_qei.h.
#define QEI_INTCLR_POS0_Int ((uint32_t)(1<<6)) |
Clear Bit Indicates that the position 0 compare value is equal to the current position
Definition at line 147 of file lpc17xx_qei.h.
#define QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10)) |
Clear Bit that combined position 0 and revolution count interrupt
Definition at line 155 of file lpc17xx_qei.h.
#define QEI_INTCLR_POS1_Int ((uint32_t)(1<<7)) |
Clear Bit Indicates that the position 1compare value is equal to the current position
Definition at line 149 of file lpc17xx_qei.h.
#define QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11)) |
Clear Bit that Combined position 1 and revolution count interrupt
Definition at line 156 of file lpc17xx_qei.h.
#define QEI_INTCLR_POS2_Int ((uint32_t)(1<<8)) |
Clear Bit Indicates that the position 2 compare value is equal to the current position
Definition at line 151 of file lpc17xx_qei.h.
#define QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12)) |
Clear Bit that Combined position 2 and revolution count interrupt
Definition at line 157 of file lpc17xx_qei.h.
#define QEI_INTCLR_REV_Int ((uint32_t)(1<<9)) |
Clear Bit Indicates that the index compare value is equal to the current index count
Definition at line 153 of file lpc17xx_qei.h.
#define QEI_INTCLR_TIM_Int ((uint32_t)(1<<1)) |
Clear Bit Indicates that a velocity timer overflow occurred
Definition at line 142 of file lpc17xx_qei.h.
#define QEI_INTCLR_VELC_Int ((uint32_t)(1<<2)) |
Clear Bit Indicates that capture velocity is less than compare velocity
Definition at line 143 of file lpc17xx_qei.h.
#define QEI_INTEN_BITMASK ((uint32_t)(0x1FFF)) |
QEI Interrupt Enable register bit-mask
Definition at line 178 of file lpc17xx_qei.h.
#define QEI_INTEN_DIR_Int ((uint32_t)(1<<3)) |
Enabled Interrupt Bit Indicates that a change of direction was detected
Definition at line 164 of file lpc17xx_qei.h.
#define QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5)) |
Enabled Interrupt Bit Indicates that and encoder clock pulse was detected
Definition at line 166 of file lpc17xx_qei.h.
#define QEI_INTEN_ERR_Int ((uint32_t)(1<<4)) |
Enabled Interrupt Bit Indicates that an encoder phase error was detected
Definition at line 165 of file lpc17xx_qei.h.
#define QEI_INTEN_INX_Int ((uint32_t)(1<<0)) |
Enabled Interrupt Bit Indicates that an index pulse was detected
Definition at line 161 of file lpc17xx_qei.h.
#define QEI_INTEN_POS0_Int ((uint32_t)(1<<6)) |
Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the current position
Definition at line 167 of file lpc17xx_qei.h.
#define QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10)) |
Enabled Interrupt Bit that combined position 0 and revolution count interrupt
Definition at line 175 of file lpc17xx_qei.h.
#define QEI_INTEN_POS1_Int ((uint32_t)(1<<7)) |
Enabled Interrupt Bit Indicates that the position 1compare value is equal to the current position
Definition at line 169 of file lpc17xx_qei.h.
#define QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11)) |
Enabled Interrupt Bit that Combined position 1 and revolution count interrupt
Definition at line 176 of file lpc17xx_qei.h.
#define QEI_INTEN_POS2_Int ((uint32_t)(1<<8)) |
Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the current position
Definition at line 171 of file lpc17xx_qei.h.
#define QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12)) |
Enabled Interrupt Bit that Combined position 2 and revolution count interrupt
Definition at line 177 of file lpc17xx_qei.h.
#define QEI_INTEN_REV_Int ((uint32_t)(1<<9)) |
Enabled Interrupt Bit Indicates that the index compare value is equal to the current index count
Definition at line 173 of file lpc17xx_qei.h.
#define QEI_INTEN_TIM_Int ((uint32_t)(1<<1)) |
Enabled Interrupt Bit Indicates that a velocity timer overflow occurred
Definition at line 162 of file lpc17xx_qei.h.
#define QEI_INTEN_VELC_Int ((uint32_t)(1<<2)) |
Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity
Definition at line 163 of file lpc17xx_qei.h.
#define QEI_INTSET_BITMASK ((uint32_t)(0x1FFF)) |
QEI Interrupt Set register bit-mask
Definition at line 138 of file lpc17xx_qei.h.
#define QEI_INTSET_DIR_Int ((uint32_t)(1<<3)) |
Set Bit Indicates that a change of direction was detected
Definition at line 124 of file lpc17xx_qei.h.
#define QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5)) |
Set Bit Indicates that and encoder clock pulse was detected
Definition at line 126 of file lpc17xx_qei.h.
#define QEI_INTSET_ERR_Int ((uint32_t)(1<<4)) |
Set Bit Indicates that an encoder phase error was detected
Definition at line 125 of file lpc17xx_qei.h.
#define QEI_INTSET_INX_Int ((uint32_t)(1<<0)) |
Set Bit Indicates that an index pulse was detected
Definition at line 121 of file lpc17xx_qei.h.
#define QEI_INTSET_POS0_Int ((uint32_t)(1<<6)) |
Set Bit Indicates that the position 0 compare value is equal to the current position
Definition at line 127 of file lpc17xx_qei.h.
#define QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10)) |
Set Bit that combined position 0 and revolution count interrupt
Definition at line 135 of file lpc17xx_qei.h.
#define QEI_INTSET_POS1_Int ((uint32_t)(1<<7)) |
Set Bit Indicates that the position 1compare value is equal to the current position
Definition at line 129 of file lpc17xx_qei.h.
#define QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11)) |
Set Bit that Combined position 1 and revolution count interrupt
Definition at line 136 of file lpc17xx_qei.h.
#define QEI_INTSET_POS2_Int ((uint32_t)(1<<8)) |
Set Bit Indicates that the position 2 compare value is equal to the current position
Definition at line 131 of file lpc17xx_qei.h.
#define QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12)) |
Set Bit that Combined position 2 and revolution count interrupt
Definition at line 137 of file lpc17xx_qei.h.
#define QEI_INTSET_REV_Int ((uint32_t)(1<<9)) |
Set Bit Indicates that the index compare value is equal to the current index count
Definition at line 133 of file lpc17xx_qei.h.
#define QEI_INTSET_TIM_Int ((uint32_t)(1<<1)) |
Set Bit Indicates that a velocity timer overflow occurred
Definition at line 122 of file lpc17xx_qei.h.
#define QEI_INTSET_VELC_Int ((uint32_t)(1<<2)) |
Set Bit Indicates that capture velocity is less than compare velocity
Definition at line 123 of file lpc17xx_qei.h.
#define QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF)) |
QEI Interrupt Status register bit-mask
Definition at line 118 of file lpc17xx_qei.h.
#define QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3)) |
Indicates that a change of direction was detected
Definition at line 101 of file lpc17xx_qei.h.
#define QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5)) |
Indicates that and encoder clock pulse was detected
Definition at line 103 of file lpc17xx_qei.h.
#define QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4)) |
Indicates that an encoder phase error was detected
Definition at line 102 of file lpc17xx_qei.h.
#define QEI_INTSTAT_INX_Int ((uint32_t)(1<<0)) |
Indicates that an index pulse was detected
Definition at line 98 of file lpc17xx_qei.h.
#define QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6)) |
Indicates that the position 0 compare value is equal to the current position
Definition at line 104 of file lpc17xx_qei.h.
#define QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10)) |
Combined position 0 and revolution count interrupt. Set when both the POS0_Int bit is set and the REV_Int is set
Definition at line 112 of file lpc17xx_qei.h.
#define QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7)) |
Indicates that the position 1compare value is equal to the current position
Definition at line 106 of file lpc17xx_qei.h.
#define QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11)) |
Combined position 1 and revolution count interrupt. Set when both the POS1_Int bit is set and the REV_Int is set
Definition at line 114 of file lpc17xx_qei.h.
#define QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8)) |
Indicates that the position 2 compare value is equal to the current position
Definition at line 108 of file lpc17xx_qei.h.
#define QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12)) |
Combined position 2 and revolution count interrupt. Set when both the POS2_Int bit is set and the REV_Int is set
Definition at line 116 of file lpc17xx_qei.h.
#define QEI_INTSTAT_REV_Int ((uint32_t)(1<<9)) |
Indicates that the index compare value is equal to the current index count
Definition at line 110 of file lpc17xx_qei.h.
#define QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1)) |
Indicates that a velocity timer overflow occurred
Definition at line 99 of file lpc17xx_qei.h.
#define QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2)) |
Indicates that capture velocity is less than compare velocity
Definition at line 100 of file lpc17xx_qei.h.
#define QEI_STAT_BITMASK ((uint32_t)(1<<0)) |
QEI status register bit-mask
Definition at line 67 of file lpc17xx_qei.h.
#define QEI_STAT_DIR ((uint32_t)(1<<0)) |
Direction bit
Definition at line 66 of file lpc17xx_qei.h.
Generated on Mon Feb 8 10:01:46 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by 1.5.9