LPC1700CMSIS Standard Peripheral Firmware Library: CoreDebug_Type Struct Reference

LPC1700CMSIS

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CoreDebug_Type Struct Reference
[CMSIS CM3 Core Debug]

#include <core_cm3.h>


Data Fields

__IO uint32_t DHCSR
__O uint32_t DCRSR
__IO uint32_t DCRDR
__IO uint32_t DEMCR

Detailed Description

Definition at line 620 of file core_cm3.h.

Field Documentation

__IO uint32_t DCRDR

Offset: 0x08 Debug Core Register Data Register

Definition at line 624 of file core_cm3.h.

__O uint32_t DCRSR

Offset: 0x04 Debug Core Register Selector Register

Definition at line 623 of file core_cm3.h.

__IO uint32_t DEMCR

Offset: 0x0C Debug Exception and Monitor Control Register

Definition at line 625 of file core_cm3.h.

__IO uint32_t DHCSR

Offset: 0x00 Debug Halting Control and Status Register

Definition at line 622 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CM3/CoreSupport/core_cm3.h

Generated on Mon Feb 8 10:01:52 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by  doxygen 1.5.9
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