ADC_REGISTER_BIT_DEFINITIONS
[ADC_Private_Macros]
Defines | |
#define | ADC_CR_CH_SEL(n) ((1UL << n)) |
#define | ADC_CR_CLKDIV(n) ((n<<8)) |
#define | ADC_CR_BURST ((1UL<<16)) |
#define | ADC_CR_PDN ((1UL<<21)) |
#define | ADC_CR_START_MASK ((7UL<<24)) |
#define | ADC_CR_START_MODE_SEL(SEL) ((SEL<<24)) |
#define | ADC_CR_START_NOW ((1UL<<24)) |
#define | ADC_CR_START_EINT0 ((2UL<<24)) |
#define | ADC_CR_START_CAP01 ((3UL<<24)) |
#define | ADC_CR_START_MAT01 ((4UL<<24)) |
#define | ADC_CR_START_MAT03 ((5UL<<24)) |
#define | ADC_CR_START_MAT10 ((6UL<<24)) |
#define | ADC_CR_START_MAT11 ((7UL<<24)) |
#define | ADC_CR_EDGE ((1UL<<27)) |
#define | ADC_GDR_RESULT(n) (((n>>4)&0xFFF)) |
#define | ADC_GDR_CH(n) (((n>>24)&0x7)) |
#define | ADC_GDR_OVERRUN_FLAG ((1UL<<30)) |
#define | ADC_GDR_DONE_FLAG ((1UL<<31)) |
#define | ADC_GDR_CH_MASK ((7UL<<24)) |
#define | ADC_INTEN_CH(n) ((1UL<<n)) |
#define | ADC_INTEN_GLOBAL ((1UL<<8)) |
#define | ADC_DR_RESULT(n) (((n>>4)&0xFFF)) |
#define | ADC_DR_OVERRUN_FLAG ((1UL<<30)) |
#define | ADC_DR_DONE_FLAG ((1UL<<31)) |
#define | ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF)) |
#define | ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF)) |
#define | ADC_STAT_INT_FLAG ((1UL<<16)) |
#define | ADC_ADCOFFS(n) (((n&0xF)<<4)) |
#define | ADC_TRIM(n) (((n&0xF)<<8)) |
Define Documentation
#define ADC_ADCOFFS | ( | n | ) | (((n&0xF)<<4)) |
Macro defines for ADC Trim register Offset trim bits for ADC operation
Definition at line 136 of file lpc17xx_adc.h.
#define ADC_CR_BURST ((1UL<<16)) |
Repeated conversions A/D enable bit
Definition at line 60 of file lpc17xx_adc.h.
#define ADC_CR_CH_SEL | ( | n | ) | ((1UL << n)) |
Macro defines for ADC control register Selects which of the AD0.0:7 pins is (are) to be sampled and converted
Definition at line 55 of file lpc17xx_adc.h.
#define ADC_CR_CLKDIV | ( | n | ) | ((n<<8)) |
The APB clock (PCLK) is divided by (this value plus one) to produce the clock for the A/D
Definition at line 58 of file lpc17xx_adc.h.
#define ADC_CR_EDGE ((1UL<<27)) |
Start conversion on a falling edge on the selected CAP/MAT signal
Definition at line 82 of file lpc17xx_adc.h.
#define ADC_CR_PDN ((1UL<<21)) |
ADC convert in power down mode
Definition at line 62 of file lpc17xx_adc.h.
#define ADC_CR_START_CAP01 ((3UL<<24)) |
Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1
Definition at line 72 of file lpc17xx_adc.h.
#define ADC_CR_START_EINT0 ((2UL<<24)) |
Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0
Definition at line 70 of file lpc17xx_adc.h.
#define ADC_CR_START_MASK ((7UL<<24)) |
Start mask bits
Definition at line 64 of file lpc17xx_adc.h.
#define ADC_CR_START_MAT01 ((4UL<<24)) |
Start conversion when the edge selected by bit 27 occurs on MAT0.1
Definition at line 74 of file lpc17xx_adc.h.
#define ADC_CR_START_MAT03 ((5UL<<24)) |
Start conversion when the edge selected by bit 27 occurs on MAT0.3
Definition at line 76 of file lpc17xx_adc.h.
#define ADC_CR_START_MAT10 ((6UL<<24)) |
Start conversion when the edge selected by bit 27 occurs on MAT1.0
Definition at line 78 of file lpc17xx_adc.h.
#define ADC_CR_START_MAT11 ((7UL<<24)) |
Start conversion when the edge selected by bit 27 occurs on MAT1.1
Definition at line 80 of file lpc17xx_adc.h.
#define ADC_CR_START_MODE_SEL | ( | SEL | ) | ((SEL<<24)) |
Select Start Mode
Definition at line 66 of file lpc17xx_adc.h.
#define ADC_CR_START_NOW ((1UL<<24)) |
Start conversion now
Definition at line 68 of file lpc17xx_adc.h.
#define ADC_DR_DONE_FLAG ((1UL<<31)) |
This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read
Definition at line 118 of file lpc17xx_adc.h.
#define ADC_DR_OVERRUN_FLAG ((1UL<<30)) |
These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel
Definition at line 115 of file lpc17xx_adc.h.
#define ADC_DR_RESULT | ( | n | ) | (((n>>4)&0xFFF)) |
Macro defines for ADC Data register When DONE is 1, this field contains result value of ADC conversion
Definition at line 112 of file lpc17xx_adc.h.
#define ADC_GDR_CH | ( | n | ) | (((n>>24)&0x7)) |
These bits contain the channel from which the LS bits were converted
Definition at line 90 of file lpc17xx_adc.h.
#define ADC_GDR_CH_MASK ((7UL<<24)) |
This bits is used to mask for Channel
Definition at line 98 of file lpc17xx_adc.h.
#define ADC_GDR_DONE_FLAG ((1UL<<31)) |
This bit is set to 1 when an A/D conversion completes
Definition at line 95 of file lpc17xx_adc.h.
#define ADC_GDR_OVERRUN_FLAG ((1UL<<30)) |
This bit is 1 in burst mode if the results of one or more conversions was (were) lost
Definition at line 93 of file lpc17xx_adc.h.
#define ADC_GDR_RESULT | ( | n | ) | (((n>>4)&0xFFF)) |
Macro defines for ADC Global Data register When DONE is 1, this field contains result value of ADC conversion
Definition at line 88 of file lpc17xx_adc.h.
#define ADC_INTEN_CH | ( | n | ) | ((1UL<<n)) |
Macro defines for ADC Interrupt register These bits allow control over which A/D channels generate interrupts for conversion completion
Definition at line 104 of file lpc17xx_adc.h.
#define ADC_INTEN_GLOBAL ((1UL<<8)) |
When 1, enables the global DONE flag in ADDR to generate an interrupt
Definition at line 106 of file lpc17xx_adc.h.
#define ADC_STAT_CH_DONE_FLAG | ( | n | ) | ((n&0xFF)) |
Macro defines for ADC Status register These bits mirror the DONE status flags that appear in the result register for each A/D channel
Definition at line 125 of file lpc17xx_adc.h.
#define ADC_STAT_CH_OVERRUN_FLAG | ( | n | ) | (((n>>8)&0xFF)) |
These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel
Definition at line 128 of file lpc17xx_adc.h.
#define ADC_STAT_INT_FLAG ((1UL<<16)) |
This bit is the A/D interrupt flag
Definition at line 130 of file lpc17xx_adc.h.
#define ADC_TRIM | ( | n | ) | (((n&0xF)<<8)) |
Written to boot code
Definition at line 138 of file lpc17xx_adc.h.
Generated on Mon Feb 8 10:01:42 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by 1.5.9