C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h File Reference
: Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx More...
#include "LPC17xx.h"
#include "lpc_types.h"
Go to the source code of this file.
Data Structures | |
struct | I2S_PinCFG_Type |
I2S configuration structure. More... | |
struct | I2S_CFG_Type |
I2S configuration structure definition. More... | |
struct | I2S_DMAConf_Type |
I2S DMA configuration structure definition. More... | |
struct | I2S_MODEConf_Type |
I2S mode configuration structure definition. More... | |
Defines | |
#define | I2S_DAO_WORDWIDTH_8 ((uint32_t)(0)) |
#define | I2S_DAO_WORDWIDTH_16 ((uint32_t)(1)) |
#define | I2S_DAO_WORDWIDTH_32 ((uint32_t)(3)) |
#define | I2S_DAO_MONO ((uint32_t)(1<<2)) |
#define | I2S_DAO_STOP ((uint32_t)(1<<3)) |
#define | I2S_DAO_RESET ((uint32_t)(1<<4)) |
#define | I2S_DAO_SLAVE ((uint32_t)(1<<5)) |
#define | I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6)) |
#define | I2S_DAO_MUTE ((uint32_t)(1<<15)) |
#define | I2S_DAI_WORDWIDTH_8 ((uint32_t)(0)) |
#define | I2S_DAI_WORDWIDTH_16 ((uint32_t)(1)) |
#define | I2S_DAI_WORDWIDTH_32 ((uint32_t)(3)) |
#define | I2S_DAI_MONO ((uint32_t)(1<<2)) |
#define | I2S_DAI_STOP ((uint32_t)(1<<3)) |
#define | I2S_DAI_RESET ((uint32_t)(1<<4)) |
#define | I2S_DAI_SLAVE ((uint32_t)(1<<5)) |
#define | I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6)) |
#define | I2S_DAI_MUTE ((uint32_t)(1<<15)) |
#define | I2S_STATE_IRQ ((uint32_t)(1)) |
#define | I2S_STATE_DMA1 ((uint32_t)(1<<1)) |
#define | I2S_STATE_DMA2 ((uint32_t)(1<<2)) |
#define | I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8)) |
#define | I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16)) |
#define | I2S_DMA1_RX_ENABLE ((uint32_t)(1)) |
#define | I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1)) |
#define | I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) |
#define | I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) |
#define | I2S_DMA2_RX_ENABLE ((uint32_t)(1)) |
#define | I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1)) |
#define | I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) |
#define | I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) |
#define | I2S_IRQ_RX_ENABLE ((uint32_t)(1)) |
#define | I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1)) |
#define | I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) |
#define | I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) |
#define | I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) |
#define | I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) |
#define | I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) |
#define | I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) |
#define | I2S_TXBITRATE(n) ((uint32_t)(n&0x3F)) |
#define | I2S_RXBITRATE(n) ((uint32_t)(n&0x3F)) |
#define | I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) |
#define | I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) |
#define | I2S_TXMODE_MCENA ((uint32_t)(1<<3)) |
#define | I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) |
#define | I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) |
#define | I2S_RXMODE_MCENA ((uint32_t)(1<<3)) |
#define | PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S)) |
#define | PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF)) |
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000)) |
#define | I2S_SRX_CLK_P0_4 ((uint8_t)(0)) |
#define | I2S_SRX_WS_P0_5 ((uint8_t)(0)) |
#define | I2S_SRX_SDA_P0_6 ((uint8_t)(0)) |
#define | I2S_STX_CLK_P0_7 ((uint8_t)(0)) |
#define | I2S_STX_WS_P0_8 ((uint8_t)(0)) |
#define | I2S_STX_SDA_P0_9 ((uint8_t)(0)) |
#define | I2S_SRX_CLK_P0_23 ((uint8_t)(0)) |
#define | I2S_SRX_WS_P0_24 ((uint8_t)(0)) |
#define | I2S_SRX_SDA_P0_25 ((uint8_t)(0)) |
#define | I2S_STX_CLK_P2_11 ((uint8_t)(2)) |
#define | I2S_STX_WS_P2_12 ((uint8_t)(2)) |
#define | I2S_STX_SDA_P2_13 ((uint8_t)(2)) |
#define | I2S_TX_MCLK_P4_29 ((uint8_t)(4)) |
#define | I2S_RX_MCLK_P4_28 ((uint8_t)(4)) |
#define | PARAM_RX_CLK_PIN(n) ((n==I2S_SRX_CLK_P0_4)||(n==I2S_SRX_CLK_P0_23)) |
#define | PARAM_TX_CLK_PIN(n) ((n==I2S_STX_CLK_P0_7)||(n==I2S_STX_CLK_P2_11)) |
#define | PARAM_RX_WS_PIN(n) ((n==I2S_SRX_WS_P0_5)||(n==I2S_SRX_WS_P0_24)) |
#define | PARAM_TX_WS_PIN(n) ((n==I2S_STX_WS_P0_8)||(n==I2S_STX_WS_P2_12)) |
#define | PARAM_RX_SDA_PIN(n) ((n==I2S_SRX_SDA_P0_6)||(n==I2S_SRX_SDA_P0_25)) |
#define | PARAM_TX_SDA_PIN(n) ((n==I2S_STX_SDA_P0_9)||(n==I2S_STX_SDA_P2_13)) |
#define | PARAM_RX_MCLK_PIN(n) (n==I2S_RX_MCLK_P4_28) |
#define | PARAM_TX_MCLK_PIN(n) (n==I2S_TX_MCLK_P4_29) |
#define | I2S_WORDWIDTH_8 I2S_DAO_WORDWIDTH_8 |
#define | I2S_WORDWIDTH_16 I2S_DAO_WORDWIDTH_16 |
#define | I2S_WORDWIDTH_32 I2S_DAO_WORDWIDTH_32 |
#define | PARAM_I2S_WORDWIDTH(n) |
#define | I2S_STEREO ((uint32_t)(0)) |
#define | I2S_MONO ((uint32_t)(1)) |
#define | PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO)) |
#define | I2S_MASTER_MODE ((uint8_t)(0)) |
#define | I2S_SLAVE_MODE ((uint8_t)(1)) |
#define | PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n=I2S_SLAVE_MODE)) |
#define | I2S_STOP_ENABLE ((uint8_t)(1)) |
#define | I2S_STOP_DISABLE ((uint8_t)(0)) |
#define | PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE)) |
#define | I2S_RESET_ENABLE ((uint8_t)(1)) |
#define | I2S_RESET_DISABLE ((uint8_t)(0)) |
#define | PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE)) |
#define | I2S_MUTE_ENABLE ((uint8_t)(1)) |
#define | I2S_MUTE_DISABLE ((uint8_t)(0)) |
#define | PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE)) |
#define | I2S_TX_MODE ((uint8_t)(0)) |
#define | I2S_RX_MODE ((uint8_t)(1)) |
#define | PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE)) |
#define | I2S_CLKSEL_0 ((uint8_t)(0)) |
#define | I2S_CLKSEL_1 ((uint8_t)(2)) |
#define | PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_0)||(n==I2S_CLKSEL_1)) |
#define | I2S_4PIN_ENABLE ((uint8_t)(1)) |
#define | I2S_4PIN_DISABLE ((uint8_t)(0)) |
#define | PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE)) |
#define | I2S_MCLK_ENABLE ((uint8_t)(1)) |
#define | I2S_MCLK_DISABLE ((uint8_t)(0)) |
#define | PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE)) |
#define | I2S_DMA_1 ((uint8_t)(0)) |
#define | I2S_DMA_2 ((uint8_t)(1)) |
#define | PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2)) |
#define | PARAM_I2S_DMA_DEPTH(n) ((n>=0)||(n<=31)) |
#define | PARAM_I2S_IRQ_LEVEL(n) ((n>=0)||(n<=31)) |
#define | PARAM_I2S_HALFPERIOD(n) ((n>0)&&(n<512)) |
#define | PARAM_I2S_BITRATE(n) ((n>=1)&&(n<=64)) |
Typedefs | |
typedef void( | fnI2SCbs_Type )() |
Functions | |
void | I2S_Init (LPC_I2S_TypeDef *I2Sx) |
Initialize I2S
| |
void | I2S_DeInit (LPC_I2S_TypeDef *I2Sx) |
DeInitial both I2S transmit or receive. | |
void | I2S_Config (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type *ConfigStruct) |
Configuration I2S, setting:
| |
Status | I2S_FreqConfig (LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode) |
Set frequency for I2S. | |
void | I2S_SetBitRate (LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode) |
I2S set bitrate. | |
void | I2S_ModeConfig (LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type *ModeConfig, uint8_t TRMode) |
Configuration operating mode for I2S. | |
void | I2S_Send (LPC_I2S_TypeDef *I2Sx, uint32_t BufferData) |
I2S Send data. | |
uint32_t | I2S_Receive (LPC_I2S_TypeDef *I2Sx) |
I2S Receive Data. | |
void | I2S_Start (LPC_I2S_TypeDef *I2Sx) |
I2S Start: clear all STOP,RESET and MUTE bit, ready to operate. | |
void | I2S_Pause (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
I2S Pause. | |
void | I2S_Mute (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
I2S Mute. | |
void | I2S_Stop (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
I2S Stop. | |
void | I2S_DMAConfig (LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type *DMAConfig, uint8_t TRMode) |
Configure DMA operation for I2S. | |
void | I2S_DMACmd (LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, FunctionalState NewState) |
Enable/Disable DMA operation for I2S. | |
void | I2S_IRQConfig (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level, fnI2SCbs_Type *pfnI2SCbs) |
Configure IRQ for I2S. | |
void | I2S_IRQCmd (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState) |
Enable/Disable IRQ for I2S. | |
void | I2S_IntHandler (void) |
Standard I2S interrupt handler, this function will check all interrupt status of I2S channels, then execute the call back function if they're already installed. | |
uint8_t | I2S_GetLevel (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) |
Get I2S Buffer Level. |
Detailed Description
: Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx
- Version:
- : 1.0
- Date:
- : 13. May. 2009
- Author:
- : NguyenCao
Definition in file lpc17xx_i2s.h.
Generated on Mon Feb 8 10:01:39 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by 1.5.9