C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h
Go to the documentation of this file.00001 /***********************************************************************/ 00021 /* Peripheral group ----------------------------------------------------------- */ 00027 #ifndef LPC17XX_I2S_H_ 00028 #define LPC17XX_I2S_H_ 00029 00030 /* Includes ------------------------------------------------------------------- */ 00031 #include "LPC17xx.h" 00032 #include "lpc_types.h" 00033 00034 00035 #ifdef __cplusplus 00036 extern "C" 00037 { 00038 #endif 00039 00040 00041 /* Private Macros ------------------------------------------------------------- */ 00046 /*********************************************************************/ 00054 #define I2S_DAO_WORDWIDTH_8 ((uint32_t)(0)) 00055 #define I2S_DAO_WORDWIDTH_16 ((uint32_t)(1)) 00056 #define I2S_DAO_WORDWIDTH_32 ((uint32_t)(3)) 00058 #define I2S_DAO_MONO ((uint32_t)(1<<2)) 00059 00060 #define I2S_DAO_STOP ((uint32_t)(1<<3)) 00061 00062 #define I2S_DAO_RESET ((uint32_t)(1<<4)) 00063 00064 #define I2S_DAO_SLAVE ((uint32_t)(1<<5)) 00065 00066 #define I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6)) 00067 00068 #define I2S_DAO_MUTE ((uint32_t)(1<<15)) 00069 00070 /*********************************************************************/ 00074 #define I2S_DAI_WORDWIDTH_8 ((uint32_t)(0)) 00075 #define I2S_DAI_WORDWIDTH_16 ((uint32_t)(1)) 00076 #define I2S_DAI_WORDWIDTH_32 ((uint32_t)(3)) 00078 #define I2S_DAI_MONO ((uint32_t)(1<<2)) 00079 00080 #define I2S_DAI_STOP ((uint32_t)(1<<3)) 00081 00082 #define I2S_DAI_RESET ((uint32_t)(1<<4)) 00083 00084 #define I2S_DAI_SLAVE ((uint32_t)(1<<5)) 00085 00086 #define I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6)) 00087 00088 #define I2S_DAI_MUTE ((uint32_t)(1<<15)) 00089 00090 /*********************************************************************/ 00094 #define I2S_STATE_IRQ ((uint32_t)(1)) 00095 00096 #define I2S_STATE_DMA1 ((uint32_t)(1<<1)) 00097 00098 #define I2S_STATE_DMA2 ((uint32_t)(1<<2)) 00099 00100 #define I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8)) 00101 00102 #define I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16)) 00103 00104 /*********************************************************************/ 00108 #define I2S_DMA1_RX_ENABLE ((uint32_t)(1)) 00109 00110 #define I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1)) 00111 00112 #define I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) 00113 00114 #define I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) 00115 00116 /*********************************************************************/ 00120 #define I2S_DMA2_RX_ENABLE ((uint32_t)(1)) 00121 00122 #define I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1)) 00123 00124 #define I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) 00125 00126 #define I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) 00127 00128 /*********************************************************************/ 00132 #define I2S_IRQ_RX_ENABLE ((uint32_t)(1)) 00133 00134 #define I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1)) 00135 00136 #define I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) 00137 00138 #define I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) 00139 00140 /********************************************************************************/ 00144 #define I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) 00145 00146 #define I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) 00147 00148 #define I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) 00149 00150 #define I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) 00151 00152 /*************************************************************************************/ 00155 #define I2S_TXBITRATE(n) ((uint32_t)(n&0x3F)) 00156 #define I2S_RXBITRATE(n) ((uint32_t)(n&0x3F)) 00157 00158 /**********************************************************************************/ 00162 #define I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) 00163 00164 #define I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) 00165 00166 #define I2S_TXMODE_MCENA ((uint32_t)(1<<3)) 00167 00168 #define I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) 00169 00170 #define I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) 00171 00172 #define I2S_RXMODE_MCENA ((uint32_t)(1<<3)) 00173 00183 /* Public Types --------------------------------------------------------------- */ 00192 typedef struct { 00193 uint8_t CLK_Pin; 00198 uint8_t WS_Pin; 00203 uint8_t SDA_Pin; 00208 uint8_t MCLK_Pin; 00211 }I2S_PinCFG_Type; 00212 00216 typedef struct { 00217 uint8_t wordwidth; 00221 uint8_t mono; 00224 uint8_t stop; 00227 uint8_t reset; 00230 uint8_t ws_sel; 00233 uint8_t mute; 00236 uint8_t Reserved0[2]; 00237 } I2S_CFG_Type; 00238 00242 typedef struct { 00243 uint8_t DMAIndex; 00246 uint8_t depth; 00247 uint8_t Reserved0[2]; 00248 }I2S_DMAConf_Type; 00249 00253 typedef struct{ 00254 uint8_t clksel; 00257 uint8_t fpin; 00260 uint8_t mcena; 00263 uint8_t Reserved; 00264 }I2S_MODEConf_Type; 00265 00267 typedef void (fnI2SCbs_Type)(); 00268 00274 /* Public Macros -------------------------------------------------------------- */ 00280 #define PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S)) 00281 00283 #define PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF)) 00284 #define PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000)) 00285 00287 #define I2S_SRX_CLK_P0_4 ((uint8_t)(0)) 00288 #define I2S_SRX_WS_P0_5 ((uint8_t)(0)) 00289 #define I2S_SRX_SDA_P0_6 ((uint8_t)(0)) 00290 #define I2S_STX_CLK_P0_7 ((uint8_t)(0)) 00291 #define I2S_STX_WS_P0_8 ((uint8_t)(0)) 00292 #define I2S_STX_SDA_P0_9 ((uint8_t)(0)) 00293 00294 00295 #define I2S_SRX_CLK_P0_23 ((uint8_t)(0)) 00296 #define I2S_SRX_WS_P0_24 ((uint8_t)(0)) 00297 #define I2S_SRX_SDA_P0_25 ((uint8_t)(0)) 00298 00299 #define I2S_STX_CLK_P2_11 ((uint8_t)(2)) 00300 #define I2S_STX_WS_P2_12 ((uint8_t)(2)) 00301 #define I2S_STX_SDA_P2_13 ((uint8_t)(2)) 00302 00303 #define I2S_TX_MCLK_P4_29 ((uint8_t)(4)) 00304 #define I2S_RX_MCLK_P4_28 ((uint8_t)(4)) 00305 00307 #define PARAM_RX_CLK_PIN(n) ((n==I2S_SRX_CLK_P0_4)||(n==I2S_SRX_CLK_P0_23)) 00308 #define PARAM_TX_CLK_PIN(n) ((n==I2S_STX_CLK_P0_7)||(n==I2S_STX_CLK_P2_11)) 00309 00310 #define PARAM_RX_WS_PIN(n) ((n==I2S_SRX_WS_P0_5)||(n==I2S_SRX_WS_P0_24)) 00311 #define PARAM_TX_WS_PIN(n) ((n==I2S_STX_WS_P0_8)||(n==I2S_STX_WS_P2_12)) 00312 00313 #define PARAM_RX_SDA_PIN(n) ((n==I2S_SRX_SDA_P0_6)||(n==I2S_SRX_SDA_P0_25)) 00314 #define PARAM_TX_SDA_PIN(n) ((n==I2S_STX_SDA_P0_9)||(n==I2S_STX_SDA_P2_13)) 00315 00316 #define PARAM_RX_MCLK_PIN(n) (n==I2S_RX_MCLK_P4_28) 00317 #define PARAM_TX_MCLK_PIN(n) (n==I2S_TX_MCLK_P4_29) 00318 00319 /*********************************************************************/ 00323 #define I2S_WORDWIDTH_8 I2S_DAO_WORDWIDTH_8 00324 #define I2S_WORDWIDTH_16 I2S_DAO_WORDWIDTH_16 00325 #define I2S_WORDWIDTH_32 I2S_DAO_WORDWIDTH_32 00326 #define PARAM_I2S_WORDWIDTH(n) ((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\ 00327 ||(n==I2S_WORDWIDTH_32)) 00328 00330 #define I2S_STEREO ((uint32_t)(0)) 00331 #define I2S_MONO ((uint32_t)(1)) 00332 #define PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO)) 00333 00335 #define I2S_MASTER_MODE ((uint8_t)(0)) 00336 #define I2S_SLAVE_MODE ((uint8_t)(1)) 00337 #define PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n=I2S_SLAVE_MODE)) 00338 00340 #define I2S_STOP_ENABLE ((uint8_t)(1)) 00341 #define I2S_STOP_DISABLE ((uint8_t)(0)) 00342 #define PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE)) 00343 00345 #define I2S_RESET_ENABLE ((uint8_t)(1)) 00346 #define I2S_RESET_DISABLE ((uint8_t)(0)) 00347 #define PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE)) 00348 00350 #define I2S_MUTE_ENABLE ((uint8_t)(1)) 00351 #define I2S_MUTE_DISABLE ((uint8_t)(0)) 00352 #define PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE)) 00353 00355 #define I2S_TX_MODE ((uint8_t)(0)) 00356 #define I2S_RX_MODE ((uint8_t)(1)) 00357 #define PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE)) 00358 00360 #define I2S_CLKSEL_0 ((uint8_t)(0)) 00361 #define I2S_CLKSEL_1 ((uint8_t)(2)) 00362 #define PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_0)||(n==I2S_CLKSEL_1)) 00363 00365 #define I2S_4PIN_ENABLE ((uint8_t)(1)) 00366 #define I2S_4PIN_DISABLE ((uint8_t)(0)) 00367 #define PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE)) 00368 00370 #define I2S_MCLK_ENABLE ((uint8_t)(1)) 00371 #define I2S_MCLK_DISABLE ((uint8_t)(0)) 00372 #define PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE)) 00373 00375 #define I2S_DMA_1 ((uint8_t)(0)) 00376 #define I2S_DMA_2 ((uint8_t)(1)) 00377 #define PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2)) 00378 00379 #define PARAM_I2S_DMA_DEPTH(n) ((n>=0)||(n<=31)) 00380 #define PARAM_I2S_IRQ_LEVEL(n) ((n>=0)||(n<=31)) 00381 00382 #define PARAM_I2S_HALFPERIOD(n) ((n>0)&&(n<512)) 00383 00384 #define PARAM_I2S_BITRATE(n) ((n>=1)&&(n<=64)) 00385 00391 /* Public Functions ----------------------------------------------------------- */ 00396 void I2S_Init(LPC_I2S_TypeDef *I2Sx); 00397 void I2S_DeInit(LPC_I2S_TypeDef *I2Sx); 00398 00399 void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct); 00400 Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode); 00401 void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode); 00402 void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig, uint8_t TRMode); 00403 00404 void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData); 00405 uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx); 00406 void I2S_Start(LPC_I2S_TypeDef *I2Sx); 00407 void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); 00408 void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); 00409 void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); 00410 00411 void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig, uint8_t TRMode); 00412 void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex,uint8_t TRMode, FunctionalState NewState); 00413 void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level, fnI2SCbs_Type *pfnI2SCbs); 00414 void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode, FunctionalState NewState); 00415 void I2S_IntHandler(void); 00416 uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); 00417 00423 #ifdef __cplusplus 00424 } 00425 #endif 00426 00427 00428 #endif /* LPC17XX_SSP_H_ */ 00429 00434 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Feb 8 10:01:36 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by 1.5.9