C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h
Go to the documentation of this file.00001 /***********************************************************************/ 00021 /* Peripheral group ----------------------------------------------------------- */ 00027 #ifndef LPC17XX_GPDMA_H_ 00028 #define LPC17XX_GPDMA_H_ 00029 00030 /* Includes ------------------------------------------------------------------- */ 00031 #include "LPC17xx.h" 00032 #include "lpc_types.h" 00033 00034 00035 #ifdef __cplusplus 00036 extern "C" 00037 { 00038 #endif 00039 00040 00041 /* Private Macros ------------------------------------------------------------- */ 00052 #define GPDMA_DMACIntStat_Ch(n) (((1UL<<n)&0xFF)) 00053 #define GPDMA_DMACIntStat_BITMASK ((0xFF)) 00054 00056 #define GPDMA_DMACIntTCStat_Ch(n) (((1UL<<n)&0xFF)) 00057 #define GPDMA_DMACIntTCStat_BITMASK ((0xFF)) 00058 00060 #define GPDMA_DMACIntTCClear_Ch(n) (((1UL<<n)&0xFF)) 00061 #define GPDMA_DMACIntTCClear_BITMASK ((0xFF)) 00062 00064 #define GPDMA_DMACIntErrStat_Ch(n) (((1UL<<n)&0xFF)) 00065 #define GPDMA_DMACIntErrStat_BITMASK ((0xFF)) 00066 00068 #define GPDMA_DMACIntErrClr_Ch(n) (((1UL<<n)&0xFF)) 00069 #define GPDMA_DMACIntErrClr_BITMASK ((0xFF)) 00070 00072 #define GPDMA_DMACRawIntTCStat_Ch(n) (((1UL<<n)&0xFF)) 00073 #define GPDMA_DMACRawIntTCStat_BITMASK ((0xFF)) 00074 00076 #define GPDMA_DMACRawIntErrStat_Ch(n) (((1UL<<n)&0xFF)) 00077 #define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF)) 00078 00080 #define GPDMA_DMACEnbldChns_Ch(n) (((1UL<<n)&0xFF)) 00081 #define GPDMA_DMACEnbldChns_BITMASK ((0xFF)) 00082 00083 00085 #define GPDMA_DMACSoftBReq_Src(n) (((1UL<<n)&0xFFFF)) 00086 #define GPDMA_DMACSoftBReq_BITMASK ((0xFFFF)) 00087 00089 #define GPDMA_DMACSoftSReq_Src(n) (((1UL<<n)&0xFFFF)) 00090 #define GPDMA_DMACSoftSReq_BITMASK ((0xFFFF)) 00091 00093 #define GPDMA_DMACSoftLBReq_Src(n) (((1UL<<n)&0xFFFF)) 00094 #define GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF)) 00095 00097 #define GPDMA_DMACSoftLSReq_Src(n) (((1UL<<n)&0xFFFF)) 00098 #define GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF)) 00099 00101 #define GPDMA_DMACConfig_E ((0x01)) 00102 #define GPDMA_DMACConfig_M ((0x02)) 00103 #define GPDMA_DMACConfig_BITMASK ((0x03)) 00104 00105 00107 #define GPDMA_DMACSync_Src(n) (((1UL<<n)&0xFFFF)) 00108 #define GPDMA_DMACSync_BITMASK ((0xFFFF)) 00109 00111 #define GPDMA_DMAReqSel_Input(n) (((1UL<<(n-8))&0xFF)) 00112 #define GPDMA_DMAReqSel_BITMASK ((0xFF)) 00113 00115 #define GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC)) 00116 00118 #define GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0)) 00119 #define GPDMA_DMACCxControl_SBSize(n) (((n&0x07)<<12)) 00120 #define GPDMA_DMACCxControl_DBSize(n) (((n&0x07)<<15)) 00121 #define GPDMA_DMACCxControl_SWidth(n) (((n&0x07)<<18)) 00122 #define GPDMA_DMACCxControl_DWidth(n) (((n&0x07)<<21)) 00123 #define GPDMA_DMACCxControl_SI ((1UL<<26)) 00124 #define GPDMA_DMACCxControl_DI ((1UL<<27)) 00125 #define GPDMA_DMACCxControl_Prot1 ((1UL<<28)) 00126 #define GPDMA_DMACCxControl_Prot2 ((1UL<<29)) 00127 #define GPDMA_DMACCxControl_Prot3 ((1UL<<30)) 00128 #define GPDMA_DMACCxControl_I ((1UL<<31)) 00130 #define GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF)) 00131 00132 00134 #define GPDMA_DMACCxConfig_E ((1UL<<0)) 00135 #define GPDMA_DMACCxConfig_SrcPeripheral(n) (((n&0x1F)<<1)) 00136 #define GPDMA_DMACCxConfig_DestPeripheral(n) (((n&0x1F)<<6)) 00137 #define GPDMA_DMACCxConfig_TransferType(n) (((n&0x7)<<11)) 00138 #define GPDMA_DMACCxConfig_IE ((1UL<<14)) 00139 #define GPDMA_DMACCxConfig_ITC ((1UL<<15)) 00140 #define GPDMA_DMACCxConfig_L ((1UL<<16)) 00141 #define GPDMA_DMACCxConfig_A ((1UL<<17)) 00142 #define GPDMA_DMACCxConfig_H ((1UL<<18)) 00144 #define GPDMA_DMACCxConfig_BITMASK ((0x7FFFF)) 00145 00146 00156 /* Public Types --------------------------------------------------------------- */ 00165 typedef struct { 00166 uint32_t ChannelNum; 00171 uint32_t TransferSize; 00172 uint32_t TransferWidth; 00173 uint32_t SrcMemAddr; 00175 uint32_t DstMemAddr; 00177 uint32_t TransferType; 00183 uint32_t SrcConn; 00203 uint32_t DstConn; 00223 uint32_t DMALLI; 00226 } GPDMA_Channel_CFG_Type; 00227 00228 00232 typedef struct { 00233 uint32_t SrcAddr; 00234 uint32_t DstAddr; 00235 uint32_t NextLLI; 00236 uint32_t Control; 00237 } GPDMA_LLI_Type; 00238 00239 00241 typedef void (fnGPDMACbs_Type)(uint32_t channelStatus); 00242 00243 00249 /* Public Macros -------------------------------------------------------------- */ 00254 #define PARAM_GPDMA_CHANNEL(n) ((n>=0) && (n<=7)) 00255 00257 #define GPDMA_CONN_SSP0_Tx ((0UL)) 00258 #define GPDMA_CONN_SSP0_Rx ((1UL)) 00259 #define GPDMA_CONN_SSP1_Tx ((2UL)) 00260 #define GPDMA_CONN_SSP1_Rx ((3UL)) 00261 #define GPDMA_CONN_ADC ((4UL)) 00262 #define GPDMA_CONN_I2S_Channel_0 ((5UL)) 00263 #define GPDMA_CONN_I2S_Channel_1 ((6UL)) 00264 #define GPDMA_CONN_DAC ((7UL)) 00265 #define GPDMA_CONN_UART0_Tx ((8UL)) 00266 #define GPDMA_CONN_UART0_Rx ((9UL)) 00267 #define GPDMA_CONN_UART1_Tx ((10UL)) 00268 #define GPDMA_CONN_UART1_Rx ((11UL)) 00269 #define GPDMA_CONN_UART2_Tx ((12UL)) 00270 #define GPDMA_CONN_UART2_Rx ((13UL)) 00271 #define GPDMA_CONN_UART3_Tx ((14UL)) 00272 #define GPDMA_CONN_UART3_Rx ((15UL)) 00273 #define GPDMA_CONN_MAT0_0 ((16UL)) 00274 #define GPDMA_CONN_MAT0_1 ((17UL)) 00275 #define GPDMA_CONN_MAT1_0 ((18UL)) 00276 #define GPDMA_CONN_MAT1_1 ((19UL)) 00277 #define GPDMA_CONN_MAT2_0 ((20UL)) 00278 #define GPDMA_CONN_MAT2_1 ((21UL)) 00279 #define GPDMA_CONN_MAT3_0 ((22UL)) 00280 #define GPDMA_CONN_MAT3_1 ((23UL)) 00282 #define PARAM_GPDMA_CONN(n) ((n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \ 00283 || (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \ 00284 || (n==GPDMA_CONN_ADC) || (n==GPDMA_CONN_I2S_Channel_0) \ 00285 || (n==GPDMA_CONN_I2S_Channel_1) || (n==GPDMA_CONN_DAC) \ 00286 || (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \ 00287 || (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \ 00288 || (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \ 00289 || (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \ 00290 || (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \ 00291 || (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \ 00292 || (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \ 00293 || (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1)) 00294 00295 00297 #define GPDMA_TRANSFERTYPE_M2M ((0UL)) 00298 #define GPDMA_TRANSFERTYPE_M2P ((1UL)) 00299 #define GPDMA_TRANSFERTYPE_P2M ((2UL)) 00300 #define GPDMA_TRANSFERTYPE_P2P ((3UL)) 00303 #define PARAM_GPDMA_TRANSFERTYPE(n) ((n==GPDMA_TRANSFERTYPE_M2M)||(n==GPDMA_TRANSFERTYPE_M2P) \ 00304 ||(n==GPDMA_TRANSFERTYPE_P2M)||(n==GPDMA_TRANSFERTYPE_P2P)) 00305 00306 00308 #define GPDMA_BSIZE_1 ((0UL)) 00309 #define GPDMA_BSIZE_4 ((1UL)) 00310 #define GPDMA_BSIZE_8 ((2UL)) 00311 #define GPDMA_BSIZE_16 ((3UL)) 00312 #define GPDMA_BSIZE_32 ((4UL)) 00313 #define GPDMA_BSIZE_64 ((5UL)) 00314 #define GPDMA_BSIZE_128 ((6UL)) 00315 #define GPDMA_BSIZE_256 ((7UL)) 00317 #define PARAM_GPDMA_BSIZE(n) ((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \ 00318 || (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \ 00319 || (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \ 00320 || (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256)) 00321 00322 00324 #define GPDMA_WIDTH_BYTE ((0UL)) 00325 #define GPDMA_WIDTH_HALFWORD ((1UL)) 00326 #define GPDMA_WIDTH_WORD ((2UL)) 00328 #define PARAM_GPDMA_WIDTH(n) ((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \ 00329 || (n==GPDMA_WIDTH_WORD)) 00330 00331 00333 #define GPDMA_REQSEL_UART ((0UL)) 00334 #define GPDMA_REQSEL_TIMER ((1UL)) 00336 #define PARAM_GPDMA_REQSEL(n) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER)) 00337 00340 #define GPDMA_STAT_INT ((0UL)) 00341 00342 #define GPDMA_STAT_INTTC ((1UL)) 00343 00344 #define GPDMA_STAT_INTERR ((2UL)) 00345 00346 #define GPDMA_STAT_RAWINTTC ((3UL)) 00347 00348 #define GPDMA_STAT_RAWINTERR ((4UL)) 00349 00350 #define GPDMA_STAT_ENABLED_CH ((5UL)) 00351 00352 #define PARAM_GPDMA_STAT(n) ((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \ 00353 || (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \ 00354 || (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH)) 00355 00358 #define GPDMA_STATCLR_INTTC ((0UL)) 00359 00360 #define GPDMA_STATCLR_INTERR ((1UL)) 00361 00362 #define GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR)) 00363 00369 /* Public Functions ----------------------------------------------------------- */ 00374 void GPDMA_Init(void); 00375 Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig, fnGPDMACbs_Type *pfnGPDMACbs); 00376 void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState); 00377 void GPDMA_IntHandler(void); 00378 00384 #ifdef __cplusplus 00385 } 00386 #endif 00387 00388 #endif /* LPC17XX_GPDMA_H_ */ 00389 00394 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Feb 8 10:01:36 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by
