LPC1700CMSIS Standard Peripheral Firmware Library: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h Source File

LPC1700CMSIS

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C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h

00001 /***********************************************************************/
00021 /* Peripheral group ----------------------------------------------------------- */
00027 #ifndef LPC17XX_ADC_H_
00028 #define LPC17XX_ADC_H_
00029 
00030 /* Includes ------------------------------------------------------------------- */
00031 #include "LPC17xx.h"
00032 #include "lpc_types.h"
00033 
00034 
00035 #ifdef __cplusplus
00036 extern "C"
00037 {
00038 #endif
00039 
00040 
00041 /* Private Macros ------------------------------------------------------------- */
00051 /*********************************************************************/
00055 #define ADC_CR_CH_SEL(n)        ((1UL << n))
00056 
00058 #define ADC_CR_CLKDIV(n)        ((n<<8))
00059 
00060 #define ADC_CR_BURST            ((1UL<<16))
00061 
00062 #define ADC_CR_PDN                      ((1UL<<21))
00063 
00064 #define ADC_CR_START_MASK       ((7UL<<24))
00065 
00066 #define ADC_CR_START_MODE_SEL(SEL)      ((SEL<<24))
00067 
00068 #define ADC_CR_START_NOW        ((1UL<<24))
00069 
00070 #define ADC_CR_START_EINT0      ((2UL<<24))
00071 
00072 #define ADC_CR_START_CAP01      ((3UL<<24))
00073 
00074 #define ADC_CR_START_MAT01      ((4UL<<24))
00075 
00076 #define ADC_CR_START_MAT03      ((5UL<<24))
00077 
00078 #define ADC_CR_START_MAT10      ((6UL<<24))
00079 
00080 #define ADC_CR_START_MAT11      ((7UL<<24))
00081 
00082 #define ADC_CR_EDGE                     ((1UL<<27))
00083 
00084 /*********************************************************************/
00088 #define ADC_GDR_RESULT(n)               (((n>>4)&0xFFF))
00089 
00090 #define ADC_GDR_CH(n)                   (((n>>24)&0x7))
00091 
00093 #define ADC_GDR_OVERRUN_FLAG    ((1UL<<30))
00094 
00095 #define ADC_GDR_DONE_FLAG               ((1UL<<31))
00096 
00098 #define ADC_GDR_CH_MASK         ((7UL<<24))
00099 /*********************************************************************/
00104 #define ADC_INTEN_CH(n)                 ((1UL<<n))
00105 
00106 #define ADC_INTEN_GLOBAL                ((1UL<<8))
00107 
00108 /*********************************************************************/
00112 #define ADC_DR_RESULT(n)                (((n>>4)&0xFFF))
00113 
00115 #define ADC_DR_OVERRUN_FLAG             ((1UL<<30))
00116 
00118 #define ADC_DR_DONE_FLAG                ((1UL<<31))
00119 
00120 /*********************************************************************/
00125 #define ADC_STAT_CH_DONE_FLAG(n)                ((n&0xFF))
00126 
00128 #define ADC_STAT_CH_OVERRUN_FLAG(n)             (((n>>8)&0xFF))
00129 
00130 #define ADC_STAT_INT_FLAG                               ((1UL<<16))
00131 
00132 /*********************************************************************/
00136 #define ADC_ADCOFFS(n)          (((n&0xF)<<4))
00137 
00138 #define ADC_TRIM(n)                 (((n&0xF)<<8))
00139 
00149 /* Public Types --------------------------------------------------------------- */
00154 /*********************************************************************/
00158 typedef enum
00159 {
00160         ADC_CHANNEL_0  = 0, 
00161         ADC_CHANNEL_1,          
00162         ADC_CHANNEL_2,          
00163         ADC_CHANNEL_3,          
00164         ADC_CHANNEL_4,          
00165         ADC_CHANNEL_5,          
00166         ADC_CHANNEL_6,          
00167         ADC_CHANNEL_7           
00168 }ADC_CHANNEL_SELECTION;
00169 
00170 
00171 
00176 typedef enum
00177 {
00178         ADC_START_CONTINUOUS =0,        
00179         ADC_START_NOW,                          
00180         ADC_START_ON_EINT0,                     
00182         ADC_START_ON_CAP01,                     
00184         ADC_START_ON_MAT01,                     
00186         ADC_START_ON_MAT03,                     
00188         ADC_START_ON_MAT10,                     
00190         ADC_START_ON_MAT11                      
00192 } ADC_START_OPT;
00193 
00194 
00197 typedef enum
00198 {
00199         ADC_START_ON_RISING = 0,        
00201         ADC_START_ON_FALLING            
00203 } ADC_START_ON_EDGE_OPT;
00204 
00206 typedef enum
00207 {
00208         ADC_ADINTEN0 = 0,               
00209         ADC_ADINTEN1,                   
00210         ADC_ADINTEN2,                   
00211         ADC_ADINTEN3,                   
00212         ADC_ADINTEN4,                   
00213         ADC_ADINTEN5,                   
00214         ADC_ADINTEN6,                   
00215         ADC_ADINTEN7,                   
00216         ADC_ADGINTEN                    
00217 }ADC_TYPE_INT_OPT;
00218 
00220 #define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
00221 ||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
00222 ||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
00223 ||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
00224 ||(OPT == ADC_ADGINTEN))
00225 
00226 
00228 typedef enum
00229 {
00230         ADC_DATA_BURST = 0,             /*Burst bit*/
00231         ADC_DATA_DONE            /*Done bit*/
00232 }ADC_DATA_STATUS;
00233 
00234 
00235 #define PARAM_ADC_START_ON_EDGE_OPT(OPT)        ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
00236 
00237 #define PARAM_ADC_DATA_STATUS(OPT)      ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
00238 
00239 #define PARAM_ADC_FREQUENCY(FRE) (FRE <= 13000000 )
00240 
00241 #define PARAM_ADC_CHANNEL_SELECTION(SEL)     ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\
00242 ||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\
00243 ||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\
00244 ||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7))
00245 
00246 #define PARAM_ADC_START_OPT(OPT)        ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\
00247 ||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\
00248 ||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\
00249 ||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11))
00250 
00251 #define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
00252 ||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
00253 ||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
00254 ||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
00255 ||(OPT == ADC_ADGINTEN))
00256 
00257 #define PARAM_ADCx(n)   (((uint32_t *)n)==((uint32_t *)LPC_ADC))
00258 
00265 /* Public Functions ----------------------------------------------------------- */
00270 void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t ConvFreq);
00271 void ADC_DeInit(LPC_ADC_TypeDef *ADCx);
00272 void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
00273 void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
00274 void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode);
00275 void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption);
00276 void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState);
00277 void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState);
00278 uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel);
00279 FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType);
00280 uint16_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel);
00281 FlagStatus      ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType);
00282 
00288 #ifdef __cplusplus
00289 }
00290 #endif
00291 
00292 
00293 #endif /* LPC17XX_ADC_H_ */
00294 
00299 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Feb 8 10:01:36 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by
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