Clock Attributes:Clock Mode

Short Name: Clock Mode

Specifies the clock mode for the signal generator.

For signal generators that support it, this allows switching the sample clock to a high resolution clocking mode. When in divide down sampling mode, the sample rate can only be set to certain frequencies, based on dividing down the update clock. However, in high resolution mode, the sample rate may be set to any value.

Default Value: NIFGEN_VAL_DIVIDE_DOWN

Defined Values:

NIFGEN_VAL_DIVIDE_DOWN	Divide down sampling—Sample rate is generated by dividing the source frequency.
NIFGEN_VAL_HIGH_RESOLUTION	High resolution sampling—Sample rate is generated by a high resolution clock source.
NIFGEN_VAL_AUTOMATIC	Automatic Selection—NI-FGEN selects between the divide-down and high-resolution modes.

Note  You cannot change this property while the device is generating a waveform. If you want to change the device configuration, call the niFgen Abort Generation VI or wait for the generation to complete.

Remarks

The following table lists the characteristics of this property.

Data Type	ViInt32
Permissions	R/W
Channel Based	No
High-Level VI	niFgen Configure Clock Mode VI