Delays (or phase shifts) the sample clock, which delays the output of the module. Delaying the sample clock can be useful when lining up the output of multiple modules or when intentionally phase shifting the output relative to a fixed reference such as the PLL reference clock.
Adjustment time can be positive or negative, but it must be less than or equal to the sample clock period. The delay takes effect immediately after this VI is called. To delay an external sample clock, set the Sample Clock Absolute Delay property.
Note Calling this VI after calling NI-TClk Synchronize breaks synchronization.
Adjustment Time specifies the amount of time to adjust the sample clock delay.
Units: Seconds (s)
error in describes error conditions that occur before this VI or function runs.
status is TRUE (X) if an error occurred before this VI or function ran or FALSE (checkmark) to indicate a warning or that no error occurred before this VI or function ran. The default is FALSE.
code is the error or warning code. The default is 0. If status is TRUE, code is a negative error code. If status is FALSE, code is 0 or a warning code.
source identifies where an error occurred. The source string includes the name of the VI that produced the error, what inputs are in error, and how to eliminate the error.
Instrument Handle Out passes a reference to your instrument session to the next VI.
error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
status is TRUE (X) if an error occurred or FALSE (checkmark) to indicate a warning or that no error occurred.
code is the error or warning code. If status is TRUE, code is a nonzero error code. If status is FALSE, code is 0 or a warning code.
source identifies where and why an error occurred. The source string includes the name of the VI that produced the error, what inputs are in error, and how to eliminate the error.
