C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Go to the documentation of this file.00001 /***********************************************************************/ 00021 /* Peripheral group ----------------------------------------------------------- */ 00027 #ifndef __LPC17XX_UART_H 00028 #define __LPC17XX_UART_H 00029 00030 /* Includes ------------------------------------------------------------------- */ 00031 #include "LPC17xx.h" 00032 #include "lpc_types.h" 00033 00034 00035 #ifdef __cplusplus 00036 extern "C" 00037 { 00038 #endif 00039 00040 00041 /* Private Macros ------------------------------------------------------------- */ 00051 /* Accepted Error baud rate value (in percent unit) */ 00052 #define UART_ACCEPTED_BAUDRATE_ERROR (3) 00054 /* Macro defines for UARTn Receiver Buffer Register */ 00055 #define UART_RBR_MASKBIT ((uint8_t)0xFF) 00057 /* Macro defines for UARTn Transmit Holding Register */ 00058 #define UART_THR_MASKBIT ((uint8_t)0xFF) 00060 /* Macro defines for UARTn Divisor Latch LSB register */ 00061 #define UART_LOAD_DLL(div) ((div) & 0xFF) 00062 #define UART_DLL_MASKBIT ((uint8_t)0xFF) 00064 /* Macro defines for UARTn Divisor Latch MSB register */ 00065 #define UART_DLM_MASKBIT ((uint8_t)0xFF) 00066 #define UART_LOAD_DLM(div) (((div) >> 8) & 0xFF) 00069 /* Macro defines for UART interrupt enable register */ 00070 #define UART_IER_RBRINT_EN ((uint32_t)(1<<0)) 00071 #define UART_IER_THREINT_EN ((uint32_t)(1<<1)) 00072 #define UART_IER_RLSINT_EN ((uint32_t)(1<<2)) 00073 #define UART1_IER_MSINT_EN ((uint32_t)(1<<3)) 00074 #define UART1_IER_CTSINT_EN ((uint32_t)(1<<7)) 00075 #define UART_IER_ABEOINT_EN ((uint32_t)(1<<8)) 00076 #define UART_IER_ABTOINT_EN ((uint32_t)(1<<9)) 00077 #define UART_IER_BITMASK ((uint32_t)(0x307)) 00078 #define UART1_IER_BITMASK ((uint32_t)(0x38F)) 00081 /* UART interrupt identification register defines */ 00082 #define UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0)) 00083 #define UART_IIR_INTID_RLS ((uint32_t)(3<<1)) 00084 #define UART_IIR_INTID_RDA ((uint32_t)(2<<1)) 00085 #define UART_IIR_INTID_CTI ((uint32_t)(6<<1)) 00086 #define UART_IIR_INTID_THRE ((uint32_t)(1<<1)) 00087 #define UART1_IIR_INTID_MODEM ((uint32_t)(0<<1)) 00088 #define UART_IIR_INTID_MASK ((uint32_t)(7<<1)) 00089 #define UART_IIR_FIFO_EN ((uint32_t)(3<<6)) 00090 #define UART_IIR_ABEO_INT ((uint32_t)(1<<8)) 00091 #define UART_IIR_ABTO_INT ((uint32_t)(1<<9)) 00092 #define UART_IIR_BITMASK ((uint32_t)(0x3CF)) 00095 /* Macro defines for UART FIFO control register */ 00096 #define UART_FCR_FIFO_EN ((uint8_t)(1<<0)) 00097 #define UART_FCR_RX_RS ((uint8_t)(1<<1)) 00098 #define UART_FCR_TX_RS ((uint8_t)(1<<2)) 00099 #define UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3)) 00100 #define UART_FCR_TRG_LEV0 ((uint8_t)(0)) 00101 #define UART_FCR_TRG_LEV1 ((uint8_t)(1<<6)) 00102 #define UART_FCR_TRG_LEV2 ((uint8_t)(2<<6)) 00103 #define UART_FCR_TRG_LEV3 ((uint8_t)(3<<6)) 00104 #define UART_FCR_BITMASK ((uint8_t)(0xCF)) 00105 #define UART_TX_FIFO_SIZE (16) 00106 00107 /* Macro defines for UART line control register */ 00108 #define UART_LCR_WLEN5 ((uint8_t)(0)) 00109 #define UART_LCR_WLEN6 ((uint8_t)(1<<0)) 00110 #define UART_LCR_WLEN7 ((uint8_t)(2<<0)) 00111 #define UART_LCR_WLEN8 ((uint8_t)(3<<0)) 00112 #define UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2)) 00113 #define UART_LCR_PARITY_EN ((uint8_t)(1<<3)) 00114 #define UART_LCR_PARITY_ODD ((uint8_t)(0)) 00115 #define UART_LCR_PARITY_EVEN ((uint8_t)(1<<4)) 00116 #define UART_LCR_PARITY_F_1 ((uint8_t)(2<<4)) 00117 #define UART_LCR_PARITY_F_0 ((uint8_t)(3<<4)) 00118 #define UART_LCR_BREAK_EN ((uint8_t)(1<<6)) 00119 #define UART_LCR_DLAB_EN ((uint8_t)(1<<7)) 00120 #define UART_LCR_BITMASK ((uint8_t)(0xFF)) 00123 /* Macro defines for UART1 Modem Control Register */ 00124 #define UART1_MCR_DTR_CTRL ((uint8_t)(1<<0)) 00125 #define UART1_MCR_RTS_CTRL ((uint8_t)(1<<1)) 00126 #define UART1_MCR_LOOPB_EN ((uint8_t)(1<<4)) 00127 #define UART1_MCR_AUTO_RTS_EN ((uint8_t)(1<<6)) 00128 #define UART1_MCR_AUTO_CTS_EN ((uint8_t)(1<<7)) 00129 #define UART1_MCR_BITMASK ((uint8_t)(0x0F3)) 00132 /* Macro defines for UART line status register */ 00133 #define UART_LSR_RDR ((uint8_t)(1<<0)) 00134 #define UART_LSR_OE ((uint8_t)(1<<1)) 00135 #define UART_LSR_PE ((uint8_t)(1<<2)) 00136 #define UART_LSR_FE ((uint8_t)(1<<3)) 00137 #define UART_LSR_BI ((uint8_t)(1<<4)) 00138 #define UART_LSR_THRE ((uint8_t)(1<<5)) 00139 #define UART_LSR_TEMT ((uint8_t)(1<<6)) 00140 #define UART_LSR_RXFE ((uint8_t)(1<<7)) 00141 #define UART_LSR_BITMASK ((uint8_t)(0xFF)) 00144 /* Macro defines for UART Modem (UART1 only) status register */ 00145 #define UART1_MSR_DELTA_CTS ((uint8_t)(1<<0)) 00146 #define UART1_MSR_DELTA_DSR ((uint8_t)(1<<1)) 00147 #define UART1_MSR_LO2HI_RI ((uint8_t)(1<<2)) 00148 #define UART1_MSR_DELTA_DCD ((uint8_t)(1<<3)) 00149 #define UART1_MSR_CTS ((uint8_t)(1<<4)) 00150 #define UART1_MSR_DSR ((uint8_t)(1<<5)) 00151 #define UART1_MSR_RI ((uint8_t)(1<<6)) 00152 #define UART1_MSR_DCD ((uint8_t)(1<<7)) 00153 #define UART1_MSR_BITMASK ((uint8_t)(0xFF)) 00156 /* Macro defines for UART Scratch Pad Register */ 00157 #define UART_SCR_BIMASK ((uint8_t)(0xFF)) 00159 /* Macro defines for UART Auto baudrate control register */ 00160 #define UART_ACR_START ((uint32_t)(1<<0)) 00161 #define UART_ACR_MODE ((uint32_t)(1<<1)) 00162 #define UART_ACR_AUTO_RESTART ((uint32_t)(1<<2)) 00163 #define UART_ACR_ABEOINT_CLR ((uint32_t)(1<<8)) 00164 #define UART_ACR_ABTOINT_CLR ((uint32_t)(1<<9)) 00165 #define UART_ACR_BITMASK ((uint32_t)(0x307)) 00167 /* UART IrDA control register defines */ 00168 #define UART_ICR_IRDAEN ((uint32_t)(1<<0)) 00169 #define UART_ICR_IRDAINV ((uint32_t)(1<<1)) 00170 #define UART_ICR_FIXPULSE_EN ((uint32_t)(1<<2)) 00171 #define UART_ICR_PULSEDIV(n) ((uint32_t)((n&0x07)<<3)) 00172 #define UART_ICR_BITMASK ((uint32_t)(0x3F)) 00174 /* Macro defines for UART Fractional divider register */ 00175 #define UART_FDR_DIVADDVAL(n) ((uint32_t)(n&0x0F)) 00176 #define UART_FDR_MULVAL(n) ((uint32_t)((n<<4)&0xF0)) 00177 #define UART_FDR_BITMASK ((uint32_t)(0xFF)) 00179 /* Macro defines for UART Tx Enable register */ 00180 #define UART_TER_TXEN ((uint8_t)(1<<7)) 00181 #define UART_TER_BITMASK ((uint8_t)(0x80)) 00184 /* Macro defines for UART1 RS485 Control register */ 00185 #define UART1_RS485CTRL_NMM_EN ((uint32_t)(1<<0)) 00187 #define UART1_RS485CTRL_RX_DIS ((uint32_t)(1<<1)) 00188 #define UART1_RS485CTRL_AADEN ((uint32_t)(1<<2)) 00189 #define UART1_RS485CTRL_SEL_DTR ((uint32_t)(1<<3)) 00191 #define UART1_RS485CTRL_DCTRL_EN ((uint32_t)(1<<4)) 00192 #define UART1_RS485CTRL_OINV_1 ((uint32_t)(1<<5)) 00195 #define UART1_RS485CTRL_BITMASK ((uint32_t)(0x3F)) 00198 /* Macro defines for UART1 RS-485 Address Match register */ 00199 #define UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF)) 00201 /* Macro defines for UART1 RS-485 Delay value register */ 00202 #define UART1_RS485DLY_BITMASK ((uint8_t)(0xFF)) 00205 /* Macro defines for UART FIFO Level register */ 00206 #define UART_FIFOLVL_RXFIFOLVL(n) ((uint32_t)(n&0x0F)) 00207 #define UART_FIFOLVL_TXFIFOLVL(n) ((uint32_t)((n>>8)&0x0F)) 00208 #define UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F)) 00219 /* Public Types --------------------------------------------------------------- */ 00220 00228 typedef enum { 00229 UART_DATABIT_5 = 0, 00230 UART_DATABIT_6, 00231 UART_DATABIT_7, 00232 UART_DATABIT_8 00233 } UART_DATABIT_Type; 00234 00236 #define PARAM_UART_DATABIT(databit) ((databit==UART_DATABIT_5) || (databit==UART_DATABIT_6)\ 00237 || (databit==UART_DATABIT_7) || (databit==UART_DATABIT_8)) 00238 00242 typedef enum { 00243 UART_STOPBIT_1 = (0), 00244 UART_STOPBIT_2, 00245 } UART_STOPBIT_Type; 00246 00248 #define PARAM_UART_STOPBIT(stopbit) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2)) 00249 00253 typedef enum { 00254 UART_PARITY_NONE = 0, 00255 UART_PARITY_ODD, 00256 UART_PARITY_EVEN, 00257 UART_PARITY_SP_1, 00258 UART_PARITY_SP_0 00259 } UART_PARITY_Type; 00260 00262 #define PARAM_UART_PARITY(parity) ((parity==UART_PARITY_NONE) || (parity==UART_PARITY_ODD) \ 00263 || (parity==UART_PARITY_EVEN) || (parity==UART_PARITY_SP_1) \ 00264 || (parity==UART_PARITY_SP_0)) 00265 00269 typedef enum { 00270 UART_FIFO_TRGLEV0 = 0, 00271 UART_FIFO_TRGLEV1, 00272 UART_FIFO_TRGLEV2, 00273 UART_FIFO_TRGLEV3 00274 } UART_FITO_LEVEL_Type; 00275 00277 #define PARAM_UART_FIFO_LEVEL(fifo) ((fifo==UART_FIFO_TRGLEV0) \ 00278 || (fifo==UART_FIFO_TRGLEV1) || (fifo==UART_FIFO_TRGLEV2) \ 00279 || (fifo==UART_FIFO_TRGLEV3)) 00280 00281 /********************************************************************/ 00284 typedef enum { 00285 UART_INTCFG_RBR = 0, 00286 UART_INTCFG_THRE, 00287 UART_INTCFG_RLS, 00288 UART1_INTCFG_MS, 00289 UART1_INTCFG_CTS, 00290 UART_INTCFG_ABEO, 00291 UART_INTCFG_ABTO 00292 } UART_INT_Type; 00293 00295 #define PARAM_UART_INTCFG(IntCfg) ((IntCfg==UART_INTCFG_RBR) || (IntCfg==UART_INTCFG_THRE) \ 00296 || (IntCfg==UART_INTCFG_RLS) || (IntCfg==UART_INTCFG_ABEO) \ 00297 || (IntCfg==UART_INTCFG_ABTO)) 00298 00300 #define PARAM_UART1_INTCFG(IntCfg) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS)) 00301 00302 00306 typedef enum { 00307 UART_LINESTAT_RDR = UART_LSR_RDR, 00308 UART_LINESTAT_OE = UART_LSR_OE, 00309 UART_LINESTAT_PE = UART_LSR_PE, 00310 UART_LINESTAT_FE = UART_LSR_FE, 00311 UART_LINESTAT_BI = UART_LSR_BI, 00312 UART_LINESTAT_THRE = UART_LSR_THRE, 00313 UART_LINESTAT_TEMT = UART_LSR_TEMT, 00314 UART_LINESTAT_RXFE = UART_LSR_RXFE 00315 } UART_LS_Type; 00316 00317 00321 typedef enum { 00322 UART_AUTOBAUD_MODE0 = 0, 00323 UART_AUTOBAUD_MODE1, 00324 } UART_AB_MODE_Type; 00325 00327 #define PARAM_UART_AUTOBAUD_MODE(ABmode) ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1)) 00328 00332 typedef struct { 00333 UART_AB_MODE_Type ABMode; 00334 FunctionalState AutoRestart; 00335 } UART_AB_CFG_Type; 00336 00337 00341 typedef enum { 00342 UART_AUTOBAUD_INTSTAT_ABEO = UART_IIR_ABEO_INT, 00343 UART_AUTOBAUD_INTSTAT_ABTO = UART_IIR_ABTO_INT 00344 }UART_ABEO_Type; 00345 00347 #define PARAM_UART_AUTOBAUD_INTSTAT(ABIntStat) ((ABIntStat==UART_AUTOBAUD_INTSTAT_ABEO) || (ABIntStat==UART_AUTOBAUD_INTSTAT_ABTO)) 00348 00352 typedef enum { 00353 UART_IrDA_PULSEDIV2 = 0, 00355 UART_IrDA_PULSEDIV4, 00357 UART_IrDA_PULSEDIV8, 00359 UART_IrDA_PULSEDIV16, 00361 UART_IrDA_PULSEDIV32, 00363 UART_IrDA_PULSEDIV64, 00365 UART_IrDA_PULSEDIV128, 00367 UART_IrDA_PULSEDIV256 00369 } UART_IrDA_PULSE_Type; 00370 00371 00373 #define PARAM_UART_IrDA_PULSEDIV(PulseDiv) ((PulseDiv==UART_IrDA_PULSEDIV2) || (PulseDiv==UART_IrDA_PULSEDIV4) \ 00374 || (PulseDiv==UART_IrDA_PULSEDIV8) || (PulseDiv==UART_IrDA_PULSEDIV16) \ 00375 || (PulseDiv==UART_IrDA_PULSEDIV32) || (PulseDiv==UART_IrDA_PULSEDIV64) \ 00376 || (PulseDiv==UART_IrDA_PULSEDIV128) || (PulseDiv==UART_IrDA_PULSEDIV256)) 00377 00378 /********************************************************************/ 00381 typedef enum { 00382 INACTIVE = 0, /* In-active state */ 00383 ACTIVE = !INACTIVE /* Active state */ 00384 }UART1_SignalState; 00385 00386 /* Macro to check the input UART1_SignalState parameters */ 00387 #define PARAM_UART1_SIGNALSTATE(x) ((x==INACTIVE) || (x==ACTIVE)) 00388 00392 typedef enum { 00393 UART1_MODEM_STAT_DELTA_CTS = UART1_MSR_DELTA_CTS, 00394 UART1_MODEM_STAT_DELTA_DSR = UART1_MSR_DELTA_DSR, 00395 UART1_MODEM_STAT_LO2HI_RI = UART1_MSR_LO2HI_RI, 00396 UART1_MODEM_STAT_DELTA_DCD = UART1_MSR_DELTA_DCD, 00397 UART1_MODEM_STAT_CTS = UART1_MSR_CTS, 00398 UART1_MODEM_STAT_DSR = UART1_MSR_DSR, 00399 UART1_MODEM_STAT_RI = UART1_MSR_RI, 00400 UART1_MODEM_STAT_DCD = UART1_MSR_DCD 00401 } UART_MODEM_STAT_type; 00402 00406 typedef enum { 00407 UART1_MODEM_PIN_DTR = 0, 00408 UART1_MODEM_PIN_RTS 00409 } UART_MODEM_PIN_Type; 00410 00412 #define PARAM_UART1_MODEM_PIN(x) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS)) 00413 00414 00418 typedef enum { 00419 UART1_MODEM_MODE_LOOPBACK = 0, 00420 UART1_MODEM_MODE_AUTO_RTS, 00421 UART1_MODEM_MODE_AUTO_CTS 00422 } UART_MODEM_MODE_Type; 00423 00425 #define PARAM_UART1_MODEM_MODE(x) ((x==UART1_MODEM_MODE_LOOPBACK) || (x==UART1_MODEM_MODE_AUTO_RTS) \ 00426 || (x==UART1_MODEM_MODE_AUTO_CTS)) 00427 00428 00432 typedef enum { 00433 UART1_RS485_DIRCTRL_RTS = 0, 00434 UART1_RS485_DIRCTRL_DTR 00435 } UART_RS485_DIRCTRL_PIN_Type; 00436 00438 #define PARAM_UART_RS485_DIRCTRL_PIN(x) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR)) 00439 00440 00441 /********************************************************************/ 00444 typedef struct { 00445 uint32_t Baud_rate; 00446 UART_PARITY_Type Parity; 00453 UART_DATABIT_Type Databits; 00459 UART_STOPBIT_Type Stopbits; 00463 } UART_CFG_Type; 00464 00465 /********************************************************************/ 00469 typedef struct { 00470 FunctionalState FIFO_ResetRxBuf; 00474 FunctionalState FIFO_ResetTxBuf; 00478 FunctionalState FIFO_DMAMode; 00482 UART_FITO_LEVEL_Type FIFO_Level; 00488 } UART_FIFO_CFG_Type; 00489 00490 00491 /********************************************************************/ 00494 typedef struct { 00495 FunctionalState NormalMultiDropMode_State; 00498 FunctionalState Rx_State; 00501 FunctionalState AutoAddrDetect_State; 00504 FunctionalState AutoDirCtrl_State; 00507 UART_RS485_DIRCTRL_PIN_Type DirCtrlPin; 00512 SetState DirCtrlPol_Level; 00518 uint8_t MatchAddrValue; 00519 uint8_t DelayValue; 00520 } UART1_RS485_CTRLCFG_Type; 00521 00522 00523 /* UART call-back function type definitions */ 00525 typedef void (fnRxCbs_Type)(void); 00527 typedef void (fnTxCbs_Type)(void); 00529 typedef void (fnABCbs_Type)(uint32_t bABIntType); 00531 typedef void (fnErrCbs_Type)(uint8_t bError); 00533 typedef void (fnModemCbs_Type)(uint8_t ModemStatus); 00534 00535 00541 /* Public Macros -------------------------------------------------------------- */ 00547 /* Macro to determine if it is valid UART port number */ 00548 #define PARAM_UARTx(x) ((((uint32_t *)x)==((uint32_t *)LPC_UART0)) \ 00549 || (((uint32_t *)x)==((uint32_t *)LPC_UART1)) \ 00550 || (((uint32_t *)x)==((uint32_t *)LPC_UART2)) \ 00551 || (((uint32_t *)x)==((uint32_t *)LPC_UART3))) 00552 #define PARAM_UART_IrDA(x) (((uint32_t *)x)==((uint32_t *)LPC_UART3)) 00553 #define PARAM_UART1_MODEM(x) (((uint32_t *)x)==((uint32_t *)LPC_UART1)) 00554 00555 00557 #define PARAM_UART1_RS485_CFG_MATCHADDRVALUE(x) ((x<0xFF)) 00558 00560 #define PARAM_UART1_RS485_CFG_DELAYVALUE(x) ((x<0xFF)) 00561 00562 00567 #define UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL) 00568 00574 /* Public Functions ----------------------------------------------------------- */ 00579 void UART_DeInit(LPC_UART_TypeDef* UARTx); 00580 void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct); 00581 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct); 00582 void UART_SendData(LPC_UART_TypeDef* UARTx, uint8_t Data); 00583 uint8_t UART_ReceiveData(LPC_UART_TypeDef* UARTx); 00584 void UART_ForceBreak(LPC_UART_TypeDef* UARTx); 00585 void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState); 00586 void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState); 00587 void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv); 00588 void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, \ 00589 FunctionalState NewState); 00590 uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx); 00591 FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx); 00592 void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg); 00593 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct); 00594 void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \ 00595 FunctionalState NewState); 00596 void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState); 00597 void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \ 00598 UART1_SignalState NewState); 00599 void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \ 00600 FunctionalState NewState); 00601 uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx); 00602 void UART_RS485Config(LPC_UART1_TypeDef *UARTx, \ 00603 UART1_RS485_CTRLCFG_Type *RS485ConfigStruct); 00604 void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState); 00605 void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr); 00606 uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size); 00607 uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf, 00608 uint32_t buflen, TRANSFER_BLOCK_Type flag); 00609 uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \ 00610 uint32_t buflen, TRANSFER_BLOCK_Type flag); 00611 void UART_SetupCbs(LPC_UART_TypeDef *UARTx, uint8_t CbType, void *pfnCbs); 00612 void UART0_StdIntHandler(void); 00613 void UART1_StdIntHandler(void); 00614 void UART2_StdIntHandler(void); 00615 void UART3_StdIntHandler(void); 00616 00622 #ifdef __cplusplus 00623 } 00624 #endif 00625 00626 00627 #endif /* __LPC17XX_UART_H */ 00628 00633 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Feb 8 10:01:37 2010 for LPC1700CMSIS Standard Peripheral Firmware Library by
1.5.9