CD Convert Simulation to Control Design VI
Owning Palette: Model Conversion VIs
Installed With: Control Design and Simulation Module
Converts a simulation model into a model you can use for control design. You must manually select the polymorphic instance to use.
Use the pull-down menu to select an instance of this VI.
 Place on the block diagram | Find on the Functions palette |
CD Convert Simulation to Control Design (State-Space)
 | Simulation State-Space Model represents the simulation model this VI converts into a control design model. You can create a simulation model by using the Simulation VIs and functions. | ||||||
 | Sampling Time [dt] (s) specifies the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) must equal zero. If the model represents a discrete-time system, Sampling Time [dt] (s) must be greater than zero and equal to the sampling rate, in seconds, of the discrete system. The default is 0. | ||||||
 | error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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 | State-Space Model returns the control design model equivalent of a simulation model. You can use this model with the Control Design VIs and functions. | ||||||
 | error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Simulation to Control Design (Transfer Function)
| Simulation Transfer Function Model represents the simulation model this VI converts into a control design model. You can create a simulation model by using the Simulation VIs and functions. | ||||||
| Sampling Time [dt] (s) specifies the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) must equal zero. If the model represents a discrete-time system, Sampling Time [dt] (s) must be greater than zero and equal to the sampling rate, in seconds, of the discrete system. The default is 0. | ||||||
| error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| Transfer Function Model returns the control design model equivalent of a simulation model. You can use this model with the Control Design VIs and functions. | ||||||
| error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Simulation to Control Design (Zero-Pole-Gain)
| Simulation Zero-Pole-Gain Model represents the simulation model this VI converts into a control design model. You can create a simulation model by using the Simulation VIs and functions. | ||||||
| Sampling Time [dt] (s) specifies the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) must equal zero. If the model represents a discrete-time system, Sampling Time [dt] (s) must be greater than zero and equal to the sampling rate, in seconds, of the discrete system. The default is 0. | ||||||
| error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| Zero-Pole-Gain Model returns the control design model equivalent of a simulation model. You can use this model with the Control Design VIs and functions. | ||||||
| error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Simulation to Control Design (SISO Transfer Function)
| Simulation Transfer Function Model represents the simulation model this VI converts into a control design model. You can create a simulation model by using the Simulation VIs and functions. | ||||||
| Sampling Time [dt] (s) specifies the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) must equal zero. If the model represents a discrete-time system, Sampling Time [dt] (s) must be greater than zero and equal to the sampling rate, in seconds, of the discrete system. The default is 0. | ||||||
| error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| Transfer Function Model returns the control design model equivalent of a simulation model. You can use this model with the Control Design VIs and functions. | ||||||
| error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Simulation to Control Design (SISO Zero-Pole-Gain)
| Simulation Zero-Pole-Gain Model represents the simulation model this VI converts into a control design model. You can create a simulation model by using the Simulation VIs and functions. | ||||||
| Sampling Time [dt] (s) specifies the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) must equal zero. If the model represents a discrete-time system, Sampling Time [dt] (s) must be greater than zero and equal to the sampling rate, in seconds, of the discrete system. The default is 0. | ||||||
| error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| Zero-Pole-Gain Model returns the control design model equivalent of a simulation model. You can use this model with the Control Design VIs and functions. | ||||||
| error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Simulation to Control Design Details
This VI does not support delays because simulation models do not directly include delay in their representation of a system. When converting a simulation model to a control design model, this VI does not transfer delay to the control design model. To account for the delays, you must linearize the simulation model before converting it. Refer to the LabVIEW Control Design User Manual for more information about delays.