CD Convert Control Design to Simulation VI
Owning Palette: Model Conversion VIs
Installed With: Control Design and Simulation Module
Converts a control design model into a model you can use for simulation. The data type you wire to the State-Space Model input determines the polymorphic instance to use.
Use the pull-down menu to select an instance of this VI.
 Place on the block diagram | Find on the Functions palette |
CD Convert Control Design to Simulation (State-Space)
 | State-Space Model contains a mathematical representation of and information about the control design model you want to convert into a simulation model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
 | error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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 | Simulation State-Space Model returns the simulation model equivalent of a control design model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
 | Sampling Time [dt] (s) returns the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) equals zero. If the model represents a discrete-time system, Sampling Time [dt] (s) is greater than zero and equal to the sampling rate, in seconds, of the discrete system. | ||||||
 | error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Control Design to Simulation (Transfer Function)
| Transfer Function Model contains a mathematical representation of and information about the control design model you want to convert into a simulation model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
| error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| Simulation Transfer Function Model returns the simulation model equivalent of a control design model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
| Sampling Time [dt] (s) returns the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) equals zero. If the model represents a discrete-time system, Sampling Time [dt] (s) is greater than zero and equal to the sampling rate, in seconds, of the discrete system. | ||||||
| error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Control Design to Simulation (Zero-Pole-Gain)
| Zero-Pole-Gain Model contains a mathematical representation of and information about the control design model you want to convert into a simulation model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
| error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| Simulation Zero-Pole-Gain Model returns the simulation model equivalent of a control design model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
| Sampling Time [dt] (s) returns the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) equals zero. If the model represents a discrete-time system, Sampling Time [dt] (s) is greater than zero and equal to the sampling rate, in seconds, of the discrete system. | ||||||
| error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Control Design to Simulation (SISO Transfer Function)
| Transfer Function Model contains a mathematical representation of and information about the control design model you want to convert into a simulation model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
 | Input specifies the index number of the input from which this VI converts the transfer function matrix to the simulation model. The index is zero-based. The default is zero. | ||||||
| Output specifies the index number of the output from which this VI converts the transfer function matrix to the simulation model. The index is zero-based. The default is zero. | ||||||
| error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| Simulation Transfer Function Model returns the simulation model equivalent of a control design model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
| Sampling Time [dt] (s) returns the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) equals zero. If the model represents a discrete-time system, Sampling Time [dt] (s) is greater than zero and equal to the sampling rate, in seconds, of the discrete system. | ||||||
| error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Control Design to Simulation (SISO Zero-Pole-Gain)
| Zero-Pole-Gain Model contains a mathematical representation of and information about the control design model you want to convert into a simulation model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
| Input specifies the index number of the input from which this VI converts the zero-pole-gain matrix to the simulation model. The index is zero-based. The default is zero. | ||||||
| Output specifies the index number of the output from which this VI converts the zero-pole-gain matrix to the simulation model. The index is zero-based. The default is zero. | ||||||
| error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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| Simulation Zero-Pole-Gain Model returns the simulation model equivalent of a control design model. You can use the resulting simulation model with the Simulation VIs and functions. | ||||||
| Sampling Time [dt] (s) returns the sampling time of the model. Sampling Time [dt] (s) defines whether the model represents a continuous-time system or a discrete-time system. If the model represents a continuous-time system, Sampling Time [dt] (s) equals zero. If the model represents a discrete-time system, Sampling Time [dt] (s) is greater than zero and equal to the sampling rate, in seconds, of the discrete system. | ||||||
| error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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CD Convert Control Design to Simulation Details
This VI does not support delays unless the delays are part of the mathematical model that represents the dynamic system. When converting to simulation models from control design models, this VI does not transfer the delay from the control design model. To account for the delay when converting a control design model to a simulation model, you must incorporate the delays into the mathematical model of the dynamic system using the CD Convert Delay with Pade Approximation VI (continuous models) or the CD Convert Delay to Poles at Origin VI (discrete models). Refer to the LabVIEW Control Design User Manual for more information about delays and the limitations of Pade approximation.