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XMC Peripheral Library for XMC4000 Family
2.1.16
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#include <xmc_ccu8.h>
Data Fields | |
| uint32_t | dither_limit: 4 |
| uint32_t | float_limit: 4 |
| uint32_t | prescaler_initval: 4 |
| uint32_t | timer_concatenation: 1 |
| uint32_t | asymmetric_pwm: 1 |
| uint32_t | dither_duty_cycle: 1 |
| uint32_t | dither_timer_period: 1 |
| uint32_t | invert_out0: 1 |
| uint32_t | invert_out1: 1 |
| uint32_t | invert_out2: 1 |
| uint32_t | invert_out3: 1 |
| uint32_t | mcm_ch1_enable: 1 |
| uint32_t | mcm_ch2_enable: 1 |
| uint32_t | monoshot: 1 |
| uint32_t | passive_level_out0: 1 |
| uint32_t | passive_level_out1: 1 |
| uint32_t | passive_level_out2: 1 |
| uint32_t | passive_level_out3: 1 |
| uint32_t | prescaler_mode: 1 |
| uint32_t | shadow_xfer_clear: 1 |
| uint32_t | slice_status: 2 |
| uint32_t | timer_mode: 1 |
Detailed Description
Configuration data structure for CCU8 slice. Specifically configures the CCU8 slice to compare mode operation. This excludes event and function configuration.
Field Documentation
| uint32_t asymmetric_pwm |
Should the PWM be a function of the 2 compare channels rather than period value?
| uint32_t dither_duty_cycle |
Can the compare match of the timer dither?
| uint32_t dither_limit |
The value that determines the spreading of dithering Range : [0 to 15]
| uint32_t dither_timer_period |
Can the period of the timer dither?
| uint32_t float_limit |
The max value which the prescaler divider can increment to. Range : [0 to 15]
| uint32_t invert_out0 |
Should inverted ST of Channel-1 be connected to OUT0?
| uint32_t invert_out1 |
Should inverted ST of Channel-1 be connected to OUT1?
| uint32_t invert_out2 |
Should inverted ST of Channel-2 be connected to OUT2?
| uint32_t invert_out3 |
Should inverted ST of Channel-2 be connected to OUT3?
| uint32_t mcm_ch1_enable |
Multi-Channel mode for compare channel 1 enable?
| uint32_t mcm_ch2_enable |
Multi-Channel mode for compare channel 2 enable?
| uint32_t monoshot |
Single shot or Continuous mode . Accepts enum :: XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t
| uint32_t passive_level_out0 |
ST and OUT passive levels Configuration for OUT0. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t
| uint32_t passive_level_out1 |
ST and OUT passive levels Configuration for OUT1. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t
| uint32_t passive_level_out2 |
ST and OUT passive levels Configuration for OUT2. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t
| uint32_t passive_level_out3 |
ST and OUT passive levels Configuration for OUT3. Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t
| uint32_t prescaler_initval |
Initial prescaler divider value Accepts enum :: XMC_CCU8_SLICE_PRESCALER_t
| uint32_t prescaler_mode |
Normal or floating prescaler mode. Accepts enum :: XMC_CCU8_SLICE_PRESCALER_MODE_t
| uint32_t shadow_xfer_clear |
Should PR and CR shadow xfer happen when timer is cleared?
| uint32_t slice_status |
Which of the two channels drives the slice status output. Accepts enum :: XMC_CCU8_SLICE_STATUS_t
| uint32_t timer_concatenation |
Enables the concatenation of the timer if true
| uint32_t timer_mode |
Edge aligned or Centre Aligned. Accepts enum :: XMC_CCU8_SLICE_TIMER_COUNT_MODE_t
The documentation for this struct was generated from the following file:
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