XMC Peripheral Library for XMC4000 Family: xmc_eth_mac_map.h File Reference
From XMC Peripheral Library for XMC4000 Family
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XMC Peripheral Library for XMC4000 Family
2.1.16
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ETH MAC PHY clock
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P2_1 |
XMC_ETH_RMIIA PHY clock
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| XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P0_0 |
XMC_ETH_RMIIB PHY clock
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| XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P15_8 |
XMC_ETH_RMIIC PHY clock
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| XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P6_5 |
XMC_ETH_RMIID PHY clock
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ETH PHY transmit clock
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_CLK_TX_P5_10 |
XMC_ETH_CLK_TXA PHY transmit clock
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| XMC_ETH_MAC_PORT_CTRL_CLK_TX_P6_6 |
XMC_ETH_CLK_TXB PHY transmit clock
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ETH MAC collision detection
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_COL_P2_15 |
XMC_ETH_COLA collision detection
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| XMC_ETH_MAC_PORT_CTRL_COL_P5_5 |
XMC_ETH_COLD collision detection
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ETH MAC carrier sense data valid
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_CRS_DV_P2_5 |
XMC_ETH_CRS_DVA carrier sense data valid
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| XMC_ETH_MAC_PORT_CTRL_CRS_DV_P0_1 |
XMC_ETH_CRS_DVB carrier sense data valid
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| XMC_ETH_MAC_PORT_CTRL_CRS_DV_P15_9 |
XMC_ETH_CRS_DVC carrier sense data valid
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| XMC_ETH_MAC_PORT_CTRL_CRS_DV_P5_2 |
XMC_ETH_CRS_DVD carrier sense data valid
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ETH MAC carrier sense
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_CRS_P5_11 |
XMC_ETH_CRSA carrier sense
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| XMC_ETH_MAC_PORT_CTRL_CRS_P5_4 |
XMC_ETH_CRSD carrier sense
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ETH management data I/O
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_MDIO_P0_9 |
XMC_ETH_MDIOA management data I/O
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| XMC_ETH_MAC_PORT_CTRL_MDIO_P2_0 |
XMC_ETH_MDIOB management data I/O
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| XMC_ETH_MAC_PORT_CTRL_MDIO_P1_11 |
XMC_ETH_MDIOC management data I/O
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ETH MAC interface mode
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_MODE_MII |
MII mode
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| XMC_ETH_MAC_PORT_CTRL_MODE_RMII |
RMII mode
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ETH MAC receive data 0 line
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_RXD0_P2_2 |
RXD0A receive data line
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| XMC_ETH_MAC_PORT_CTRL_RXD0_P0_2 |
RXD0B receive data line
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| XMC_ETH_MAC_PORT_CTRL_RXD0_P14_8 |
RXD0C receive data line
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| XMC_ETH_MAC_PORT_CTRL_RXD0_P5_0 |
RXD0D receive data line
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ETH MAC receive data 1 line
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_RXD1_P2_3 |
RXD1A receive data line
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| XMC_ETH_MAC_PORT_CTRL_RXD1_P0_3 |
RXD1B receive data line
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| XMC_ETH_MAC_PORT_CTRL_RXD1_P14_9 |
RXD1C receive data line
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| XMC_ETH_MAC_PORT_CTRL_RXD1_P5_1 |
RXD1D receive data line
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ETH MAC receive data 2 line
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_RXD2_P5_8 |
RXD2A receive data line
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| XMC_ETH_MAC_PORT_CTRL_RXD2_P6_4 |
RXD2B receive data line
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ETH MAC receive data 3 line
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_RXD3_P5_9 |
RXD3A Receive data line
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| XMC_ETH_MAC_PORT_CTRL_RXD3_P6_3 |
RXD3B Receive data line
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ETH MAC receive error
| Enumerator |
|---|
| XMC_ETH_MAC_PORT_CTRL_RXER_P2_4 |
XMC_ETH_RXERA carrier sense
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| XMC_ETH_MAC_PORT_CTRL_RXER_P0_11 |
XMC_ETH_RXERB carrier sense
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| XMC_ETH_MAC_PORT_CTRL_RXER_P5_3 |
XMC_ETH_RXERD carrier sense
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