XMC Peripheral Library for XMC4000 Family: HRPWM

XMC Peripheral Library for XMC4000 Family

XMC Peripheral Library for XMC4000 Family  2.1.16

Data Structures

struct  XMC_HRPWM_CSG_CMP_t
 
struct  XMC_HRPWM_CSG_CONFIG_t
 
struct  XMC_HRPWM_CSG_DAC_t
 
struct  XMC_HRPWM_CSG_INPUT_CONFIG_t
 
struct  XMC_HRPWM_CSG_SGEN_t
 
struct  XMC_HRPWM_HRC_CONFIG_t
 
struct  XMC_HRPWM_HRC_SRC_CONFIG_t
 

Typedefs

typedef HRPWM0_CSG_Type XMC_HRPWM_CSG_t
 
typedef HRPWM0_HRC_Type XMC_HRPWM_HRC_t
 
typedef HRPWM0_Type XMC_HRPWM_t
 

Enumerations

Functions

void XMC_HRPWM_ClampComparatorOutput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_ClearPreScaler (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_CSG_ClrEventSW (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
 
void XMC_HRPWM_CSG_DACRefValSwitchingConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
 
void XMC_HRPWM_CSG_DisableEvent (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
 
void XMC_HRPWM_CSG_EnableEvent (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
 
uint32_t XMC_HRPWM_CSG_GetEventStatus (XMC_HRPWM_CSG_t *const csg, const uint32_t mask)
 
void XMC_HRPWM_CSG_Init (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CONFIG_t *const config)
 
void XMC_HRPWM_CSG_SelBlankingInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
 
void XMC_HRPWM_CSG_SelClampingInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
 
void XMC_HRPWM_CSG_SelSlopeGenClkInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CLK_INPUT_t input_clk)
 
void XMC_HRPWM_CSG_SetCMPInput (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_CMP_INPUT_t input)
 
void XMC_HRPWM_CSG_SetEventSW (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_IRQ_ID_t event)
 
void XMC_HRPWM_CSG_SetSRNode (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_IRQ_ID_t event, const XMC_HRPWM_CSG_IRQ_SR_LINE_t sr)
 
void XMC_HRPWM_CSG_StartSlopeGenConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
 
void XMC_HRPWM_CSG_StopSlopeGenConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
 
void XMC_HRPWM_CSG_TriggerDACConvConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
 
void XMC_HRPWM_CSG_TriggerShadowXferConfig (XMC_HRPWM_CSG_t *const csg, const XMC_HRPWM_CSG_INPUT_CONFIG_t *const config)
 
void XMC_HRPWM_CSG_UpdateBlankingValue (XMC_HRPWM_CSG_t *const csg, uint8_t value)
 
void XMC_HRPWM_CSG_UpdateDACPrescaler (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_PRESCALER_DIVISION_t div_value)
 
void XMC_HRPWM_CSG_UpdateDACRefDSV1 (XMC_HRPWM_CSG_t *const csg, uint32_t value)
 
void XMC_HRPWM_CSG_UpdateDACRefDSV2 (XMC_HRPWM_CSG_t *const csg, uint32_t value)
 
void XMC_HRPWM_CSG_UpdateDACStepGain (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t gain)
 
void XMC_HRPWM_CSG_UpdateFilterWindow (XMC_HRPWM_CSG_t *const csg, XMC_HRPWM_CSG_CMP_FILTER_WINDOW_t window)
 
void XMC_HRPWM_CSG_UpdatePulseClk (XMC_HRPWM_CSG_t *const csg, uint32_t value)
 
void XMC_HRPWM_DisableBias (XMC_HRPWM_t *const hrpwm)
 
void XMC_HRPWM_DisableComparatorShadowTransfer (XMC_HRPWM_t *const hrpwm, uint32_t mask)
 
void XMC_HRPWM_DisableCsgClock (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_DisableGlobalHR (XMC_HRPWM_t *const hrpwm)
 
void XMC_HRPWM_DisableHighResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_DisableHighResolutionShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_DisableHRPowerMode (XMC_HRPWM_t *const hrpwm)
 
void XMC_HRPWM_DisableLowResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_EnableBias (XMC_HRPWM_t *const hrpwm)
 
void XMC_HRPWM_EnableComparatorShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_EnableGlobalHR (XMC_HRPWM_t *const hrpwm)
 
void XMC_HRPWM_EnableHighResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_EnableHighResolutionShadowTransfer (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_EnableHRPowerMode (XMC_HRPWM_t *const hrpwm)
 
void XMC_HRPWM_EnableLowResolutionPath (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
uint32_t XMC_HRPWM_GetCMPInput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
uint32_t XMC_HRPWM_GetComparatorShadowTransferStatus (XMC_HRPWM_t *const hrpwm)
 
uint32_t XMC_HRPWM_GetHighResolutionShadowTransferStatus (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
XMC_HRPWM_HR_LOGIC_t XMC_HRPWM_GetHRGenReadyStatus (XMC_HRPWM_t *const hrpwm)
 
uint32_t XMC_HRPWM_GetRunBitStatus (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_HRC_ConfigSourceSelect0 (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_SRC_CONFIG_t *const config)
 
void XMC_HRPWM_HRC_ConfigSourceSelect1 (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_SRC_CONFIG_t *const config)
 
void XMC_HRPWM_HRC_Init (XMC_HRPWM_HRC_t *const hrc, const XMC_HRPWM_HRC_CONFIG_t *const config)
 
void XMC_HRPWM_HRC_Set_HR_Source (XMC_HRPWM_HRC_t *const hrc, XMC_HRPWM_HRC_SOURCE_t source)
 
void XMC_HRPWM_HRC_SetCompare1 (XMC_HRPWM_HRC_t *const hrc, const uint8_t cr1_value)
 
void XMC_HRPWM_HRC_SetCompare2 (XMC_HRPWM_HRC_t *const hrc, const uint8_t cr2_value)
 
void XMC_HRPWM_HRC_SetDeadTimeFalling (XMC_HRPWM_HRC_t *const hrc, uint16_t dcf_value)
 
void XMC_HRPWM_HRC_SetDeadTimeRising (XMC_HRPWM_HRC_t *const hrc, uint16_t dcr_value)
 
XMC_HRPWM_STATUS_t XMC_HRPWM_Init (XMC_HRPWM_t *const hrpwm)
 
uint32_t XMC_HRPWM_IsComparatorClamped (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
bool XMC_HRPWM_IsComparatorRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
uint32_t XMC_HRPWM_IsDacRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
uint32_t XMC_HRPWM_IsPrescalerRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
bool XMC_HRPWM_IsSlopeGenerationRunning (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_ModuleClkFreq (XMC_HRPWM_t *const hrpwm, const XMC_HRPWM_CLK_FREQ_t clk_freq)
 
void XMC_HRPWM_SetCsgPowerMode (XMC_HRPWM_t *const hrpwm, const XMC_HRPWM_CSG_SLICE_t slice, const XMC_HRPWM_CSG_POWER_MODE_t power_mode)
 
void XMC_HRPWM_StartComparator (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_StartDac (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_StartSlopeGeneration (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_StopComparator (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_StopDac (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_StopSlopeGeneration (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 
void XMC_HRPWM_UnClampComparatorOutput (XMC_HRPWM_t *const hrpwm, const uint32_t mask)
 

Detailed Description

The HRPWM extends the capabilities of the associated Capture/Compare Unit(CCU8), that simplifies the design various of SMPS. It allows easy and fast implementation of control loop, reduced total number of external components, avoid susceptibility to environmental and process variations there by reducing the size of the power supply.

Comparator Slope Generator(CSG)
HRPWM module consists 3 Comparator Slope Generator(CSG) units. Each CSG unit comprised of one High Speed Comparator, a dedicated 10 bit 30 MS/s DAC and one hardware controlled Slope Compensation module.

CSG features include:

  1. 3 High Speed Comparators, that can be use to compare an external signal against the DAC value
  2. 3 (30MS/s) 10 bit DAC
  3. 3 Slope generation blocks, that are used to generate the DAC input value
  4. different slope generations schemes, for a flexible and automated DAC voltage generation
  5. 2 DAC reference values, to allow flexible hysteretic mode control
  6. Input multiplexer for the inverting comparator input, allowing several analog inputs to be connected to each comparator and also dynamic input switching.
  7. blanking compare mode, to avoid premature switch OFF due to noise
  8. a dedicated output per Comparator
  9. programmable clock prescaler
  10. programmable clock pulse swallower for slope linearization with uneven clock scale
  11. different slope generation schemes:
    – incrementing mode
    – decrementing mode
    – triangular mode
  12. shadow transfer for one DAC reference value
  13. external trigger for the DAC
  14. external control for the DAC reference values
  15. four dedicated service request lines

High Resolution Channel unit(HRC)
It also has 4 High Resolution Channel unit(HRC) that upgrades 4 compare channels of a Capture/Compare unit (CCU8), enabling generation of PWM with 150ps resolution. ie; the rise time and/or fall time of PWM can be changed in steps of 150ps.

HRC features include:

  1. Upgrade up to 4 PWM signals of CCU8 outputs for high resolution positioning.
  2. Independent control of PWM set and reset.
  3. Delay the PWM rise time in steps of 150ps. This does not insert dead time.
  4. Extent the fall time of PWM in steps of 150ps. This does not insert dead time.
  5. Dead time insertion on complementary signals
  6. Passive level selection on outputs.

Typedef Documentation

typedef HRPWM0_CSG_Type XMC_HRPWM_CSG_t

Typedef for CSG unit registers data structure

typedef HRPWM0_HRC_Type XMC_HRPWM_HRC_t

Typedef for HRPWM high resolution channel registers data structure

typedef HRPWM0_Type XMC_HRPWM_t

Typedef for HRPWM Global registers data structure

Enumeration Type Documentation

HRPWM module clock frequency

Enumerator
XMC_HRPWM_CLK_FREQ_NONE 

No clock frequency is selected

XMC_HRPWM_CLK_FREQ_180MHZ 

Module clock frequency is 180MHz

XMC_HRPWM_CLK_FREQ_120MHZ 

Module clock frequency is 120MHz

XMC_HRPWM_CLK_FREQ_80MHZ 

Module clock frequency is 80MHz

HRPWM CSG - Slope Generation clock selection

Enumerator
XMC_HRPWM_CSG_CLK_INPUT_MCLK 

Clock for CSG is module clock

XMC_HRPWM_CSG_CLK_INPUT_ECLKA 

Clock for CSG is external clock A

XMC_HRPWM_CSG_CLK_INPUT_ECLKB 

Clock for CSG is external clock B

XMC_HRPWM_CSG_CLK_INPUT_ECLKC 

Clock for CSG is external clock C

HRPWM CSG - Configuration for Clock disable

Enumerator
XMC_HRPWM_CSG_CLK_CSG0 

CSG0 clock mask

XMC_HRPWM_CSG_CLK_CSG1 

CSG1 clock mask

XMC_HRPWM_CSG_CLK_CSG2 

CSG2 clock mask

HRPWM CSG - Comparator output filter window

Enumerator
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_2_CLK_CYCLES 

Needs to be stable for 2 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_3_CLK_CYCLES 

Needs to be stable for 3 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_4_CLK_CYCLES 

Needs to be stable for 4 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_5_CLK_CYCLES 

Needs to be stable for 5 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_6_CLK_CYCLES 

Needs to be stable for 6 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_7_CLK_CYCLES 

Needs to be stable for 7 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_8_CLK_CYCLES 

Needs to be stable for 8 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_9_CLK_CYCLES 

Needs to be stable for 9 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_10_CLK_CYCLES 

Needs to be stable for 10 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_11_CLK_CYCLES 

Needs to be stable for 11 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_12_CLK_CYCLES 

Needs to be stable for 12 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_13_CLK_CYCLES 

Needs to be stable for 13 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_14_CLK_CYCLES 

Needs to be stable for 14 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_15_CLK_CYCLES 

Needs to be stable for 15 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_16_CLK_CYCLES 

Needs to be stable for 16 clk cycles

XMC_HRPWM_CSG_CMP_FILTER_WINDOW_32_CLK_CYCLES 

Needs to be stable for 32 clk cycles

Comparator inputs

Enumerator
XMC_HRPWM_CSG_CMP_INPUT_CINA 

Input for comparator is CINA

XMC_HRPWM_CSG_CMP_INPUT_CINB 

Input for comparator is CINB

CSG comparator input switch request

Enumerator
XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP0 

Comparator 0 inverting input connection

XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP1 

Comparator 1 inverting input connection

XMC_HRPWM_CSG_CMP_INVERTING_INPUT_CMP2 

Comparator 2 inverting input connection

HRPWM CSG - Selection of edge sensitivity

Enumerator
XMC_HRPWM_CSG_EDGE_SEL_DISABLED 

Trigger event not generated

XMC_HRPWM_CSG_EDGE_SEL_RISING_EDGE 

Trigger event not generated in rising edge

XMC_HRPWM_CSG_EDGE_SEL_FALLING_EDGE 

Trigger event not generated in falling edge

XMC_HRPWM_CSG_EDGE_SEL_BOTH_EDGE 

Trigger event not generated in both edges

Input list to CSG

Enumerator
XMC_HRPWM_CSG_INPUT_SEL_IA 

Input selected for blanking or comparator switch: Input-A

XMC_HRPWM_CSG_INPUT_SEL_IB 

Input selected for blanking or comparator switch: Input-B

XMC_HRPWM_CSG_INPUT_SEL_IC 

Input selected for blanking or comparator switch: Input-C

XMC_HRPWM_CSG_INPUT_SEL_ID 

Input selected for blanking or comparator switch: Input-D

XMC_HRPWM_CSG_INPUT_SEL_IE 

Input selected for blanking or comparator switch: Input-E

XMC_HRPWM_CSG_INPUT_SEL_IF 

Input selected for blanking or comparator switch: Input-F

XMC_HRPWM_CSG_INPUT_SEL_IG 

Input selected for blanking or comparator switch: Input-G

XMC_HRPWM_CSG_INPUT_SEL_IH 

Input selected for blanking or comparator switch: Input-H

XMC_HRPWM_CSG_INPUT_SEL_II 

Input selected for blanking or comparator switch: Input-I

XMC_HRPWM_CSG_INPUT_SEL_IJ 

Input selected for blanking or comparator switch: Input-J

XMC_HRPWM_CSG_INPUT_SEL_IK 

Input selected for blanking or comparator switch: Input-K

XMC_HRPWM_CSG_INPUT_SEL_IL 

Input selected for blanking or comparator switch: Input-L

XMC_HRPWM_CSG_INPUT_SEL_IM 

Input selected for blanking or comparator switch: Input-M

XMC_HRPWM_CSG_INPUT_SEL_IN 

Input selected for blanking or comparator switch: Input-N

XMC_HRPWM_CSG_INPUT_SEL_IO 

Input selected for blanking or comparator switch: Input-O

XMC_HRPWM_CSG_INPUT_SEL_IP 

Input selected for blanking or comparator switch: Input-P

HRPWM CSG - IRQ Event Id The enum is used to access the bitfields of registers CSGySRE, CSGySRS, CSGySWS, CSGySWC, CSGyISTAT

Enumerator
XMC_HRPWM_CSG_IRQ_ID_VLS1 

Interrupt on DAC value switch from CSGyDSV1 to CSGyDSV2 interrupt

XMC_HRPWM_CSG_IRQ_ID_VLS2 

Interrupt on DAC value switch from CSGyDSV2 to CSGyDSV1 interrupt

XMC_HRPWM_CSG_IRQ_ID_TRGS 

Interrupt on DAC conversion trigger

XMC_HRPWM_CSG_IRQ_ID_STRS 

Interrupt on DAC start trigger

XMC_HRPWM_CSG_IRQ_ID_STPS 

Interrupt on DAC stop trigger

XMC_HRPWM_CSG_IRQ_ID_STD 

Interrupt on DAC shadow transfer

XMC_HRPWM_CSG_IRQ_ID_CRSE 

Interrupt on comparator output rise edge

XMC_HRPWM_CSG_IRQ_ID_CFSE 

Interrupt on comparator output fall edge

XMC_HRPWM_CSG_IRQ_ID_CSEE 

Interrupt on comparator output clamped state

HRPWM CSG - Service request line

Enumerator
XMC_HRPWM_CSG_IRQ_SR_LINE_0 

CSG - Service request SR-0

XMC_HRPWM_CSG_IRQ_SR_LINE_1 

CSG - Service request SR-1

XMC_HRPWM_CSG_IRQ_SR_LINE_2 

CSG - Service request SR-2

XMC_HRPWM_CSG_IRQ_SR_LINE_3 

CSG - Service request SR-3

HRPWM CSG - Selection of level sensitivity

Enumerator
XMC_HRPWM_CSG_LVL_SEL_DISABLED 

Level sensitivity is disabled

XMC_HRPWM_CSG_LVL_SEL_HIGH 

Level sensitivity is High

XMC_HRPWM_CSG_LVL_SEL_LOW 

Level sensitivity is Low

CSG power modes

Enumerator
XMC_HRPWM_CSG_POWER_MODE_OFF 

Comparator slope generator turned off

XMC_HRPWM_CSG_POWER_MODE_LOW_SPEED 

Comparator slope generator in low speed mode

XMC_HRPWM_CSG_POWER_MODE_HI_SPEED 

Comparator slope generator in high speed mode

Clear prescaler in CSG

Enumerator
XMC_HRPWM_CSG_PRESCALER_CLR_CSG0 

Clear prescaler of CSG0

XMC_HRPWM_CSG_PRESCALER_CLR_CSG1 

Clear prescaler of CSG1

XMC_HRPWM_CSG_PRESCALER_CLR_CSG2 

Clear prescaler of CSG2

HRPWM CSG - Slope step gain

Enumerator
XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_1 

Division by 1

XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_2 

Division by 2

XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_4 

Division by 4

XMC_HRPWM_CSG_PRESCALER_DIVISION_BY_8 

Division by 8

HRPWM CSG - Prescaler external start configuration

Enumerator
XMC_HRPWM_CSG_PRESCALER_EXT_START_IGNORE 

Prescaler operation on external start trigger is: Ignore

XMC_HRPWM_CSG_PRESCALER_EXT_START_STRT 

Prescaler operation on external start trigger is: Start prescaler

XMC_HRPWM_CSG_PRESCALER_EXT_START_CLR 

Prescaler operation on external start trigger is: Clear prescaler

XMC_HRPWM_CSG_PRESCALER_EXT_START_CLR_N_STRT 

Prescaler operation on external start trigger is: Clear & Start prescaler

HRPWM CSG - Prescaler external stop configuration

Enumerator
XMC_HRPWM_CSG_PRESCALER_EXT_STOP_IGNORE 

Prescaler operation on external stop trigger is: Ignore

XMC_HRPWM_CSG_PRESCALER_EXT_STOP_STP 

Prescaler operation on external stop trigger is: Stop prescaler

XMC_HRPWM_CSG_PRESCALER_EXT_STOP_CLR 

Prescaler operation on external stop trigger is: Clear prescaler

XMC_HRPWM_CSG_PRESCALER_EXT_STOP_CLR_N_STOP 

Prescaler operation on external stop trigger is: Clear & Stop prescaler

Prescaler start in CSG

Enumerator
XMC_HRPWM_CSG_PRESCALER_START_CSG0 

Start prescaler of CSG0

XMC_HRPWM_CSG_PRESCALER_START_CSG1 

Start prescaler of CSG1

XMC_HRPWM_CSG_PRESCALER_START_CSG2 

Start prescaler of CSG2

CSG prescaler status

Enumerator
XMC_HRPWM_CSG_PRESCALER_STATUS_CSG0 

Prescaler status in CSG0

XMC_HRPWM_CSG_PRESCALER_STATUS_CSG1 

Prescaler status in CSG1

XMC_HRPWM_CSG_PRESCALER_STATUS_CSG2 

Prescaler status in CSG2

Prescaler stop in CSG

Enumerator
XMC_HRPWM_CSG_PRESCALER_STOP_CSG0 

Stop prescaler of CSG0

XMC_HRPWM_CSG_PRESCALER_STOP_CSG1 

Stop prescaler of CSG1

XMC_HRPWM_CSG_PRESCALER_STOP_CSG2 

Stop prescaler of CSG2

DAC, Comparator start controls & Comparator clamped state control The enum is used to access the bitfields of registers CSGSETG, CSGCLRG, CSGSTATG

Enumerator
XMC_HRPWM_CSG_RUN_BIT_DAC0 

Start DAC0

XMC_HRPWM_CSG_RUN_BIT_CMP0 

Start comparator 0

XMC_HRPWM_CSG_RUN_BIT_CMP0_PSL 

Set comparator 0 output to clamped state

XMC_HRPWM_CSG_RUN_BIT_DAC1 

Start DAC1

XMC_HRPWM_CSG_RUN_BIT_CMP1 

Start comparator 1

XMC_HRPWM_CSG_RUN_BIT_CMP1_PSL 

Set comparator 1 output to clamped state

XMC_HRPWM_CSG_RUN_BIT_DAC2 

Start DAC2

XMC_HRPWM_CSG_RUN_BIT_CMP2 

Start comparator2

XMC_HRPWM_CSG_RUN_BIT_CMP2_PSL 

Set comparator 2 output to clamped state

HRPWM CSG - Slice numbers

Enumerator
XMC_HRPWM_CSG_SLICE_0 

CSG slice number is 0

XMC_HRPWM_CSG_SLICE_1 

CSG slice number is 1

XMC_HRPWM_CSG_SLICE_2 

CSG slice number is 2

HRPWM CSG - Slope Generation control mode

Enumerator
XMC_HRPWM_CSG_SLOPE_CTRL_MODE_STATIC 

Slope generation mode - Static mode

XMC_HRPWM_CSG_SLOPE_CTRL_MODE_DEC_GEN 

Slope generation mode - Decrementing slope generation

XMC_HRPWM_CSG_SLOPE_CTRL_MODE_INC_GEN 

Slope generation mode - Incrementing slope generation

XMC_HRPWM_CSG_SLOPE_CTRL_MODE_TRIANGULAR 

Slope generation mode - Triangular slope generation

HRPWM CSG - Slope Generation external start configuration

Enumerator
XMC_HRPWM_CSG_SLOPE_EXT_START_IGNORE 

Slope generation on external start trigger is: Ignore

XMC_HRPWM_CSG_SLOPE_EXT_START_STRT 

Slope generation on external start trigger is: Start/restart slope generation

XMC_HRPWM_CSG_SLOPE_EXT_START_RESUME 

Slope generation on external start trigger is: Resumes slope generation

HRPWM CGS - Slope Generation external stop configuration

Enumerator
XMC_HRPWM_CSG_SLOPE_EXT_STOP_IGNORE 

Slope generation on external stop trigger is: Ignore

XMC_HRPWM_CSG_SLOPE_EXT_STOP_STP 

Slope generation on external stop trigger is: Stops/Halts the slope generation

XMC_HRPWM_CSG_SLOPE_EXT_STOP_FREEZE 

Slope generation on external stop trigger is: Freezes slope generation & feeds constantly the value programmed in CSGyDSV2 to the DAC

Slope start for DAC units

Enumerator
XMC_HRPWM_CSG_SLOPE_START_DAC0 

Start slope generation for DAC0

XMC_HRPWM_CSG_SLOPE_START_DAC1 

Start slope generation for DAC1

XMC_HRPWM_CSG_SLOPE_START_DAC2 

Start slope generation for DAC2

HRPWM CSG - Slope step gain

Enumerator
XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_1 

slope step has an increment/decrement of 1

XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_2 

slope step has an increment/decrement of 2

XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_4 

slope step has an increment/decrement of 4

XMC_HRPWM_CSG_SLOPE_STEP_GAIN_INC_DEC_BY_8 

slope step has an increment/decrement of 8

Slope stop for DAC units

Enumerator
XMC_HRPWM_CSG_SLOPE_STOP_DAC0 

Stop slope generation for DAC0

XMC_HRPWM_CSG_SLOPE_STOP_DAC1 

Stop slope generation for DAC1

XMC_HRPWM_CSG_SLOPE_STOP_DAC2 

Stop slope generation for DAC2

CSG comparator input switch request

Enumerator
XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP0 

Request to switch the analog input connected to the comparator 0 between CINA and CINB

XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP1 

Request to switch the analog input connected to the comparator 1 between CINA and CINB

XMC_HRPWM_CSG_SWITCH_CMP_INPUT_CMP2 

Request to switch the analog input connected to the comparator 2 between CINA and CINB

HRPWM CSG - Initial DAC start mode

Enumerator
XMC_HRPWM_CSG_SWSM_DSV2_W_TRIGGER 

DSV2 is used as initial DAC value & conversion trigger is generated

XMC_HRPWM_CSG_SWSM_DSV1_W_TRIGGER 

DSV1 is used as initial DAC value & conversion trigger is generated

XMC_HRPWM_CSG_SWSM_DSV2_NO_TRIGGER 

DSV2 is used as initial DAC value & no conversion trigger generated

XMC_HRPWM_CSG_SWSM_DSV1_NO_TRIGGER 

DSV1 is used as initial DAC value & no conversion trigger generated

DAC slope generation status

Enumerator
XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC0 

Slope generation status mask for DAC0

XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC1 

Slope generation status mask for DAC1

XMC_HRPWM_DAC_SLOPE_GEN_STATUS_DAC2 

Slope generation status mask for DAC2

HRPWM function Enable / Disable status

Enumerator
XMC_HRPWM_FUNC_STATUS_DISABLE 

Function is disabled

XMC_HRPWM_FUNC_STATUS_ENABLE 

Function is enabled

HRPWM high resolution module status

Enumerator
XMC_HRPWM_HR_LOGIC_NOT_WORKING 

High resolution signal path is switched off for all HRC channels

XMC_HRPWM_HR_LOGIC_WORKING 

High resolution signal path is switched on for all HRC channels

High resolution paths for HRC channels

Enumerator
XMC_HRPWM_HR_PATH_HRC0 

HRC0 path selected for High resolution

XMC_HRPWM_HR_PATH_HRC1 

HRC1 path selected for High resolution

XMC_HRPWM_HR_PATH_HRC2 

HRC2 path selected for High resolution

XMC_HRPWM_HR_PATH_HRC3 

HRC3 path selected for High resolution

HRPWM HRC source selector - connection of source selector to which CSG unit

Enumerator
XMC_HRPWM_HRC_CMP_SEL_CSG0 

Comparator output of CSG0 selected

XMC_HRPWM_HRC_CMP_SEL_CSG1 

Comparator output of CSG1 selected

XMC_HRPWM_HRC_CMP_SEL_CSG2 

Comparator output of CSG2 selected

HRC dead time shadow transfer trigger selection

Enumerator
XMC_HRPWM_HRC_DT_TR_SEL_TIMER 

Source for shadow transfer trigger is CCU8 timer.

XMC_HRPWM_HRC_DT_TR_SEL_OVERFLOW 

Source for shadow transfer trigger is dead time timer overflow.

HRPWM HRC High Resolution mode configuration

Enumerator
XMC_HRPWM_HRC_HR_EDGE_SEL_RISING 

Rising edge high resolution signal positioning enabled

XMC_HRPWM_HRC_HR_EDGE_SEL_FALLING 

Falling edge high resolution signal positioning enabled

XMC_HRPWM_HRC_HR_EDGE_SEL_BOTH 

Both edges high resolution signal positioning enabled

XMC_HRPWM_HRC_HR_EDGE_SEL_NONE 

No high resolution signal positioning

HRPWM HRC output - Passive level

Enumerator
XMC_HRPWM_HRC_OUT_PASSIVE_LVL_LOW 

Passive low output

XMC_HRPWM_HRC_OUT_PASSIVE_LVL_HIGH 

Passive high output

Shadow transfer for HRC values The enum is used to access the bitfields of registers HRCSTRG, HRCCTRG, HRCSTSG

Enumerator
XMC_HRPWM_HRC_SHADOW_TX_HRC0_VALUE 

HRC0 shadow transfer mask for CR1 & CR2

XMC_HRPWM_HRC_SHADOW_TX_HRC0_DT_VALUE 

HRC0 shadow transfer mask for DCR & DCRF

XMC_HRPWM_HRC_SHADOW_TX_HRC1_VALUE 

HRC1 shadow transfer mask for CR1 & CR2

XMC_HRPWM_HRC_SHADOW_TX_HRC1_DT_VALUE 

HRC1 shadow transfer mask for DCR & DCRF

XMC_HRPWM_HRC_SHADOW_TX_HRC2_VALUE 

HRC2 shadow transfer mask for CR1 & CR2

XMC_HRPWM_HRC_SHADOW_TX_HRC2_DT_VALUE 

HRC2 shadow transfer mask for DCR & DCRF

XMC_HRPWM_HRC_SHADOW_TX_HRC3_VALUE 

HRC3 shadow transfer mask for CR1 & CR2

XMC_HRPWM_HRC_SHADOW_TX_HRC3_DT_VALUE 

HRC3 shadow transfer mask for DCR & DCRF

HR source selector

Enumerator
XMC_HRPWM_HRC_SOURCE_0 

High resolution source 0

XMC_HRPWM_HRC_SOURCE_1 

High resolution source 1

HR source selector edge configuration (GSEL)

Enumerator
XMC_HRPWM_HRC_SRC_EDGE_SEL_DISABLED 

source signal generation disabled

XMC_HRPWM_HRC_SRC_EDGE_SEL_RISING 

source signal generation on rising edge

XMC_HRPWM_HRC_SRC_EDGE_SEL_FALLING 

source signal generation on falling edge

XMC_HRPWM_HRC_SRC_EDGE_SEL_BOTH 

source signal generation on both edges

HRPWM HRC source selector input

Enumerator
XMC_HRPWM_HRC_SRC_INPUT_CCU 

Source selector is controlled via CCU timer signal

XMC_HRPWM_HRC_SRC_INPUT_CSG 

Source selector is controlled via CSG output signal

HRPWM HRC source selector - connection of source selector to which CCU timer

Enumerator
XMC_HRPWM_HRC_TIMER_SEL_CCU_CC0 

CCU timer 0 selected

XMC_HRPWM_HRC_TIMER_SEL_CCU_CC1 

CCU timer 1 selected

XMC_HRPWM_HRC_TIMER_SEL_CCU_CC2 

CCU timer 2 selected

XMC_HRPWM_HRC_TIMER_SEL_CCU_CC3 

CCU timer 3 selected

Low resolution paths for HRC channels.

Enumerator
XMC_HRPWM_LR_PATH_HRC0 

LRC0 path selected for Low resolution

XMC_HRPWM_LR_PATH_HRC1 

LRC0 path selected for Low resolution

XMC_HRPWM_LR_PATH_HRC2 

LRC0 path selected for Low resolution

XMC_HRPWM_LR_PATH_HRC3 

LRC0 path selected for Low resolution

HRPWM CSG - DAC shadow transfer values

Enumerator
XMC_HRPWM_SHADOW_TX_DAC0 

Shadow transfer mask for DAC0 - reference value 1 & Pulse swallow value

XMC_HRPWM_SHADOW_TX_DAC1 

Shadow transfer mask for DAC1 - reference value 1 & Pulse swallow value

XMC_HRPWM_SHADOW_TX_DAC2 

Shadow transfer mask for DAC2 - reference value 1 & Pulse swallow value

Return HRPWM driver status

Enumerator
XMC_HRPWM_STATUS_OK 

Driver successfully completed the request

XMC_HRPWM_STATUS_BUSY 

Driver busy, cannot handle request

XMC_HRPWM_STATUS_ERROR 

Driver cannot fulfill request, error occurred

Function Documentation

void XMC_HRPWM_ClampComparatorOutput ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Set the comparator output to clamp state

Sets the comparator to clamped state via software by setting CSGSETG.SC0P bit. The output of comparator is now not dependent on its inputs pins. The clamped state is defined by comparator output passive level value. Output passive level can be set to high or low.
Related APIs:
XMC_HRPWM_UnClampComparatorOutput()
XMC_HRPWM_IsComparatorClamped()
void XMC_HRPWM_ClearPreScaler ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_PRESCALER_STATUS_t to generate the mask.
Returns
None
Description

Clears the prescaler registers of DACs selected by mask

Clears the prescaler registers of DACs selected by mask, by setting CSGFCG.PS0CLR bit.
Related APIs:
XMC_HRPWM_IsPrescalerRunning()
void XMC_HRPWM_CSG_ClrEventSW ( XMC_HRPWM_CSG_t *const  csg,
XMC_HRPWM_CSG_IRQ_ID_t  event 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
eventEvent selected for software trigger.
Returns
None
Description

Cancel software request for selected event

Cancel the Event trigger request performed via software.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_GetEventStatus()
XMC_HRPWM_CSG_SetSRNode()
XMC_HRPWM_CSG_SetEventSW()
void XMC_HRPWM_CSG_DACRefValSwitchingConfig ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_INPUT_CONFIG_t *const  config 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
configPointer to configuration structure.
Returns
None
Description

Configure input selection for switching DAC value between DSV1 and DSV2.

Configure the signal used to switch DAC value between DSV1 and DSV2.
It configures the signal source, required edge or level.
void XMC_HRPWM_CSG_DisableEvent ( XMC_HRPWM_CSG_t *const  csg,
XMC_HRPWM_CSG_IRQ_ID_t  event 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
eventEvent selected for interrupt.
Returns
None
Description

Disables the interrupt

Disables the selected interrupt request which may be forwarded to service node.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_GetEventStatus()
XMC_HRPWM_CSG_SetSRNode()
void XMC_HRPWM_CSG_EnableEvent ( XMC_HRPWM_CSG_t *const  csg,
XMC_HRPWM_CSG_IRQ_ID_t  event 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
eventEvent selected for interrupt.
Returns
None
Description

Enables the interrupt

Enables the selected interrupt request which may be forwarded to service node. The enabled event may be connected to any of the four service nodes.
Related APIs:
XMC_HRPWM_CSG_DisableEvent()
XMC_HRPWM_CSG_GetEventStatus()
XMC_HRPWM_CSG_SetSRNode()
uint32_t XMC_HRPWM_CSG_GetEventStatus ( XMC_HRPWM_CSG_t *const  csg,
const uint32_t  mask 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_IRQ_ID_t to generate the input.
Returns
uint32_t
Description

Returns the bit encoded status of selected events

Checks the status of selected events. The return value is non-zero is the status is set.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_SetSRNode()
void XMC_HRPWM_CSG_Init ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_CONFIG_t *const  config 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
configPointer to configuration structure.
Returns
None
Description

Initializes the CSG channel.

This function is used to initialize the CSG channel.

These include:
1) Comparator setup.
2) DAC Configuration.
3) Slope generation configuration.
void XMC_HRPWM_CSG_SelBlankingInput ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_INPUT_CONFIG_t *const  config 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
configPointer to configuration structure.
Returns
None
Description

Configures the input signal to blank the comparator output

Configures the input signal that is used as trigger signal to blank the comparator output.
It configures the signal source, required edge or level. The comparator output is blanked and set to passive level.
void XMC_HRPWM_CSG_SelClampingInput ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_INPUT_CONFIG_t *const  config 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
configPointer to configuration structure.
Returns
None
Description

Configures the input signal to clamp the comparator output

Configures the input signal that is used as level signal to clamp the comparator output.
It configures the signal source and required level.
void XMC_HRPWM_CSG_SelSlopeGenClkInput ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_CLK_INPUT_t  input_clk 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
input_clkClock selection.
Returns
None
Description

Select the clock for slope generation

Selects the clock source used for slope generation.
These are :
module clock
external clock A
external clock B
external clock C
void XMC_HRPWM_CSG_SetCMPInput ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_CMP_INPUT_t  input 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
inputInput to comparator. Use the enum type XMC_HRPWM_CSG_CMP_INPUT_t to generate the input.
Returns
None
Description

Configures the input connection to inverting pin of comparator

Selects the HW pin that gets connected to inverting pin of comparator.
Either CINA or CINB can be set. The non-inverting pin is connected to DAC output.
Related APIs:
XMC_HRPWM_GetCMPInput()
void XMC_HRPWM_CSG_SetEventSW ( XMC_HRPWM_CSG_t *const  csg,
XMC_HRPWM_CSG_IRQ_ID_t  event 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
eventEvent selected for software trigger.
Returns
None
Description

Software request for selected event

Perform a software request for selected event.This overrides any hardware trigger.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_GetEventStatus()
XMC_HRPWM_CSG_SetSRNode()
XMC_HRPWM_CSG_ClrEventSW()
void XMC_HRPWM_CSG_SetSRNode ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_IRQ_ID_t  event,
const XMC_HRPWM_CSG_IRQ_SR_LINE_t  sr 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
eventEvent selected for interrupt.
srService request node.
Returns
None
Description

Connects the interrupt request to serve node

Enables the connection between interrupt request and serve node.
Each event may be connected to any of four service node available. Each event/interrupt needs to be enabled individually.
Related APIs:
XMC_HRPWM_CSG_EnableEvent()
XMC_HRPWM_CSG_GetEventStatus()
void XMC_HRPWM_CSG_StartSlopeGenConfig ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_INPUT_CONFIG_t *const  config 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
configPointer to configuration structure.
Returns
None
Description

Configures the input signal to start the DAC slope generation

Configures the input signal that is used as trigger signal to start the slope generation.
It configures the signal source, required edge or level.
Related APIs:
XMC_HRPWM_CSG_StopSlopeGenConfig()
void XMC_HRPWM_CSG_StopSlopeGenConfig ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_INPUT_CONFIG_t *const  config 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
configPointer to configuration structure.
Returns
None
Description

Configures the input signal to stop the DAC slope generation

Configures the input that is used as trigger signal to stop the slope generation.
It configures the signal source, required edge or level.
Related APIs:
XMC_HRPWM_CSG_StartSlopeGenConfig()
void XMC_HRPWM_CSG_TriggerDACConvConfig ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_INPUT_CONFIG_t *const  config 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
configPointer to configuration structure.
Returns
None
Description

Configures the input signal to trigger the DAC conversion

Configures the input signal that is used as trigger signal to perform the DAC conversion.
It configures the signal source, required edge or level.
This is used when DAC is configured in static mode.
void XMC_HRPWM_CSG_TriggerShadowXferConfig ( XMC_HRPWM_CSG_t *const  csg,
const XMC_HRPWM_CSG_INPUT_CONFIG_t *const  config 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
configPointer to configuration structure.
Returns
None
Description

Configure input selection for triggering shadow transfer

Configure the signal used to triggering shadow transfer.
It configures the signal source, required edge or level.
void XMC_HRPWM_CSG_UpdateBlankingValue ( XMC_HRPWM_CSG_t *const  csg,
uint8_t  value 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
valueValue to be written to blanking register.
Returns
None
Description

Updates the BLV register

Updates the blanking register.
Note BLV register does not have shadow register.
void XMC_HRPWM_CSG_UpdateDACPrescaler ( XMC_HRPWM_CSG_t *const  csg,
XMC_HRPWM_CSG_PRESCALER_DIVISION_t  div_value 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
div_valuePrescaler value.
Returns
None
Description

Updates the prescaler value of slope generation

Updates the prescaler value of slope generation by setting SC.PSV The rate of DAC value update is determined by prescaler.
Related APIs:
XMC_HRPWM_CSG_UpdateDACStepGain()
void XMC_HRPWM_CSG_UpdateDACRefDSV1 ( XMC_HRPWM_CSG_t *const  csg,
uint32_t  value 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
valueValue to be written to DSV1 shadow register.
Returns
None
Description

Updates the DSV1 shadow register

Update the DSV1 shadow register.
Call the shadow transfer update API. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_CSG_UpdateDACRefDSV2()
void XMC_HRPWM_CSG_UpdateDACRefDSV2 ( XMC_HRPWM_CSG_t *const  csg,
uint32_t  value 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
valueValue to be written to DSV2 register.
Returns
None
Description

Updates the DSV2 register

Updates the DSV2 register.
Note DSV2 register does not have shadow register.
Related APIs:
XMC_HRPWM_CSG_UpdateDACRefDSV1()
void XMC_HRPWM_CSG_UpdateDACStepGain ( XMC_HRPWM_CSG_t *const  csg,
XMC_HRPWM_CSG_SLOPE_STEP_GAIN_t  gain 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
gainGain value.
Returns
None
Description

Updates the gain value of slope generation

Updates the gain value of slope generation by setting SC.GCFG bits. The value by which DAC increments/decrements is determined by the step gain.
Related APIs:
XMC_HRPWM_CSG_UpdateDACPrescaler()
void XMC_HRPWM_CSG_UpdateFilterWindow ( XMC_HRPWM_CSG_t *const  csg,
XMC_HRPWM_CSG_CMP_FILTER_WINDOW_t  window 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
windowSize of filter window.
Returns
None
Description

Updates the filter window size

Updates the filter window size used for pulse swallowing, in slope generation.
This value is used in slope generation when filter window is enabled. A certain no of clock pulses in the filter window are swallowed and applied to slope generation. The pulse swallowed are determined by "Pulse swallow value"
Related APIs:
XMC_HRPWM_CSG_UpdatePulseClk()
void XMC_HRPWM_CSG_UpdatePulseClk ( XMC_HRPWM_CSG_t *const  csg,
uint32_t  value 
)
Parameters
csgConstant pointer to XMC_HRPWM_CSG_t, pointing to the CSG channel base address
valueNo of clock pulses to be swallowed in the filter window.
Returns
None
Description

Updates the no of clock pulses to be swallowed in the filter window

Update the pulse swallow value.
This value is used in slope generation when filter window is enabled for slope generation. No of clock pulse swallow is determined by this value.
Related APIs:
XMC_HRPWM_CSG_UpdateFilterWindow()
void XMC_HRPWM_DisableBias ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Disables the bias generation

Disables the bias generation of high resolution generation by clearing HRBSC.HRBE bit.
Related APIs:
XMC_HRPWM_EnableBias()
void XMC_HRPWM_DisableComparatorShadowTransfer ( XMC_HRPWM_t *const  hrpwm,
uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_SHADOW_TX_DAC_t to generate the mask.
Returns
None
Description

Cancels the shadow transfer of DSV1 and pulse swallow registers

Cancels the shadow transfer of DSV1 and pulse swallow registers by setting CSGTRC.D0SEC bit. The transfer request is canceled. Needs to be called before the next shadow transfer trigger.
Related APIs:
XMC_HRPWM_EnableComparatorShadowTransfer()
XMC_HRPWM_GetComparatorShadowTransferStatus()
void XMC_HRPWM_DisableCsgClock ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_CLK_t to generate the mask.
Returns
None
Description

Disables the clock of selected CSG subunits

Disables the clock of selected CSG subunits by setting the CSGCFG.C0CD bit.
Related APIs:
void XMC_HRPWM_DisableGlobalHR ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Disable global high resolution generation

Disables global high resolution generation by clearing GLBANA.GHREN bit.
Related APIs:
XMC_HRPWM_EnableGlobalHR()
void XMC_HRPWM_DisableHighResolutionPath ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected HRC modules. Use the enum type XMC_HRPWM_HR_PATH_t to generate the mask.
Returns
None
Description

Disables the high resolution path

Disables the high resolution path determined by passed mask value, by clearing HRCCFG.HRC0E bit.
Related APIs:
XMC_HRPWM_EnableHighResolutionPath()
XMC_HRPWM_EnableLowResolutionPath()
XMC_HRPWM_DisableLowResolutionPath()
void XMC_HRPWM_DisableHighResolutionShadowTransfer ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected HRC modules. Use the enum type XMC_HRPWM_HRC_SHADOW_TX_t to generate the mask.
Returns
None
Description

Disables the high resolution shadow transfer

Disables the high resolution shadow transfer determined by passed mask value, by setting HRCCTRG.H0EC, HRCCTRG.H0DEC bits. It cancels shadow transfer request by XMC_HRPWM_EnableHighResolutionShadowTransfer(), provided the shadow transfer has not occurred.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
void XMC_HRPWM_DisableHRPowerMode ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Turns OFF the power to all HR and LR path

Turns OFF the power to all HR and LR path by clearing HRCCFG.HRCPM bit. This disables all HR and LR paths.
Related APIs:
XMC_HRPWM_EnableHRPowerMode()
void XMC_HRPWM_DisableLowResolutionPath ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected HRC modules. Use the enum type XMC_HRPWM_LR_PATH_t to generate the mask.
Returns
None
Description

Disables the low resolution path

Disables the low resolution path determined by passed mask value, by clearing HRCCFG.LRC0E bit.
Related APIs:
XMC_HRPWM_EnableHighResolutionPath()
XMC_HRPWM_DisableHighResolutionPath()
XMC_HRPWM_EnableLowResolutionPath()
void XMC_HRPWM_EnableBias ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Enables the bias generation

Enables the bias generation of high resolution generation by setting HRBSC.HRBE bit.
Related APIs:
XMC_HRPWM_DisableBias()
void XMC_HRPWM_EnableComparatorShadowTransfer ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected HRC modules. Use the enum type XMC_HRPWM_SHADOW_TX_DAC_t to generate the mask.
Returns
None
Description

Enables the shadow transfer of DSV1 and pulse swallow registers of DACs selected by mask

Enables the shadow transfer of DSV1 and pulse swallow registers of DACs selected by mask by setting CSGTRG.D0SES bit. The transfer is done at the next shadow transfer trigger.
Related APIs:
XMC_HRPWM_DisableComparatorShadowTransfer()
XMC_HRPWM_GetComparatorShadowTransferStatus()
void XMC_HRPWM_EnableGlobalHR ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Enable global high resolution generation

Enables global high resolution generation by setting GLBANA.GHREN bit.
Related APIs:
XMC_HRPWM_DisableGlobalHR()
void XMC_HRPWM_EnableHighResolutionPath ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected HRC modules. Use the enum type XMC_HRPWM_HR_PATH_t to generate the mask.
Returns
None
Description

Enables the high resolution path.

Enables the high resolution path determined by passed mask value, by setting HRCCFG.HRC0E bit. By default signals from source selector 0 are linked to HR path and signals from source selector 1 are linked to LR path. This connections can be reversed at runtime, if bit HRCySC.ST is set to 1.
Related APIs:
XMC_HRPWM_HRC_Set_HR_Source()
XMC_HRPWM_DisableHighResolutionPath()
XMC_HRPWM_EnableLowResolutionPath()
XMC_HRPWM_DisableLowResolutionPath()
XMC_HRPWM_EnableHRPowerMode()
void XMC_HRPWM_EnableHighResolutionShadowTransfer ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected HRC modules. Use the enum type XMC_HRPWM_HRC_SHADOW_TX_t to generate the mask.
Returns
None
Description

Enables the high resolution shadow transfer

Enables the high resolution shadow transfer determined by passed mask value, by setting HRCSTRG.H0ES, HRCSTRG.H0DES bits. The input for trigger for shadow transfer needs to be configured correctly.
Related APIs:
XMC_HRPWM_DisableHighResolutionShadowTransfer()
XMC_HRPWM_GetHighResolutionShadowTransferStatus()
void XMC_HRPWM_EnableHRPowerMode ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
None
Description

Turns ON the power to all HR and LR path

Turns ON the power to all HR and LR path by setting HRCCFG.HRCPM bit. Enable the HR and LR paths as per requirement by calling following API XMC_HRPWM_EnableHighResolutionPath() and XMC_HRPWM_EnableLowResolutionPath().
Related APIs:
XMC_HRPWM_EnableHighResolutionPath()
XMC_HRPWM_EnableLowResolutionPath()
void XMC_HRPWM_EnableLowResolutionPath ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected HRC modules. Use the enum type XMC_HRPWM_LR_PATH_t to generate the mask.
Returns
None
Description

Enables the low resolution path

Enables the low resolution path determined by passed mask value, by setting HRCCFG.LRC0E bit. By default signals from source selector 0 are linked to HR path and signals from source selector 1 are linked to LR path. This connections can be reversed at runtime, if bit HRCySC.ST is set to 1.
Related APIs:
XMC_HRPWM_HRC_Set_HR_Source()
XMC_HRPWM_EnableHighResolutionPath()
XMC_HRPWM_DisableHighResolutionPath()
XMC_HRPWM_DisableLowResolutionPath()
XMC_HRPWM_EnableHRPowerMode()
uint32_t XMC_HRPWM_GetCMPInput ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_SWITCH_CMP_INPUT_t to generate the mask.
Returns
uint32_t
Description

Returns the bit encoded status of HW pin connected to comparator inverting pin

Returns the bit encoded status of HW pin connected to comparator inverting pin by checking CSGTRSG.SW0ST bit. The bit position is set to 1 if CINB is connected, else its CINA.
Related APIs:
XMC_HRPWM_CSG_SetCMPInput()
uint32_t XMC_HRPWM_GetComparatorShadowTransferStatus ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
uint32_t
Description

Gets the shadow transfer status of DSV1 and pulse swallow registers of all the DACs

Gets the shadow transfer status of DSV1 and pulse swallow registers of all the DACs by checking the register CSGTRSG The return value is not zero if shadow transfer has been requested, but is still pending completion.
Related APIs:
XMC_HRPWM_EnableComparatorShadowTransfer()
XMC_HRPWM_DisableComparatorShadowTransfer()
uint32_t XMC_HRPWM_GetHighResolutionShadowTransferStatus ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected HRC modules. Use the enum type XMC_HRPWM_HRC_SHADOW_TX_t to generate the mask.
Returns
uint32_t
Description

Returns the shadow transfer request status

Returns the shadow transfer request status, by checking HRCSTSG.H0STE, HRCSTSG.H0DSTE bits. Returns a non zero value if corresponding shadow transfer request has been performed.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HR_LOGIC_t XMC_HRPWM_GetHRGenReadyStatus ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
XMC_HRPWM_HR_LOGIC_t
Description

Returns the status of the high resolution logic.

Returns status of the high resolution logic by checking HRGHRS.HRGR bit. The return value should be XMC_HRPWM_HR_LOGIC_WORKING for proper generation of high resolution signal positioning.
uint32_t XMC_HRPWM_GetRunBitStatus ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
uint32_t
Description

Returns bit encoded status of multiple DACs and Comparators, defined by the mask.

Returns bit encoded status of multiple DACs and Comparators from register CSGSTATG, defined by the mask. The mask is generated by bitwise ORing multiple Enums.
mask = (uint32_t) (XMC_HRPWM_CSG_RUN_BIT_CMP0 | XMC_HRPWM_CSG_RUN_BIT_DAC0 | XMC_HRPWM_CSG_RUN_BIT_CMP0_PSL);
Related APIs:
XMC_HRPWM_IsDacRunning()
XMC_HRPWM_IsComparatorClamped()
void XMC_HRPWM_HRC_ConfigSourceSelect0 ( XMC_HRPWM_HRC_t *const  hrc,
const XMC_HRPWM_HRC_SRC_CONFIG_t *const  config 
)
Parameters
hrcConstant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
configPointer to configuration structure.
Returns
None
Description

Initializes the source 0 of HRC channel.

Initialize the source 0 functionality of HRC channel.
This include:
1) general configuration for source 0 HRC channel.
2) Configuration of which inputs are being used to generate the set and clear for the latch and therefore controlling the generation of the output PWM signal.
3) Configuration for which timer from the Capture/Compare Unit is used for the Source Selector 0 and Source Selector 1.
Related APIs:
XMC_HRPWM_HRC_ConfigSourceSelect1()
void XMC_HRPWM_HRC_ConfigSourceSelect1 ( XMC_HRPWM_HRC_t *const  hrc,
const XMC_HRPWM_HRC_SRC_CONFIG_t *const  config 
)
Parameters
hrcConstant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
configPointer to configuration structure.
Returns
None
Description

Initializes the source 1 of HRC channel.

Initialize the source 1 functionality of HRC channel.

This include:
1) general configuration for source 1 HRC channel.
2) Configuration of which inputs are being used to generate the set and clear for the latch and therefore controlling the generation of the output PWM signal.
3) Configuration for which timer from the Capture/Compare Unit is used for the Source Selector 0 and Source Selector 1.
Related APIs:
XMC_HRPWM_HRC_ConfigSourceSelect0()
void XMC_HRPWM_HRC_Init ( XMC_HRPWM_HRC_t *const  hrc,
const XMC_HRPWM_HRC_CONFIG_t *const  config 
)
Parameters
hrcConstant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
configPointer to configuration structure.
Returns
None
Description

Initializes the HRC channel.

Initializes the HRC channel functionality.
These include:
1) Dead time configuration.
3) Trap Configuration.
4) Shadow transfer configuration.
5) Output inversion configuration.
6) Passive levels of HRC outputs.
void XMC_HRPWM_HRC_Set_HR_Source ( XMC_HRPWM_HRC_t *const  hrc,
XMC_HRPWM_HRC_SOURCE_t  source 
)
Parameters
hrcConstant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
sourceSource connected to high resolution channel.
Returns
None
Description

Sets the source to high resolution channel

Sets the shadow transfer register deciding the source connected to high resolution channel. This also affects the CCU8 timer used for linking shadow transfer trigger. Call the shadow transfer update API. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
void XMC_HRPWM_HRC_SetCompare1 ( XMC_HRPWM_HRC_t *const  hrc,
const uint8_t  cr1_value 
)
Parameters
hrcConstant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
cr1_valuehigh resolution positioning value.
Returns
None
Description

Sets the shadow transfer register of high resolution positioning for rising edge

Call the shadow transfer update API for transfer to CR1 register. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HRC_SetCompare2()
void XMC_HRPWM_HRC_SetCompare2 ( XMC_HRPWM_HRC_t *const  hrc,
const uint8_t  cr2_value 
)
Parameters
hrcConstant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
cr2_valuehigh resolution positioning value.
Returns
None
Description

Sets the shadow transfer register of high resolution positioning for falling edge

Call the shadow transfer update API for transfer to CR2 register. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HRC_SetCompare1()
void XMC_HRPWM_HRC_SetDeadTimeFalling ( XMC_HRPWM_HRC_t *const  hrc,
uint16_t  dcf_value 
)
Parameters
hrcConstant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
dcf_valueFalling edge dead time value.
Returns
None
Description

Sets the shadow transfer register of falling edge dead time.

Call the shadow transfer update API for transfer to DCR register. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HRC_SetDeadTimeRising()
void XMC_HRPWM_HRC_SetDeadTimeRising ( XMC_HRPWM_HRC_t *const  hrc,
uint16_t  dcr_value 
)
Parameters
hrcConstant pointer to XMC_HRPWM_HRC_t, pointing to the HRC channel base address
dcr_valueRising edge dead time value.
Returns
None
Description

Sets the shadow transfer register of rising edge dead time.

Call the shadow transfer update API for transfer to DCR register. A shadow transfer request in corresponding CCU8 slice may also be required.
Related APIs:
XMC_HRPWM_EnableHighResolutionShadowTransfer()
XMC_HRPWM_HRC_SetDeadTimeFalling()
XMC_HRPWM_STATUS_t XMC_HRPWM_Init ( XMC_HRPWM_t *const  hrpwm)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
Returns
XMC_HRPWM_STATUS_t
Description

HRPWM Init

This function initializes the HRPWM global registers. It configures the CSG trimming data. This is the first function that needs to be called in initializing HRC or CSG modules.
Related APIs:
XMC_SDMMC_TriggerEvent()


uint32_t XMC_HRPWM_IsComparatorClamped ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
uint32_t
Description

Checks if comparator is in clamped state

Checks if comparator is in clamped state by checking CSGSTATG.PSLS0 bit. Returns bit encoded status if comparator is set to clamped state via software.
Related APIs:
XMC_HRPWM_ClampComparatorOutput()
XMC_HRPWM_UnClampComparatorOutput()
bool XMC_HRPWM_IsComparatorRunning ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
bool
Description

Checks if comparator is enabled

Checks if comparator is enabled by checking CSGSTATG.C0RB bit. Returns true if comparator run bit is set, else returns false.
Related APIs:
XMC_HRPWM_StartComparator()
XMC_HRPWM_StopComparator()
uint32_t XMC_HRPWM_IsDacRunning ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
uint32_t
Description

Checks if CSG DAC is operational

Checks if CSG DAC is operational by checking CSGSTATG.D0RB bit.
Related APIs:
XMC_HRPWM_StartDac()
XMC_HRPWM_StopDac()
uint32_t XMC_HRPWM_IsPrescalerRunning ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_PRESCALER_STATUS_t to generate the mask.
Returns
uint32_t
Description

Checks the prescaler status of DACs selected by mask

Checks the prescaler status of DACs selected by mask, by checking CSGFCG.P0RB bit. Returns the bit encoded status information of prescaler.
Related APIs:
XMC_HRPWM_ClearPreScaler()
XMC_HRPWM_StartSlopeGeneration()
bool XMC_HRPWM_IsSlopeGenerationRunning ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
bool
Description

Checks if Prescaler & slope generation is running

Checks if Prescaler & slope generation is running by checking CSGFSG.S0RB CSGFSG.P0RB bits. The mask is generated by bitwise ORing multiple Enums.
mask = (uint32_t) (XMC_HRPWM_CSG_SLOPE_START_DAC0 | XMC_HRPWM_CSG_PRESCALER_START_CSG0);
Related APIs:
XMC_HRPWM_StartSlopeGeneration()
XMC_HRPWM_StopSlopeGeneration()
void XMC_HRPWM_ModuleClkFreq ( XMC_HRPWM_t *const  hrpwm,
const XMC_HRPWM_CLK_FREQ_t  clk_freq 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
clk_freqThe operating clock frequency of HRPWM module. Use the enum type XMC_HRPWM_CLK_FREQ_t to generate the mask.
Returns
None
Description

Configures the clock frequency of operation of HRPWM module

Configures the clock frequency of operation of HRPWM module by configuring HRCCFG.CLKC bits. The clock is generally selected based on the device type selected.
void XMC_HRPWM_SetCsgPowerMode ( XMC_HRPWM_t *const  hrpwm,
const XMC_HRPWM_CSG_SLICE_t  slice,
const XMC_HRPWM_CSG_POWER_MODE_t  power_mode 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
sliceSlice NO.
power_modeThe mode to be put in.
Returns
None
Description

Sets the DAC in OFF, Low speed or High speed mode

Sets the DAC in OFF, Low speed or High speed mode, by setting CSGCFG.C0PM bits.
Related APIs:
void XMC_HRPWM_StartComparator ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Enables the operation of comparator

Enables the operation of comparator by setting CSGSETG.SC0R bit.
Related APIs:
XMC_HRPWM_StopComparator()
XMC_HRPWM_IsComparatorRunning()
void XMC_HRPWM_StartDac ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Enables the operation of CSG DAC

Enables the operation of CSG DAC by setting CSGSETG.SD0R bit. The DAC operation is enabled. Either the value in DSV1 or DSV2 is sent to DAC, based on configuration.
Related APIs:
XMC_HRPWM_StopDac()
XMC_HRPWM_IsDacRunning()
void XMC_HRPWM_StartSlopeGeneration ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Start the prescaler & slope generation of DAC

Start the prescaler & slope generation of DAC by setting CSGFCG.S0STR and CSGFCG.PS0STR bits. The mask is generated by bitwise ORing multiple Enums.
mask = (uint32_t) (XMC_HRPWM_CSG_SLOPE_START_DAC0 | XMC_HRPWM_CSG_PRESCALER_START_CSG0);
Related APIs:
XMC_HRPWM_StopSlopeGeneration()
XMC_HRPWM_IsSlopeGenerationRunning()
void XMC_HRPWM_StopComparator ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Disables the operation of comparator

Disables the operation of comparator by setting CSGCLRG.CC0R bit.
Related APIs:
XMC_HRPWM_StartComparator()
XMC_HRPWM_IsComparatorRunning()
void XMC_HRPWM_StopDac ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Disables the operation of CSG DAC

Disables the operation of CSG DAC by setting CSGCLRG.CD0R bit.
Related APIs:
XMC_HRPWM_StartDac()
XMC_HRPWM_IsDacRunning()
void XMC_HRPWM_StopSlopeGeneration ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Stops the prescaler & slope generation of DAC

Stops the prescaler & slope generation of DAC by setting CSGFCG.S0STP and CSGFCG.PS0STP bits. The mask is generated by bitwise ORing multiple Enums.
mask = (uint32_t) (XMC_HRPWM_CSG_SLOPE_START_DAC0 | XMC_HRPWM_CSG_PRESCALER_START_CSG0);
Related APIs:
XMC_HRPWM_StartSlopeGeneration()
XMC_HRPWM_IsSlopeGenerationRunning()
void XMC_HRPWM_UnClampComparatorOutput ( XMC_HRPWM_t *const  hrpwm,
const uint32_t  mask 
)
Parameters
hrpwmConstant pointer to XMC_HRPWM_t, pointing to the HRPWM module base address
maskmasked values of selected CSG modules. Use the enum type XMC_HRPWM_CSG_RUN_BIT_t to generate the mask.
Returns
None
Description

Clear the comparator output from clamp state

Un-clamps the output of comparator from clamped state set via software by setting CSGCLRG.CC0P bit. The output of comparator is now dependent on the inputs of comparator.
Related APIs:
XMC_HRPWM_ClampComparatorOutput()
XMC_HRPWM_IsComparatorClamped()
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