Data Structures
struct	XMC_EBU_BUS_READ_CONFIG_t

struct	XMC_EBU_BUS_WRITE_CONFIG_t

struct	XMC_EBU_CLK_CONFIG_t

struct	XMC_EBU_CONFIG_t

struct	XMC_EBU_FREE_PINS_TO_GPIO_t

struct	XMC_EBU_MODE_CONFIG_t

struct	XMC_EBU_REGION_READ_CONFIG_t

struct	XMC_EBU_REGION_t

struct	XMC_EBU_REGION_WRITE_CONFIG_t

struct	XMC_EBU_SDRAM_CONFIG_t

struct	XMC_EBU_t

Macros
#define	XMC_EBU ((XMC_EBU_t *)EBU_BASE)

Enumerations

Functions
void	XMC_EBU_AddressSelectDisable (XMC_EBU_t *const ebu, uint32_t ebu_addr_select_dis, const uint32_t ebu_region_n)

void	XMC_EBU_AddressSelectEnable (XMC_EBU_t *const ebu, uint32_t ebu_addr_select_en, const uint32_t ebu_region_n)

void	XMC_EBU_CLKDivideRatio (XMC_EBU_t *ebu, XMC_EBU_CLOCK_DIVIDE_RATIO_t clock_divide_ratio)

void	XMC_EBU_ConfigureRegion (XMC_EBU_t const ebu, const XMC_EBU_REGION_t const region)

void	XMC_EBU_ConfigureSdram (XMC_EBU_t const ebu, const XMC_EBU_SDRAM_CONFIG_t const config)

void	XMC_EBU_Disable (XMC_EBU_t *const ebu)

void	XMC_EBU_Enable (XMC_EBU_t *const ebu)

uint32_t	XMC_EBU_GetBusWriteConfStatus (XMC_EBU_t *const ebu, const XMC_EBU_BUSWCON_SELECT_t ebu_buswcon_status, const uint32_t ebu_region_n)

uint32_t	XMC_EBU_GetCLKStatus (XMC_EBU_t *const ebu, const XMC_EBU_CLK_STATUS_t clk_status)

XMC_EBU_STATUS_t	XMC_EBU_Init (XMC_EBU_t const ebu, const XMC_EBU_CONFIG_t const config)

bool	XMC_EBU_IsBusAribitrationSelected (XMC_EBU_t *const ebu)

void	XMC_EBU_SdramDisableAutomaticSelfRefresh (XMC_EBU_t *const ebu)

void	XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit (XMC_EBU_t *const ebu)

void	XMC_EBU_SdramEnableAutomaticSelfRefresh (XMC_EBU_t *const ebu)

void	XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit (XMC_EBU_t *const ebu)

uint32_t	XMC_EBU_SdramGetRefreshStatus (XMC_EBU_t *const ebu, const XMC_EBU_SDRAM_RFRSH_STATUS_t sdram_rfrsh_status)

uint32_t	XMC_EBU_SdramGetStatus (XMC_EBU_t *const ebu)

void	XMC_EBU_SdramResetSelfRefreshEntry (XMC_EBU_t *const ebu)

void	XMC_EBU_SdramResetSelfRefreshExit (XMC_EBU_t *const ebu)

void	XMC_EBU_SdramSetSelfRefreshEntry (XMC_EBU_t *const ebu)

void	XMC_EBU_SdramSetSelfRefreshExit (XMC_EBU_t *const ebu)

Detailed Description

The External Bus Unit (EBU) controls the transactions between external memories or peripheral units, and the internal memories and peripheral units. Several external device configurations are supported; e.g. Asynchronous static memories, SDRAM and various flash memory types. It supports multiple programmable address regions.

The EBU low level driver provides functions to configure and initialize the EBU hardware peripheral.

Macro Definition Documentation

#define XMC_EBU ((XMC_EBU_t *)EBU_BASE)

A convenient symbol for the EBU peripheral base address

Enumeration Type Documentation

enum XMC_EBU_ADDRESS_SELECT_t

EBU address selection

Enumerator
XMC_EBU_ADDRESS_SELECT_MEMORY_REGION_ENABLE	Memory Region Enable
XMC_EBU_ADDRESS_SELECT_ALTERNATE_REGION_ENABLE	Alternate Region Enable
XMC_EBU_ADDRESS_SELECT_MEMORY_REGION_WRITE_PROTECT	Memory Region Write Protect

enum XMC_EBU_ALE_MODE_t

EBU ALE mode

Enumerator
XMC_EBU_ALE_OUTPUT_IS_INV_ADV	Output is ADV
XMC_EBU_ALE_OUTPUT_IS_ALE	Output is ALE

enum XMC_EBU_ARB_MODE_t

EBU arbitration mode

Enumerator
XMC_EBU_ARB_MODE_NOT_SELECTED	No Bus arbitration mode selected
XMC_EBU_ARB_MODE_ARBITER_MODE	Arbiter Mode arbitration mode selected
XMC_EBU_ARB_MODE_PARTICIPANT_MODE	Participant arbitration mode selected
XMC_EBU_ARB_MODE_SOLE_MASTER_MODE	Sole Master arbitration mode selected

enum XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_t

EBU asynchronous address phase

Enumerator
XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_CLOCK_ENABLED_AT_BEGINNING_OF_ACCESS	Enabled at beginning of access
XMC_EBU_ASYNCHRONOUS_ADDRESS_PHASE_CLOCK_ENABLED_AFTER_ADDRESS_PHASE	Enabled after address phase

enum XMC_EBU_BURST_ADDRESS_WRAPPING_t

EBU burst address wrapping

Enumerator
XMC_EBU_BURST_ADDRESS_WRAPPING_DISABLED	Automatically re-aligns any non-aligned synchronous burst access
XMC_EBU_BURST_ADDRESS_WRAPPING_ENABLED	Starts any burst access at address specified by the AHB request

enum XMC_EBU_BURST_BUFFER_SYNC_MODE_t

EBU burst buffer mode

Enumerator
XMC_EBU_BURST_BUFFER_SYNC_LENGTH_SYNC_ENABLE	Burst buffer length defined by value in FETBLEN
XMC_EBU_BURST_BUFFER_SYNC_SINGLE_MODE	All data required for transaction (single burst transfer)

enum XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_t

EBU burst flash clock feedback enable/disable

Enumerator
XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_DISABLE	BFCLK feedback not used
XMC_EBU_BURST_FLASH_CLOCK_FEEDBACK_ENABLE	BFCLK feedback used

enum XMC_EBU_BURST_FLASH_CLOCK_MODE_t

EBU burst flash clock mode select

Enumerator
XMC_EBU_BURST_FLASH_CLOCK_MODE_RUN_CONTINUOSLY	Burst flash clock runs continuously
XMC_EBU_BURST_FLASH_CLOCK_MODE_DISABLED_BETWEEN_ACCESSES	Burst flash clock disabled

enum XMC_EBU_BURST_LENGTH_SYNC_t

EBU burst length for synchronous burst

Enumerator
XMC_EBU_BURST_LENGTH_SYNC_1_DATA_ACCESS	1 data access (default after reset)
XMC_EBU_BURST_LENGTH_SYNC_2_DATA_ACCESSES	2 data access
XMC_EBU_BURST_LENGTH_SYNC_4_DATA_ACCESSES	3 data access
XMC_EBU_BURST_LENGTH_SYNC_8_DATA_ACCESSES	4 data access

enum XMC_EBU_BURST_SIGNAL_SYNC_BURST_t

EBU early burst signal enable for synchronous burst

Enumerator
XMC_EBU_BURST_SIGNAL_SYNC_BURST_ADV_DELAYED	Chip select delayed
XMC_EBU_BURST_SIGNAL_SYNC_BURST_ADV_NOT_DELAYED	Chip select not delayed

enum XMC_EBU_BUSWCON_SELECT_t

EBU bus write configuration status

Enumerator
XMC_EBU_BUSWCON_SELECT_NAN_WORKAROUND	Enable flash non-array access workaround
XMC_EBU_BUSWCON_SELECT_DEVICE_ADDRESSING_MODE	Device Addressing Mode

enum XMC_EBU_BYTE_CONTROL_t

EBU byte control signal control

Enumerator
XMC_EBU_BYTE_CONTROL_FOLLOWS_CHIP_SELECT_TIMMING	Control signals follow chip select timing
XMC_EBU_BYTE_CONTROL_FOLLOWS_CONTROL_SIGNAL_TIMMING	Control signals follow control signal timing
XMC_EBU_BYTE_CONTROL_FOLLOWS_WRITE_ENABLE_SIGNAL_TIMMING	Control signals follow write enable timing

enum XMC_EBU_CLK_MODE_t

EBU clocking mode

Enumerator
XMC_EBU_CLK_MODE_ASYNCHRONOUS_TO_AHB	EBU is using standard clocking mode
XMC_EBU_CLK_MODE_SYNCHRONOUS_TO_CPU	EBU is running at AHB bus clock divided by 2

enum XMC_EBU_CLK_STATUS_t

EBU clock status

Enumerator
XMC_EBU_CLK_STATUS_DISABLE_BIT	EBU Disable Status Bit
XMC_EBU_CLK_STATUS_MODE	EBU Clocking Mode Status
XMC_EBU_CLK_STATUS_DIV2_MODE	DIV2 Clocking Mode Status
XMC_EBU_CLK_STATUS_DIV_RATIO	EBU Clock Divide Ratio Status

enum XMC_EBU_CLOCK_DIVIDE_RATIO_t

EBU clock divide ratio

Enumerator
XMC_EBU_CLOCK_DIVIDED_BY_1	Clock divided by 1
XMC_EBU_CLOCK_DIVIDED_BY_2	Clock divided by 2
XMC_EBU_CLOCK_DIVIDED_BY_3	Clock divided by 3
XMC_EBU_CLOCK_DIVIDED_BY_4	Clock divided by 4

enum XMC_EBU_DEVICE_ADDRESSING_MODE_t

EBU device addressing mode

Enumerator
XMC_EBU_DEVICE_ADDRESSING_MODE_16_BITS	Address will only be driven onto AD[15:0]
XMC_EBU_DEVICE_ADDRESSING_MODE_TWIN_16_BITS_MULTIPLEXED	Lower 16b will be driven onto A[15:0] & AD[15:0]
XMC_EBU_DEVICE_ADDRESSING_MODE_32_BITS_MULTIPLEXED	Full address driven onto A[15:0] & AD[15:0]

enum XMC_EBU_DEVICE_TYPE_t

EBU device type for region

Enumerator
XMC_EBU_DEVICE_TYPE_MUXED_ASYNCHRONOUS_TYPE	Device type muxed asynchronous
XMC_EBU_DEVICE_TYPE_MUXED_BURST_TYPE	Device type muxed burst
XMC_EBU_DEVICE_TYPE_NAND_FLASH	Device type NAND flash
XMC_EBU_DEVICE_TYPE_MUXED_CELLULAR_RAM	Device type muxed cellular RAM
XMC_EBU_DEVICE_TYPE_DEMUXED_ASYNCHRONOUS_TYPE	Device type de-muxed asynchronous
XMC_EBU_DEVICE_TYPE_DEMUXED_BURST_TYPE	Device type de-muxed burst
XMC_EBU_DEVICE_TYPE_DEMUXED_PAGE_MODE	Device type de-muxed page mode
XMC_EBU_DEVICE_TYPE_DEMUXED_CELLULAR_RAM	Device type de-muxed cellular RAM
XMC_EBU_DEVICE_TYPE_SDRAM	Device type SDRAM

enum XMC_EBU_DIV2_CLK_MODE_t

EBU DIV2 clocking mode

Enumerator
XMC_EBU_DIV2_CLK_MODE_OFF	Divider 2 clock mode OFF
XMC_EBU_DIV2_CLK_MODE_ON	Divider 2 clock mode ON

enum XMC_EBU_EARLY_CHIP_SELECT_SYNC_BURST_t

EBU early chip select for synchronous burst

Enumerator
XMC_EBU_EARLY_CHIP_SELECT_DELAYED	Chip select delayed
XMC_EBU_EARLY_CHIP_SELECT_NOT_DELAYED	Chip select not delayed

enum XMC_EBU_EXT_DATA_t

EBU extended data

Enumerator
XMC_EBU_EXT_DATA_OUTPUT_EVERY_1_BFCLK_CYCLES	External memory outputs data every BFCLK cycle
XMC_EBU_EXT_DATA_OUTPUT_EVERY_2_BFCLK_CYCLES	External memory outputs data every two BFCLK cycles
XMC_EBU_EXT_DATA_OUTPUT_EVERY_4_BFCLK_CYCLES	External memory outputs data every four BFCLK cycles
XMC_EBU_EXT_DATA_OUTPUT_EVERY_8_BFCLK_CYCLES	External memory outputs data every eight BFCLK cycles

enum XMC_EBU_FLASH_NON_ARRAY_ACCESS_t

EBU flash non-array access

Enumerator
XMC_EBU_FLASH_NON_ARRAY_ACCESS_DISNABLE	Disable non-array access
XMC_EBU_FLASH_NON_ARRAY_ACCESS_ENABLE	Enable non-array access

enum XMC_EBU_FREQ_EXT_CLK_PIN_t

EBU Frequency of external clock at pin BFCLKO

Enumerator
XMC_EBU_FREQ_EXT_CLK_PIN_EQUAL_TO_INT_CLK	Equal to INT_CLK frequency
XMC_EBU_FREQ_EXT_CLK_PIN_HALF_OF_INT_CLK	1/2 of INT_CLK frequency
XMC_EBU_FREQ_EXT_CLK_PIN_THIRD_OF_INT_CLK	1/3 of INT_CLK frequency
XMC_EBU_FREQ_EXT_CLK_PIN_QUARTER_OF_INT_CLK	1/4 of INT_CLK frequency

enum XMC_EBU_LOCK_CHIP_SELECT_t

EBU lock chip select

Enumerator
XMC_EBU_LOCK_CHIP_SELECT_DISABLED	Chip select cannot be locked
XMC_EBU_LOCK_CHIP_SELECT_ENABLED	Chip select automatically locked after a write operation

enum XMC_EBU_READ_STAGES_SYNC_t

Read single stage synchronization

Enumerator
XMC_EBU_READ_STAGES_SYNC_TWO	Two stages of synchronization used (maximum margin)
XMC_EBU_READ_STAGES_SYNC_ONE	One stage of synchronization used (minimum latency)

enum XMC_EBU_SDRAM_BURST_LENGTH_t

Number of locations can be accessed with a single command

Enumerator
XMC_EBU_SDRAM_BURST_LENGTH_1_LOCATION	One location accessed with a single command
XMC_EBU_SDRAM_BURST_LENGTH_2_LOCATION	Two location accessed with a single command
XMC_EBU_SDRAM_BURST_LENGTH_4_LOCATION	Four location accessed with a single command
XMC_EBU_SDRAM_BURST_LENGTH_8_LOCATION	Eight location accessed with a single command
XMC_EBU_SDRAM_BURST_LENGTH_16_LOCATION	Sixteen location accessed with a single command

enum XMC_EBU_SDRAM_CAS_LATENCY_t

Number of clocks between a READ command and the availability of data

Enumerator
XMC_EBU_SDRAM_CAS_LATENCY_2_CLKS	2 clocks between a READ command and the availability of data
XMC_EBU_SDRAM_CAS_LATENCY_3_CLKS	3 clocks between a READ command and the availability of data

enum XMC_EBU_SDRAM_CLK_MODE_t

EBU SDRAM clock mode select

Enumerator
XMC_EBU_SDRAM_CLK_MODE_CONTINUOUSLY_RUNS	Clock continuously running
XMC_EBU_SDRAM_CLK_MODE_DISABLED_BETWEEN_ACCESSES	Clock disabled between accesses

enum XMC_EBU_SDRAM_CLK_OUTPUT_t

EBU disable SDRAM clock output

Enumerator
XMC_EBU_SDRAM_CLK_OUTPUT_ENABLED	Clock output enabled
XMC_EBU_SDRAM_CLK_OUTPUT_DISABLED	Clock output disabled

enum XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_t

EBU mask for bank tag

Enumerator
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_21_to_20	Mask for bank tag addresses 21 to 20
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_22_to_21	Mask for bank tag addresses 22 to 21
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_23_to_22	Mask for bank tag addresses 23 to 22
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_24_to_23	Mask for bank tag addresses 24 to 23
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_25_to_24	Mask for bank tag addresses 25 to 24
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_26_to_25	Mask for bank tag addresses 26 to 25
XMC_EBU_SDRAM_MASK_FOR_BANK_TAG_ADDRESS_26	Mask for bank tag addresses 26

enum XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_t

EBU Mask for row tag

Enumerator
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_9	Mask for row tag addresses 26 to 9
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_10	Mask for row tag addresses 26 to 10
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_11	Mask for row tag addresses 26 to 11
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_12	Mask for row tag addresses 26 to 12
XMC_EBU_SDRAM_MASK_FOR_ROW_TAG_ADDRESS_26_to_13	Mask for row tag addresses 26 to 13

enum XMC_EBU_SDRAM_PWR_MODE_t

EBU power save mode used for gated clock mode

Enumerator
XMC_EBU_SDRAM_PWR_MODE_PRECHARGE_BEFORE_CLK_STOP	Precharge before clock stop
XMC_EBU_SDRAM_PWR_MODE_AUTO_PRECHARGE_BEFORE_CLK_STOP	Auto-precharge before clock stop
XMC_EBU_SDRAM_PWR_MODE_ACTIVE_PWR_DOWN	Active power down (stop clock without precharge)
XMC_EBU_SDRAM_PWR_MODE_CLK_STOP_PWR_DOWN	Clock stop power down

enum XMC_EBU_SDRAM_RFRSH_STATUS_t

SDRAM refresh status

Enumerator
XMC_EBU_SDRAM_RFRSH_STATUS_SELF_REFRESH_ENTRY_STATUS	Self refresh entry command issue successful
XMC_EBU_SDRAM_RFRSH_STATUS_SELF_REFRESH_EXIT_STATUS	Self refresh exit command issue successful

enum XMC_EBU_SDRAM_STATUS_t

EBU SDRAM status

Enumerator
XMC_EBU_SDRAM_STATUS_RX_ERROR	Detected an error when returning read data
XMC_EBU_SDRAM_STATUS_BUSY	The status of power-up initialization sequence
XMC_EBU_SDRAM_STATUS_REFRESH_ERROR	Failed previous refresh req collides with new req

enum XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_t

Number of address bits from bit 0 to be used for column address

Enumerator
XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_8_to_0	Address [8:0]
XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_9_to_0	Address [9:0]
XMC_EBU_SDRAM_WIDTH_OF_COLUMN_ADDRESS_10_to_0	Address [10:0]

enum XMC_EBU_STATUS_t

Status return values for EBU low level driver

Enumerator
XMC_EBU_STATUS_OK	Operation successful
XMC_EBU_STATUS_BUSY	Busy with a previous request
XMC_EBU_STATUS_ERROR	Operation unsuccessful

enum XMC_EBU_WAIT_CONTROL_t

EBU external wait control

Enumerator
XMC_EBU_WAIT_CONTROL_OFF	Default after reset; Wait control off
XMC_EBU_WAIT_CONTROL_SYNC_EARLY_WAIT_ASYNC_ASYNC_INPUT_AT_WAIT	SYNC: Wait for page load (Early WAIT); ASYNC: Asynchronous input at WAIT
XMC_EBU_WAIT_CONTROL_SYNC_WAIT_WITH_DATA_ASYNC_SYNC_INPUT_AT_WAIT	SYNC: Wait for page load (WAIT with data); ASYNC: Synchronous input at WAIT;
XMC_EBU_WAIT_CONTROL_SYNC_ABORT_AND_RETRY_ACCESS	SYNC: Abort and retry access;

enum XMC_EBU_WAIT_SIGNAL_POLARITY_t

EBU reversed polarity at WAIT

Enumerator
XMC_EBU_WAIT_SIGNAL_POLARITY_PIN_ACTIVE_LOW	OFF, input at WAIT pin is active low
XMC_EBU_WAIT_SIGNAL_POLARITY_PIN_ACTIVE_HIGH	Polarity reversed, input at WAIT pin is active high

Function Documentation

void XMC_EBU_AddressSelectDisable	(	XMC_EBU_t *const	ebu,
		uint32_t	ebu_addr_select_dis,
		const uint32_t	ebu_region_n
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
ebu_addr_select_dis	Choose between a memory region disable or an alternate region disable
ebu_region_n	A valid region number for which disable and protection settings configured

Returns: None

Description:: Controls the disable and protection settings of a region

: The function controls the disable and protection settings of a memory or alternate region. It configures the memory region disable, alternate region disable and the memory region write protect disable for write accesses. The bits ADDRSEL.REGENAB, ADDRSEL.ALTENAB and ADDRSEL.WPROT are configured.

Related APIs:: XMC_EBU_AddressSelectEnable()

void XMC_EBU_AddressSelectEnable	(	XMC_EBU_t *const	ebu,
		uint32_t	ebu_addr_select_en,
		const uint32_t	ebu_region_n
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
ebu_addr_select_en	Choose between a memory region enable or an alternate region enable
ebu_region_n	A valid region number for which enable and protection settings need to be configured

Returns: None

Description:: Controls the enable and protection settings of a region

: The function controls the enable and protection settings of a memory or alternate region. It configures the memory region enable, alternate region enable and the memory region's write protection. The bit-fields ADDRSEL.REGENAB, ADDRSEL.ALTENAB and ADDRSEL.WPROT are configured.

Related APIs:: XMC_EBU_AddressSelectDisable()

void XMC_EBU_CLKDivideRatio	(	XMC_EBU_t *	ebu,
		XMC_EBU_CLOCK_DIVIDE_RATIO_t	clock_divide_ratio
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
clock_divide_ratio	Structure XMC_EBU_CLOCK_DIVIDE_RATIO_t, containing the clock division factors of 1, 2, 3 and 4 respectively

Returns: None

Description:: Sets the clock divide ratio for EBU peripheral

: The function sets the CLC.EBUDIV bit-field to configure the clock divide ratio value (input clock divide by factor).

Related APIs:: XMC_EBU_Enable(), XMC_EBU_Disable() and XMC_EBU_GetCLKStatus()

void XMC_EBU_ConfigureRegion	(	XMC_EBU_t *const	ebu,
		const XMC_EBU_REGION_t *const	region
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
region	Constant pointer to a constant XMC_EBU_REGION_t structure containing the read, read timing, write and write timing configurations for a region of EBU

Returns: None

Description:: Configures the SDRAM

: The function configures the EBU region read, read timing, write and write timing parameter configuration. It also configures the region registers for read and write accesses. Please see XMC_EBU_REGION_t for more information.

void XMC_EBU_ConfigureSdram	(	XMC_EBU_t *const	ebu,
		const XMC_EBU_SDRAM_CONFIG_t *const	config
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
config	Constant pointer to a constant XMC_EBU_SDRAM_CONFIG_t structure containing the SDRAM configuration, operation mode configuration and right refresh parameters

Returns: None

Description:: Configures the SDRAM

: The function enables the SDRAM, sets SDRAM configuration parameters such as operation mode and refresh parameters. Please see XMC_EBU_SDRAM_CONFIG_t for more information.

void XMC_EBU_Disable ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Disable EBU peripheral

: The function asserts the peripheral reset. It also disables the control of the EBU.

Related APIs:: XMC_EBU_Enable(), XMC_SCU_RESET_DeassertPeripheralReset()

void XMC_EBU_Enable ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Enable EBU peripheral

: The function de-asserts the peripheral reset. The peripheral needs to be initialized. It also enables the control of the EBU.

Related APIs:: XMC_EBU_Disable(), XMC_SCU_RESET_AssertPeripheralReset()

uint32_t XMC_EBU_GetBusWriteConfStatus	(	XMC_EBU_t *const	ebu,
		const XMC_EBU_BUSWCON_SELECT_t	ebu_buswcon_status,
		const uint32_t	ebu_region_n
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
ebu_buswcon_status	Enumeration of type XMC_EBU_BUSWCON_SELECT_t, representing values for non-array access and device addressing modes.
ebu_region_n	A valid region number for which status pertaining to WRITE is required

Returns: Status Status of non-array access and device addressing mode

Description:: Gets WRITE specific status for a region

: The function gets status of the various WRITE specific settings for a region. Status for non-array access enable and device addressing mode are obtained. The status bits of the BUSWCON register are returned.

Related APIs:: XMC_EBU_ConfigureRegion()

uint32_t XMC_EBU_GetCLKStatus	(	XMC_EBU_t *const	ebu,
		const XMC_EBU_CLK_STATUS_t	clk_status
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
clk_status	Constant structure XMC_EBU_CLK_STATUS_t, containing the disable status, clock mode status, DIV2 clock mode status and clock divide ratio

Returns: Status Returns clock status, disable status, clock mode status, DIV2 clock mode status and clock divide ratio

Description:: Gets the clock status of EBU peripheral

: The function returns the clock staus of the EBU peripheral. The return value will indicate the following parameters:
1) Is EBU disabled?
2) Clocking mode
3) DIV2 clocking mode
4) Clock divide ratio

Related APIs:: XMC_EBU_Enable(), XMC_EBU_Disable() and XMC_EBU_CLKDivideRatio()

XMC_EBU_STATUS_t XMC_EBU_Init	(	XMC_EBU_t *const	ebu,
		const XMC_EBU_CONFIG_t *const	config
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
config	Constant pointer to a constant XMC_EBU_CONFIG_t structure containing the clock mode and clock configuration.

Returns: XMC_EBU_STATUS_t Always returns XMC_EBU_STATUS_OK (Only register assignment statements)

Description:: Initialize the EBU peripheral

: The function enables the EBU peripheral, configures time values for clock mode, div2 clock mode, mode configuration, SDRAM tristate, external clock, arbitration, timeout control, ALE mode and configuration to free up the allocated EBU ports for GPIO functionality (if required).

bool XMC_EBU_IsBusAribitrationSelected ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: bool Returns if the arbitration mode is selected or not

Description:: Check if arbitration mode of EBU peripheral is selected

: The bit field ARBMODE of MODCON indicates the selected arbitration mode of the EBU. The follwing are the supported arbitration modes:
1) Arbiter Mode arbitration mode
2) Participant arbitration mode
3) Sole Master arbitration mode

If any of the above modes are selected, the function returns "true". It returns false otherwise.

Related APIs:: XMC_EBU_Init()

void XMC_EBU_SdramDisableAutomaticSelfRefresh ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Resets the SDRAM automatic self refresh

: The function resets the SDRMREF.AUTOSELFR bit-field. When reset, the memory controller doesn't issue the self refresh entry command when it gives up control of the external bus. It will also not issue the self refresh exit command when it regains control of the bus.

Related APIs:: XMC_EBU_SdramEnableAutomaticSelfRefresh()

void XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Resets the SDRAM auto refresh on self refresh exit

: The function resets the SDRMREF.ARFSH bit to disable an auto refresh cycle on existing self refresh before the self refresh exit delay. No refresh will be performed.

Related APIs:: XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit()

void XMC_EBU_SdramEnableAutomaticSelfRefresh ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Sets the SDRAM automatic self refresh

: The function sets the SDRMREF.AUTOSELFR bit-field. When set, the memory controller automatically issues the self refresh entry command to all SDRAM units devices when it gives up control of the external bus. It will also automatically issue the self refresh exit command when it regains control of the bus.

Related APIs:: XMC_EBU_SdramDisableAutomaticSelfRefresh()

void XMC_EBU_SdramEnableAutoRefreshSelfRefreshExit ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Sets the SDRAM auto refresh on self refresh exit

: The function sets the SDRMREF.ARFSH bit-field to enable an auto refresh cycle on existing self refresh before the self refresh exit delay.

Related APIs:: XMC_EBU_SdramDisableAutoRefreshSelfRefreshExit()

uint32_t XMC_EBU_SdramGetRefreshStatus	(	XMC_EBU_t *const	ebu,
		const XMC_EBU_SDRAM_RFRSH_STATUS_t	sdram_rfrsh_status
	)

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address
sdram_rfrsh_status	Constant enum of type XMC_EBU_SDRAM_RFRSH_STATUS_t

Returns: Status Status of self refresh entry and exit command issue

Description:: Gets SDRAM refresh status

: The function gets SDRAM refresh status for self refresh entry/exit command successful issue. The bit-fields of SDRMREF indicate various states:
SELFRENST reflects successful issue of self refresh entry command
SELFREXST reflects successful issue of self refresh exit command

Related APIs:: XMC_EBU_SdramResetSelfRefreshEntry(), XMC_EBU_SdramResetSelfRefreshExit()

uint32_t XMC_EBU_SdramGetStatus ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: Status SDRAM error or busy states

Description:: Gets SDRAM error or busy states

: The function gets SDRAM read error, refresh error and busy states. The bit-fields of SDRSTAT indicate the various states. REFERR reflects a failed previous refresh request collision with a new request. SDRMBUSY indicates the status of power-up initialization sequence. It indicates if it is running or not running. SDERR indicates if the SDRAM controller has detected an error when returning the read data.

Related APIs:: XMC_EBU_ConfigureSdram()

void XMC_EBU_SdramResetSelfRefreshEntry ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Resets the SDRAM self refresh entry

: The function resets the SDRMREF.SELFREN bit-field to stop issuing the self refresh command to all the SDRAM units. This ensures that the SDRAM units don't go into the power down mode after the pre-charge is all done.

void XMC_EBU_SdramResetSelfRefreshExit ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Resets the SDRAM self refresh exit (Power up)

: The function resets the SDRMREF.SELFREX bit-field to stop issuing the self refresh command to all the SDRAM units connected to the bus. This ensures that the SDRAM units don't come out of the power down mode.

void XMC_EBU_SdramSetSelfRefreshEntry ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Sets the SDRAM self refresh entry

: The function sets the SDRMREF.SELFREN bit-field to issue the self refresh command to all the SDRAM units. This ensures that the SDRAM units enter the power down mode after pre-charge. The function also resets the bit SDRMREF.SELFREXST(Self refresh exit status).

void XMC_EBU_SdramSetSelfRefreshExit ( XMC_EBU_t *const ebu )

Parameters

ebu	Constant pointer to XMC_EBU_t, pointing to the EBU base address

Returns: None

Description:: Sets the SDRAM self refresh exit (Power up)

: The function sets the SDRMREF.SELFREX bit to issue the self refresh command to all the SDRAM units. This ensures that the SDRAM units come out of the power down mode. The function also resets the bit SDRMREF.SELFRENST(Self refresh entry status).

XMC Peripheral Library for XMC4000 Family: EBU

XMC Peripheral Library for XMC4000 Family

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