Timer Control Flags
[Memory map bit(fields)]
Bits for REG_TMxCNT.
More...Defines | |
| #define | TM_FREQ_SYS 0 |
| System clock timer (16.7 Mhz). | |
| #define | TM_FREQ_1 0 |
| 1 cycle/tick (16.7 Mhz) | |
| #define | TM_FREQ_64 0x0001 |
| 64 cycles/tick (262 kHz) | |
| #define | TM_FREQ_256 0x0002 |
| 256 cycles/tick (66 kHz) | |
| #define | TM_FREQ_1024 0x0003 |
| 1024 cycles/tick (16 kHz) | |
| #define | TM_CASCADE 0x0004 |
| Increment when preceding timer overflows. | |
| #define | TM_IRQ 0x0040 |
| Enable timer irq. | |
| #define | TM_ENABLE 0x0080 |
| Enable timer. | |
| #define | TM_FREQ_MASK 0x0003 |
| #define | TM_FREQ_SHIFT 0 |
| #define | TM_FREQ(n) ((n)<<TM_FREQ_SHIFT) |
Detailed Description
Bits for REG_TMxCNT.
Generated on Mon Aug 25 17:03:57 2008 for libtonc by
1.5.3