BIOS functions
[Bios Calls]
Reset functions | |
void | SoftReset (void) |
void | RegisterRamReset (u32 flags) |
Halt functions | |
void | Halt (void) |
void | Stop (void) |
void | IntrWait (u32 flagClear, u32 irq) |
void | VBlankIntrWait (void) |
Wait for the next VBlank (swi 05h). | |
Math functions | |
s32 | Div (s32 num, s32 den) |
Basic integer division (swi 06h). | |
s32 | DivArm (s32 den, s32 num) |
Basic integer division, but with switched arguments (swi 07h). | |
u32 | Sqrt (u32 num) |
Integer Square root (swi 08h). | |
s16 | ArcTan (s16 dydx) |
Arctangent of dydx (swi 08h). | |
s16 | ArcTan2 (s16 x, s16 y) |
Arctangent of a coordinate pair (swi 09h). | |
Memory copiers/fillers | |
void | CpuSet (const void *src, void *dst, u32 mode) |
Transfer via CPU in (half)word chunks. | |
void | CpuFastSet (const void *src, void *dst, u32 mode) |
A fast transfer via CPU in 32 byte chunks. | |
Rot/scale functions | |
void | ObjAffineSet (const ObjAffineSource *src, void *dst, s32 num, s32 offset) |
Sets up a simple scale-then-rotate affine transformation (swi 0Eh). | |
void | BgAffineSet (const BgAffineSource *src, BgAffineDest *dst, s32 num) |
Sets up a simple scale-then-rotate affine transformation (swi 0Eh). | |
Decompression (see GBATek for format details) | |
void | BitUnPack (const void *src, void *dst, const BUP *bup) |
void | LZ77UnCompWram (const void *src, void *dst) |
void | LZ77UnCompVram (const void *src, void *dst) |
void | HuffUnComp (const void *src, void *dst) |
void | RLUnCompWram (const void *src, void *dst) |
void | RLUnCompVram (const void *src, void *dst) |
void | Diff8bitUnFilterWram (const void *src, void *dst) |
void | Diff8bitUnFilterVram (const void *src, void *dst) |
void | Diff16bitUnFilter (const void *src, void *dst) |
Sound Functions | |
void | SoundBias (u32 bias) |
void | SoundDriverInit (void *src) |
void | SoundDriverMode (u32 mode) |
void | SoundDriverMain (void) |
void | SoundDriverVSync (void) |
void | SoundChannelClear (void) |
u32 | MidiKey2Freq (void *wa, u8 mk, u8 fp) |
void | SoundDriverVSyncOff (void) |
void | SoundDriverVSyncOn (void) |
Multiboot handshake | |
int | MultiBoot (MultiBootParam *mb, u32 mode) |
Functions | |
u32 | BiosCheckSum (void) |
Function Documentation
s16 ArcTan | ( | s16 | dydx | ) |
Arctangent of dydx (swi 08h).
- Parameters:
-
dydx Slope to get the arctangent of.
- Returns:
- Arctangent of dydx in the range <-4000h, 4000h>, corresponding to <-½π, ½π> .
- Note:
- Said to be inaccurate near the range's limits.
s16 ArcTan2 | ( | s16 | x, | |
s16 | y | |||
) |
Arctangent of a coordinate pair (swi 09h).
This is the full-circle arctan, with an angle range of [0,FFFFh].
void BgAffineSet | ( | const BgAffineSource * | src, | |
BgAffineDest * | dst, | |||
s32 | num | |||
) |
Sets up a simple scale-then-rotate affine transformation (swi 0Eh).
Uses a single ObjAffineSource struct to set up an array of affine matrices (either BG or Object) with a certain transformation. The matrix created is
sx·cos(α) | -sx·sin(α) |
sy·sin(α) | sy·cos(α) |
- Parameters:
-
src Array with scale and angle information. dst Array of affine matrices, starting at a pa element. num Number of matrices to set. offset Offset between affine elements. Use 2 for BG and 8 for object matrices.
- Note:
- Each element in src needs to be word aligned, which devkitPro doesn't do anymore by itself.
void CpuFastSet | ( | const void * | src, | |
void * | dst, | |||
u32 | mode | |||
) |
A fast transfer via CPU in 32 byte chunks.
This uses ARM's ldmia/stmia instructions to copy 8 words at a time, making it rival DMA transfers in speed. With bit 26 set it will keep the source address constant, effectively performing fills instead of copies.
- Parameters:
-
src Source address. dst Destination address. mode Number of words to transfer, and mode bits.
- Note:
- Both source and destination must be word aligned; the number of copies must be a multiple of 8.
In fill-mode (bit 26), the source is still an address, not a value.
memcpy32/16 and memset32/16 basically do the same things, but safer. Use those instead.
void CpuSet | ( | const void * | src, | |
void * | dst, | |||
u32 | mode | |||
) |
Transfer via CPU in (half)word chunks.
The default mode is 16bit copies. With bit 24 set, it copies words; with bit 26 set it will keep the source address constant, effectively performing fills instead of copies.
- Parameters:
-
src Source address. dst Destination address. mode Number of transfers, and mode bits.
- Note:
- This basically does a straightforward loop-copy, and is not particularly fast.
In fill-mode (bit 26), the source is still an address, not a value.
s32 Div | ( | s32 | num, | |
s32 | den | |||
) |
Basic integer division (swi 06h).
- Parameters:
-
num Numerator. den Denominator.
- Returns:
- num / den
- Note:
- div/0 results in an infinite loop. Try
DivSafe
instead
s32 DivArm | ( | s32 | den, | |
s32 | num | |||
) |
Basic integer division, but with switched arguments (swi 07h).
- Parameters:
-
num Numerator. den Denominator.
- Returns:
- num / den
- Note:
- div/0 results in an infinite loop.
void ObjAffineSet | ( | const ObjAffineSource * | src, | |
void * | dst, | |||
s32 | num, | |||
s32 | offset | |||
) |
Sets up a simple scale-then-rotate affine transformation (swi 0Eh).
Uses a single ObjAffineSource struct to set up an array of affine matrices (either BG or Object) with a certain transformation. The matrix created is
sx·cos(α) | -sx·sin(α) |
sy·sin(α) | sy·cos(α) |
- Parameters:
-
src Array with scale and angle information. dst Array of affine matrices, starting at a pa element. num Number of matrices to set. offset Offset between affine elements. Use 2 for BG and 8 for object matrices.
- Note:
- Each element in src needs to be word aligned, which devkitPro doesn't do anymore by itself.
void VBlankIntrWait | ( | void | ) |
Wait for the next VBlank (swi 05h).
- Note:
- Requires clearing of REG_IFBIOS bit 0 at the interrupt tonc's master interrupt handler does this for you.
Generated on Mon Aug 25 17:03:57 2008 for libtonc by
