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STM8S/A Standard Peripherals Firmware Library
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stm8s_uart3.c
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00001 /** 00002 ******************************************************************************** 00003 * @file stm8s_uart3.c 00004 * @author MCD Application Team 00005 * @version V2.2.0 00006 * @date 30-September-2014 00007 * @brief This file contains all the functions for the uart3 peripheral. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm8s_uart3.h" 00030 00031 /** @addtogroup STM8S_StdPeriph_Driver 00032 * @{ 00033 */ 00034 /* Private typedef -----------------------------------------------------------*/ 00035 /* Private define ------------------------------------------------------------*/ 00036 /* Private macro -------------------------------------------------------------*/ 00037 /* Private variables ---------------------------------------------------------*/ 00038 /* Private function prototypes -----------------------------------------------*/ 00039 00040 /* Private functions ---------------------------------------------------------*/ 00041 /* Public functions ----------------------------------------------------------*/ 00042 00043 /** @} 00044 * @addtogroup UART3_Public_Functions 00045 * @{ 00046 */ 00047 00048 /** 00049 * @brief Deinitializes the UART peripheral. 00050 * @param None 00051 * @retval None 00052 */ 00053 00054 void UART3_DeInit(void) 00055 { 00056 /* Clear the Idle Line Detected bit in the status rerister by a read 00057 to the UART3_SR register followed by a Read to the UART3_DR register */ 00058 (void) UART3->SR; 00059 (void) UART3->DR; 00060 00061 UART3->BRR2 = UART3_BRR2_RESET_VALUE; /*Set UART3_BRR2 to reset value 0x00 */ 00062 UART3->BRR1 = UART3_BRR1_RESET_VALUE; /*Set UART3_BRR1 to reset value 0x00 */ 00063 00064 UART3->CR1 = UART3_CR1_RESET_VALUE; /*Set UART3_CR1 to reset value 0x00 */ 00065 UART3->CR2 = UART3_CR2_RESET_VALUE; /*Set UART3_CR2 to reset value 0x00 */ 00066 UART3->CR3 = UART3_CR3_RESET_VALUE; /*Set UART3_CR3 to reset value 0x00 */ 00067 UART3->CR4 = UART3_CR4_RESET_VALUE; /*Set UART3_CR4 to reset value 0x00 */ 00068 UART3->CR6 = UART3_CR6_RESET_VALUE; /*Set UART3_CR6 to reset value 0x00 */ 00069 } 00070 00071 /** 00072 * @brief Initializes the UART3 according to the specified parameters. 00073 * @param BaudRate: The baudrate. 00074 * @param WordLength : This parameter can be any of 00075 * the @ref UART3_WordLength_TypeDef enumeration. 00076 * @param StopBits: This parameter can be any of the 00077 * @ref UART3_StopBits_TypeDef enumeration. 00078 * @param Parity: This parameter can be any of the 00079 * @ref UART3_Parity_TypeDef enumeration. 00080 * @param Mode: This parameter can be any of the @ref UART3_Mode_TypeDef values 00081 * @retval None 00082 */ 00083 void UART3_Init(uint32_t BaudRate, UART3_WordLength_TypeDef WordLength, 00084 UART3_StopBits_TypeDef StopBits, UART3_Parity_TypeDef Parity, 00085 UART3_Mode_TypeDef Mode) 00086 { 00087 uint8_t BRR2_1 = 0, BRR2_2 = 0; 00088 uint32_t BaudRate_Mantissa = 0, BaudRate_Mantissa100 = 0; 00089 00090 /* Check the parameters */ 00091 assert_param(IS_UART3_WORDLENGTH_OK(WordLength)); 00092 assert_param(IS_UART3_STOPBITS_OK(StopBits)); 00093 assert_param(IS_UART3_PARITY_OK(Parity)); 00094 assert_param(IS_UART3_BAUDRATE_OK(BaudRate)); 00095 assert_param(IS_UART3_MODE_OK((uint8_t)Mode)); 00096 00097 /* Clear the word length bit */ 00098 UART3->CR1 &= (uint8_t)(~UART3_CR1_M); 00099 /* Set the word length bit according to UART3_WordLength value */ 00100 UART3->CR1 |= (uint8_t)WordLength; 00101 00102 /* Clear the STOP bits */ 00103 UART3->CR3 &= (uint8_t)(~UART3_CR3_STOP); 00104 /* Set the STOP bits number according to UART3_StopBits value */ 00105 UART3->CR3 |= (uint8_t)StopBits; 00106 00107 /* Clear the Parity Control bit */ 00108 UART3->CR1 &= (uint8_t)(~(UART3_CR1_PCEN | UART3_CR1_PS)); 00109 /* Set the Parity Control bit to UART3_Parity value */ 00110 UART3->CR1 |= (uint8_t)Parity; 00111 00112 /* Clear the LSB mantissa of UART3DIV */ 00113 UART3->BRR1 &= (uint8_t)(~UART3_BRR1_DIVM); 00114 /* Clear the MSB mantissa of UART3DIV */ 00115 UART3->BRR2 &= (uint8_t)(~UART3_BRR2_DIVM); 00116 /* Clear the Fraction bits of UART3DIV */ 00117 UART3->BRR2 &= (uint8_t)(~UART3_BRR2_DIVF); 00118 00119 /* Set the UART3 BaudRates in BRR1 and BRR2 registers according to UART3_BaudRate value */ 00120 BaudRate_Mantissa = ((uint32_t)CLK_GetClockFreq() / (BaudRate << 4)); 00121 BaudRate_Mantissa100 = (((uint32_t)CLK_GetClockFreq() * 100) / (BaudRate << 4)); 00122 /* The fraction and MSB mantissa should be loaded in one step in the BRR2 register */ 00123 /* Set the fraction of UART3DIV */ 00124 BRR2_1 = (uint8_t)((uint8_t)(((BaudRate_Mantissa100 - (BaudRate_Mantissa * 100)) 00125 << 4) / 100) & (uint8_t)0x0F); 00126 BRR2_2 = (uint8_t)((BaudRate_Mantissa >> 4) & (uint8_t)0xF0); 00127 00128 UART3->BRR2 = (uint8_t)(BRR2_1 | BRR2_2); 00129 /* Set the LSB mantissa of UART3DIV */ 00130 UART3->BRR1 = (uint8_t)BaudRate_Mantissa; 00131 00132 if ((uint8_t)(Mode & UART3_MODE_TX_ENABLE)) 00133 { 00134 /* Set the Transmitter Enable bit */ 00135 UART3->CR2 |= UART3_CR2_TEN; 00136 } 00137 else 00138 { 00139 /* Clear the Transmitter Disable bit */ 00140 UART3->CR2 &= (uint8_t)(~UART3_CR2_TEN); 00141 } 00142 if ((uint8_t)(Mode & UART3_MODE_RX_ENABLE)) 00143 { 00144 /* Set the Receiver Enable bit */ 00145 UART3->CR2 |= UART3_CR2_REN; 00146 } 00147 else 00148 { 00149 /* Clear the Receiver Disable bit */ 00150 UART3->CR2 &= (uint8_t)(~UART3_CR2_REN); 00151 } 00152 } 00153 00154 /** 00155 * @brief Enable the UART1 peripheral. 00156 * @param NewState : The new state of the UART Communication. 00157 * This parameter can be any of the @ref FunctionalState enumeration. 00158 * @retval None 00159 */ 00160 void UART3_Cmd(FunctionalState NewState) 00161 { 00162 if (NewState != DISABLE) 00163 { 00164 /* UART3 Enable */ 00165 UART3->CR1 &= (uint8_t)(~UART3_CR1_UARTD); 00166 } 00167 else 00168 { 00169 /* UART3 Disable */ 00170 UART3->CR1 |= UART3_CR1_UARTD; 00171 } 00172 } 00173 00174 /** 00175 * @brief Enables or disables the specified UART3 interrupts. 00176 * @param UART3_IT specifies the UART3 interrupt sources to be enabled or disabled. 00177 * This parameter can be one of the following values: 00178 * - UART3_IT_LBDF: LIN Break detection interrupt 00179 * - UART3_IT_LHDF: LIN Break detection interrupt 00180 * - UART3_IT_TXE: Tansmit Data Register empty interrupt 00181 * - UART3_IT_TC: Transmission complete interrupt 00182 * - UART3_IT_RXNE_OR: Receive Data register not empty/Over run error interrupt 00183 * - UART3_IT_IDLE: Idle line detection interrupt 00184 * - UART3_IT_PE: Parity Error interrupt 00185 * @param NewState new state of the specified UART3 interrupts. 00186 * This parameter can be: ENABLE or DISABLE. 00187 * @retval None 00188 */ 00189 void UART3_ITConfig(UART3_IT_TypeDef UART3_IT, FunctionalState NewState) 00190 { 00191 uint8_t uartreg = 0, itpos = 0x00; 00192 00193 /* Check the parameters */ 00194 assert_param(IS_UART3_CONFIG_IT_OK(UART3_IT)); 00195 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00196 00197 /* Get the UART3 register index */ 00198 uartreg = (uint8_t)((uint16_t)UART3_IT >> 0x08); 00199 00200 /* Get the UART3 IT index */ 00201 itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART3_IT & (uint8_t)0x0F)); 00202 00203 if (NewState != DISABLE) 00204 { 00205 /* Enable the Interrupt bits according to UART3_IT mask */ 00206 if (uartreg == 0x01) 00207 { 00208 UART3->CR1 |= itpos; 00209 } 00210 else if (uartreg == 0x02) 00211 { 00212 UART3->CR2 |= itpos; 00213 } 00214 else if (uartreg == 0x03) 00215 { 00216 UART3->CR4 |= itpos; 00217 } 00218 else 00219 { 00220 UART3->CR6 |= itpos; 00221 } 00222 } 00223 else 00224 { 00225 /* Disable the interrupt bits according to UART3_IT mask */ 00226 if (uartreg == 0x01) 00227 { 00228 UART3->CR1 &= (uint8_t)(~itpos); 00229 } 00230 else if (uartreg == 0x02) 00231 { 00232 UART3->CR2 &= (uint8_t)(~itpos); 00233 } 00234 else if (uartreg == 0x03) 00235 { 00236 UART3->CR4 &= (uint8_t)(~itpos); 00237 } 00238 else 00239 { 00240 UART3->CR6 &= (uint8_t)(~itpos); 00241 } 00242 } 00243 } 00244 00245 /** 00246 * @brief Sets the UART3 LIN Break detection length. 00247 * @param UART3_LINBreakDetectionLength specifies the LIN break detection length. 00248 * This parameter can be any of the 00249 * @ref UART3_LINBreakDetectionLength_TypeDef values. 00250 * @retval None 00251 */ 00252 void UART3_LINBreakDetectionConfig(UART3_LINBreakDetectionLength_TypeDef UART3_LINBreakDetectionLength) 00253 { 00254 /* Check the parameters */ 00255 assert_param(IS_UART3_LINBREAKDETECTIONLENGTH_OK(UART3_LINBreakDetectionLength)); 00256 00257 if (UART3_LINBreakDetectionLength != UART3_LINBREAKDETECTIONLENGTH_10BITS) 00258 { 00259 UART3->CR4 |= UART3_CR4_LBDL; 00260 } 00261 else 00262 { 00263 UART3->CR4 &= ((uint8_t)~UART3_CR4_LBDL); 00264 } 00265 } 00266 00267 /** 00268 * @brief Configure the UART3 peripheral. 00269 * @param UART3_Mode specifies the LIN mode. 00270 * This parameter can be any of the @ref UART3_LinMode_TypeDef values. 00271 * @param UART3_Autosync specifies the LIN automatic resynchronization mode. 00272 * This parameter can be any of the @ref UART3_LinAutosync_TypeDef values. 00273 * @param UART3_DivUp specifies the LIN divider update method. 00274 * This parameter can be any of the @ref UART3_LinDivUp_TypeDef values. 00275 * @retval None 00276 */ 00277 void UART3_LINConfig(UART3_LinMode_TypeDef UART3_Mode, 00278 UART3_LinAutosync_TypeDef UART3_Autosync, 00279 UART3_LinDivUp_TypeDef UART3_DivUp) 00280 { 00281 /* Check the parameters */ 00282 assert_param(IS_UART3_SLAVE_OK(UART3_Mode)); 00283 assert_param(IS_UART3_AUTOSYNC_OK(UART3_Autosync)); 00284 assert_param(IS_UART3_DIVUP_OK(UART3_DivUp)); 00285 00286 if (UART3_Mode != UART3_LIN_MODE_MASTER) 00287 { 00288 UART3->CR6 |= UART3_CR6_LSLV; 00289 } 00290 else 00291 { 00292 UART3->CR6 &= ((uint8_t)~UART3_CR6_LSLV); 00293 } 00294 00295 if (UART3_Autosync != UART3_LIN_AUTOSYNC_DISABLE) 00296 { 00297 UART3->CR6 |= UART3_CR6_LASE ; 00298 } 00299 else 00300 { 00301 UART3->CR6 &= ((uint8_t)~ UART3_CR6_LASE ); 00302 } 00303 00304 if (UART3_DivUp != UART3_LIN_DIVUP_LBRR1) 00305 { 00306 UART3->CR6 |= UART3_CR6_LDUM; 00307 } 00308 else 00309 { 00310 UART3->CR6 &= ((uint8_t)~ UART3_CR6_LDUM); 00311 } 00312 } 00313 00314 /** 00315 * @brief Enables or disables the UART3 LIN mode. 00316 * @param NewState is new state of the UART3 LIN mode. 00317 * This parameter can be ENABLE or DISABLE 00318 * @retval None 00319 */ 00320 void UART3_LINCmd(FunctionalState NewState) 00321 { 00322 /* Check the parameters */ 00323 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00324 00325 if (NewState != DISABLE) 00326 { 00327 /* Enable the LIN mode by setting the LINE bit in the CR2 register */ 00328 UART3->CR3 |= UART3_CR3_LINEN; 00329 } 00330 else 00331 { 00332 /* Disable the LIN mode by clearing the LINE bit in the CR2 register */ 00333 UART3->CR3 &= ((uint8_t)~UART3_CR3_LINEN); 00334 } 00335 } 00336 00337 /** 00338 * @brief Selects the UART3 WakeUp method. 00339 * @param UART3_WakeUp: specifies the UART3 wakeup method. 00340 * This parameter can be any of the @ref UART3_WakeUp_TypeDef values. 00341 * @retval None 00342 */ 00343 void UART3_WakeUpConfig(UART3_WakeUp_TypeDef UART3_WakeUp) 00344 { 00345 /* Check the parameters */ 00346 assert_param(IS_UART3_WAKEUP_OK(UART3_WakeUp)); 00347 00348 UART3->CR1 &= ((uint8_t)~UART3_CR1_WAKE); 00349 UART3->CR1 |= (uint8_t)UART3_WakeUp; 00350 } 00351 00352 /** 00353 * @brief Determines if the UART3 is in mute mode or not. 00354 * @param NewState: new state of the UART3 mode. 00355 * This parameter can be ENABLE or DISABLE 00356 * @retval None 00357 */ 00358 void UART3_ReceiverWakeUpCmd(FunctionalState NewState) 00359 { 00360 /* Check the parameters */ 00361 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00362 00363 if (NewState != DISABLE) 00364 { 00365 /* Enable the mute mode UART3 by setting the RWU bit in the CR2 register */ 00366 UART3->CR2 |= UART3_CR2_RWU; 00367 } 00368 else 00369 { 00370 /* Disable the mute mode UART3 by clearing the RWU bit in the CR1 register */ 00371 UART3->CR2 &= ((uint8_t)~UART3_CR2_RWU); 00372 } 00373 } 00374 00375 /** 00376 * @brief Returns the most recent received data by the UART3 peripheral. 00377 * @param None 00378 * @retval Received Data 00379 */ 00380 uint8_t UART3_ReceiveData8(void) 00381 { 00382 return ((uint8_t)UART3->DR); 00383 } 00384 00385 /** 00386 * @brief Returns the most recent received data by the UART3 peripheral. 00387 * @param None 00388 * @retval Received Data 00389 */ 00390 uint16_t UART3_ReceiveData9(void) 00391 { 00392 uint16_t temp = 0; 00393 00394 temp = (uint16_t)(((uint16_t)((uint16_t)UART3->CR1 & (uint16_t)UART3_CR1_R8)) << 1); 00395 return (uint16_t)((((uint16_t)UART3->DR) | temp) & ((uint16_t)0x01FF)); 00396 } 00397 00398 /** 00399 * @brief Transmits 8 bit data through the UART3 peripheral. 00400 * @param Data the data to transmit. 00401 * @retval None 00402 */ 00403 void UART3_SendData8(uint8_t Data) 00404 { 00405 /* Transmit Data */ 00406 UART3->DR = Data; 00407 } 00408 00409 /** 00410 * @brief Transmits 9 bit data through the UART3 peripheral. 00411 * @param Data: the data to transmit. 00412 * @retval None 00413 */ 00414 void UART3_SendData9(uint16_t Data) 00415 { 00416 /* Clear the transmit data bit 8 */ 00417 UART3->CR1 &= ((uint8_t)~UART3_CR1_T8); 00418 00419 /* Write the transmit data bit [8] */ 00420 UART3->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & UART3_CR1_T8); 00421 00422 /* Write the transmit data bit [0:7] */ 00423 UART3->DR = (uint8_t)(Data); 00424 } 00425 00426 /** 00427 * @brief Transmits break characters. 00428 * @param None 00429 * @retval None 00430 */ 00431 void UART3_SendBreak(void) 00432 { 00433 UART3->CR2 |= UART3_CR2_SBK; 00434 } 00435 00436 /** 00437 * @brief Sets the address of the UART3 node. 00438 * @param UART3_Address: Indicates the address of the UART3 node. 00439 * @retval None 00440 */ 00441 void UART3_SetAddress(uint8_t UART3_Address) 00442 { 00443 /* Check the parameters */ 00444 assert_param(IS_UART3_ADDRESS_OK(UART3_Address)); 00445 00446 /* Clear the UART3 address */ 00447 UART3->CR4 &= ((uint8_t)~UART3_CR4_ADD); 00448 /* Set the UART3 address node */ 00449 UART3->CR4 |= UART3_Address; 00450 } 00451 00452 /** 00453 * @brief Checks whether the specified UART3 flag is set or not. 00454 * @param UART3_FLAG specifies the flag to check. 00455 * This parameter can be any of the @ref UART3_Flag_TypeDef enumeration. 00456 * @retval FlagStatus (SET or RESET) 00457 */ 00458 FlagStatus UART3_GetFlagStatus(UART3_Flag_TypeDef UART3_FLAG) 00459 { 00460 FlagStatus status = RESET; 00461 00462 /* Check parameters */ 00463 assert_param(IS_UART3_FLAG_OK(UART3_FLAG)); 00464 00465 /* Check the status of the specified UART3 flag*/ 00466 if (UART3_FLAG == UART3_FLAG_LBDF) 00467 { 00468 if ((UART3->CR4 & (uint8_t)UART3_FLAG) != (uint8_t)0x00) 00469 { 00470 /* UART3_FLAG is set*/ 00471 status = SET; 00472 } 00473 else 00474 { 00475 /* UART3_FLAG is reset*/ 00476 status = RESET; 00477 } 00478 } 00479 else if (UART3_FLAG == UART3_FLAG_SBK) 00480 { 00481 if ((UART3->CR2 & (uint8_t)UART3_FLAG) != (uint8_t)0x00) 00482 { 00483 /* UART3_FLAG is set*/ 00484 status = SET; 00485 } 00486 else 00487 { 00488 /* UART3_FLAG is reset*/ 00489 status = RESET; 00490 } 00491 } 00492 else if ((UART3_FLAG == UART3_FLAG_LHDF) || (UART3_FLAG == UART3_FLAG_LSF)) 00493 { 00494 if ((UART3->CR6 & (uint8_t)UART3_FLAG) != (uint8_t)0x00) 00495 { 00496 /* UART3_FLAG is set*/ 00497 status = SET; 00498 } 00499 else 00500 { 00501 /* UART3_FLAG is reset*/ 00502 status = RESET; 00503 } 00504 } 00505 else 00506 { 00507 if ((UART3->SR & (uint8_t)UART3_FLAG) != (uint8_t)0x00) 00508 { 00509 /* UART3_FLAG is set*/ 00510 status = SET; 00511 } 00512 else 00513 { 00514 /* UART3_FLAG is reset*/ 00515 status = RESET; 00516 } 00517 } 00518 00519 /* Return the UART3_FLAG status*/ 00520 return status; 00521 } 00522 00523 /** 00524 * @brief Clears the UART3 flags. 00525 * @param UART3_FLAG specifies the flag to clear 00526 * This parameter can be any combination of the following values: 00527 * - UART3_FLAG_LBDF: LIN Break detection flag. 00528 * - UART3_FLAG_LHDF: LIN Header detection flag. 00529 * - UART3_FLAG_LSF: LIN synchrone field flag. 00530 * - UART3_FLAG_RXNE: Receive data register not empty flag. 00531 * @note 00532 * - PE (Parity error), FE (Framing error), NF (Noise error), 00533 * OR (OverRun error) and IDLE (Idle line detected) flags are cleared 00534 * by software sequence: a read operation to UART3_SR register 00535 * (UART3_GetFlagStatus())followed by a read operation to UART3_DR 00536 * register(UART3_ReceiveData8() or UART3_ReceiveData9()). 00537 * 00538 * - RXNE flag can be also cleared by a read to the UART3_DR register 00539 * (UART3_ReceiveData8()or UART3_ReceiveData9()). 00540 * 00541 * - TC flag can be also cleared by software sequence: a read operation 00542 * to UART3_SR register (UART3_GetFlagStatus()) followed by a write 00543 * operation to UART3_DR register (UART3_SendData8() or UART3_SendData9()). 00544 * 00545 * - TXE flag is cleared only by a write to the UART3_DR register 00546 * (UART3_SendData8() or UART3_SendData9()). 00547 * 00548 * - SBK flag is cleared during the stop bit of break. 00549 * @retval None 00550 */ 00551 void UART3_ClearFlag(UART3_Flag_TypeDef UART3_FLAG) 00552 { 00553 /* Check the parameters */ 00554 assert_param(IS_UART3_CLEAR_FLAG_OK(UART3_FLAG)); 00555 00556 /*Clear the Receive Register Not Empty flag */ 00557 if (UART3_FLAG == UART3_FLAG_RXNE) 00558 { 00559 UART3->SR = (uint8_t)~(UART3_SR_RXNE); 00560 } 00561 /*Clear the LIN Break Detection flag */ 00562 else if (UART3_FLAG == UART3_FLAG_LBDF) 00563 { 00564 UART3->CR4 &= (uint8_t)(~UART3_CR4_LBDF); 00565 } 00566 /*Clear the LIN Header Detection Flag */ 00567 else if (UART3_FLAG == UART3_FLAG_LHDF) 00568 { 00569 UART3->CR6 &= (uint8_t)(~UART3_CR6_LHDF); 00570 } 00571 /*Clear the LIN Synch Field flag */ 00572 else 00573 { 00574 UART3->CR6 &= (uint8_t)(~UART3_CR6_LSF); 00575 } 00576 } 00577 00578 /** 00579 * @brief Checks whether the specified UART3 interrupt has occurred or not. 00580 * @param UART3_IT: Specifies the UART3 interrupt pending bit to check. 00581 * This parameter can be one of the following values: 00582 * - UART3_IT_LBDF: LIN Break detection interrupt 00583 * - UART3_IT_TXE: Tansmit Data Register empty interrupt 00584 * - UART3_IT_TC: Transmission complete interrupt 00585 * - UART3_IT_RXNE: Receive Data register not empty interrupt 00586 * - UART3_IT_IDLE: Idle line detection interrupt 00587 * - UART3_IT_OR: OverRun Error interrupt 00588 * - UART3_IT_PE: Parity Error interrupt 00589 * @retval The state of UART3_IT (SET or RESET). 00590 */ 00591 ITStatus UART3_GetITStatus(UART3_IT_TypeDef UART3_IT) 00592 { 00593 ITStatus pendingbitstatus = RESET; 00594 uint8_t itpos = 0; 00595 uint8_t itmask1 = 0; 00596 uint8_t itmask2 = 0; 00597 uint8_t enablestatus = 0; 00598 00599 /* Check parameters */ 00600 assert_param(IS_UART3_GET_IT_OK(UART3_IT)); 00601 00602 /* Get the UART3 IT index*/ 00603 itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART3_IT & (uint8_t)0x0F)); 00604 /* Get the UART3 IT index*/ 00605 itmask1 = (uint8_t)((uint8_t)UART3_IT >> (uint8_t)4); 00606 /* Set the IT mask*/ 00607 itmask2 = (uint8_t)((uint8_t)1 << itmask1); 00608 00609 /* Check the status of the specified UART3 pending bit*/ 00610 if (UART3_IT == UART3_IT_PE) 00611 { 00612 /* Get the UART3_ITPENDINGBIT enable bit status*/ 00613 enablestatus = (uint8_t)((uint8_t)UART3->CR1 & itmask2); 00614 /* Check the status of the specified UART3 interrupt*/ 00615 00616 if (((UART3->SR & itpos) != (uint8_t)0x00) && enablestatus) 00617 { 00618 /* Interrupt occurred*/ 00619 pendingbitstatus = SET; 00620 } 00621 else 00622 { 00623 /* Interrupt not occurred*/ 00624 pendingbitstatus = RESET; 00625 } 00626 } 00627 else if (UART3_IT == UART3_IT_LBDF) 00628 { 00629 /* Get the UART3_IT enable bit status*/ 00630 enablestatus = (uint8_t)((uint8_t)UART3->CR4 & itmask2); 00631 /* Check the status of the specified UART3 interrupt*/ 00632 if (((UART3->CR4 & itpos) != (uint8_t)0x00) && enablestatus) 00633 { 00634 /* Interrupt occurred*/ 00635 pendingbitstatus = SET; 00636 } 00637 else 00638 { 00639 /* Interrupt not occurred*/ 00640 pendingbitstatus = RESET; 00641 } 00642 } 00643 else if (UART3_IT == UART3_IT_LHDF) 00644 { 00645 /* Get the UART3_IT enable bit status*/ 00646 enablestatus = (uint8_t)((uint8_t)UART3->CR6 & itmask2); 00647 /* Check the status of the specified UART3 interrupt*/ 00648 if (((UART3->CR6 & itpos) != (uint8_t)0x00) && enablestatus) 00649 { 00650 /* Interrupt occurred*/ 00651 pendingbitstatus = SET; 00652 } 00653 else 00654 { 00655 /* Interrupt not occurred*/ 00656 pendingbitstatus = RESET; 00657 } 00658 } 00659 else 00660 { 00661 /* Get the UART3_IT enable bit status*/ 00662 enablestatus = (uint8_t)((uint8_t)UART3->CR2 & itmask2); 00663 /* Check the status of the specified UART3 interrupt*/ 00664 if (((UART3->SR & itpos) != (uint8_t)0x00) && enablestatus) 00665 { 00666 /* Interrupt occurred*/ 00667 pendingbitstatus = SET; 00668 } 00669 else 00670 { 00671 /* Interrupt not occurred*/ 00672 pendingbitstatus = RESET; 00673 } 00674 } 00675 /* Return the UART3_IT status*/ 00676 return pendingbitstatus; 00677 } 00678 00679 /** 00680 * @brief Clears the UART3 pending flags. 00681 * @param UART3_IT specifies the pending bit to clear 00682 * This parameter can be one of the following values: 00683 * - UART3_IT_LBDF: LIN Break detection interrupt 00684 * - UART3_IT_LHDF: LIN Header detection interrupt 00685 * - UART3_IT_RXNE: Receive Data register not empty interrupt. 00686 * 00687 * @note 00688 * - PE (Parity error), FE (Framing error), NF (Noise error), 00689 * OR (OverRun error) and IDLE (Idle line detected) pending bits are 00690 * cleared by software sequence: a read operation to UART3_SR register 00691 * (UART3_GetITStatus()) followed by a read operation to UART3_DR register 00692 * (UART3_ReceiveData8() or UART3_ReceiveData9()). 00693 * 00694 * - RXNE pending bit can be also cleared by a read to the UART3_DR register 00695 * (UART3_ReceiveData8() or UART3_ReceiveData9() ). 00696 * 00697 * - TC (Transmit complete) pending bit can be cleared by software 00698 * sequence: a read operation to UART3_SR register (UART3_GetITStatus()) 00699 * followed by a write operation to UART3_DR register 00700 * (UART3_SendData8()or UART3_SendData9()). 00701 * 00702 * - TXE pending bit is cleared only by a write to the UART3_DR register 00703 * (UART3_SendData8() or UART3_SendData9()). 00704 * @retval None 00705 */ 00706 void UART3_ClearITPendingBit(UART3_IT_TypeDef UART3_IT) 00707 { 00708 /* Check the parameters */ 00709 assert_param(IS_UART3_CLEAR_IT_OK(UART3_IT)); 00710 00711 /*Clear the Receive Register Not Empty pending bit */ 00712 if (UART3_IT == UART3_IT_RXNE) 00713 { 00714 UART3->SR = (uint8_t)~(UART3_SR_RXNE); 00715 } 00716 /*Clear the LIN Break Detection pending bit */ 00717 else if (UART3_IT == UART3_IT_LBDF) 00718 { 00719 UART3->CR4 &= (uint8_t)~(UART3_CR4_LBDF); 00720 } 00721 /*Clear the LIN Header Detection pending bit */ 00722 else 00723 { 00724 UART3->CR6 &= (uint8_t)(~UART3_CR6_LHDF); 00725 } 00726 } 00727 00728 /** 00729 * @} 00730 */ 00731 00732 /** 00733 * @} 00734 */ 00735 00736 00737 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/