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STM8S/A Standard Peripherals Firmware Library
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stm8s_uart2.c
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00001 /** 00002 ******************************************************************************** 00003 * @file stm8s_uart2.c 00004 * @author MCD Application Team 00005 * @version V2.2.0 00006 * @date 30-September-2014 00007 * @brief This file contains all the functions for the UART2 peripheral. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm8s_uart2.h" 00030 00031 /** @addtogroup STM8S_StdPeriph_Driver 00032 * @{ 00033 */ 00034 /* Private typedef -----------------------------------------------------------*/ 00035 /* Private define ------------------------------------------------------------*/ 00036 /* Private macro -------------------------------------------------------------*/ 00037 /* Private variables ---------------------------------------------------------*/ 00038 /* Private function prototypes -----------------------------------------------*/ 00039 /* Private functions ---------------------------------------------------------*/ 00040 /* Public functions ----------------------------------------------------------*/ 00041 00042 /** @} 00043 * @addtogroup UART2_Public_Functions 00044 * @{ 00045 */ 00046 00047 /** 00048 * @brief Deinitializes the UART peripheral. 00049 * @param None 00050 * @retval None 00051 */ 00052 00053 void UART2_DeInit(void) 00054 { 00055 /* Clear the Idle Line Detected bit in the status register by a read 00056 to the UART2_SR register followed by a Read to the UART2_DR register */ 00057 (void) UART2->SR; 00058 (void)UART2->DR; 00059 00060 UART2->BRR2 = UART2_BRR2_RESET_VALUE; /* Set UART2_BRR2 to reset value 0x00 */ 00061 UART2->BRR1 = UART2_BRR1_RESET_VALUE; /* Set UART2_BRR1 to reset value 0x00 */ 00062 00063 UART2->CR1 = UART2_CR1_RESET_VALUE; /* Set UART2_CR1 to reset value 0x00 */ 00064 UART2->CR2 = UART2_CR2_RESET_VALUE; /* Set UART2_CR2 to reset value 0x00 */ 00065 UART2->CR3 = UART2_CR3_RESET_VALUE; /* Set UART2_CR3 to reset value 0x00 */ 00066 UART2->CR4 = UART2_CR4_RESET_VALUE; /* Set UART2_CR4 to reset value 0x00 */ 00067 UART2->CR5 = UART2_CR5_RESET_VALUE; /* Set UART2_CR5 to reset value 0x00 */ 00068 UART2->CR6 = UART2_CR6_RESET_VALUE; /* Set UART2_CR6 to reset value 0x00 */ 00069 } 00070 00071 /** 00072 * @brief Initializes the UART2 according to the specified parameters. 00073 * @param BaudRate: The baudrate. 00074 * @param WordLength : This parameter can be any of the 00075 * @ref UART2_WordLength_TypeDef enumeration. 00076 * @param StopBits: This parameter can be any of the 00077 * @ref UART2_StopBits_TypeDef enumeration. 00078 * @param Parity: This parameter can be any of the 00079 * @ref UART2_Parity_TypeDef enumeration. 00080 * @param SyncMode: This parameter can be any of the 00081 * @ref UART2_SyncMode_TypeDef values. 00082 * @param Mode: This parameter can be any of the @ref UART2_Mode_TypeDef values 00083 * @retval None 00084 */ 00085 void UART2_Init(uint32_t BaudRate, UART2_WordLength_TypeDef WordLength, UART2_StopBits_TypeDef StopBits, UART2_Parity_TypeDef Parity, UART2_SyncMode_TypeDef SyncMode, UART2_Mode_TypeDef Mode) 00086 { 00087 uint8_t BRR2_1 = 0, BRR2_2 = 0; 00088 uint32_t BaudRate_Mantissa = 0, BaudRate_Mantissa100 = 0; 00089 00090 /* Check the parameters */ 00091 assert_param(IS_UART2_BAUDRATE_OK(BaudRate)); 00092 assert_param(IS_UART2_WORDLENGTH_OK(WordLength)); 00093 assert_param(IS_UART2_STOPBITS_OK(StopBits)); 00094 assert_param(IS_UART2_PARITY_OK(Parity)); 00095 assert_param(IS_UART2_MODE_OK((uint8_t)Mode)); 00096 assert_param(IS_UART2_SYNCMODE_OK((uint8_t)SyncMode)); 00097 00098 /* Clear the word length bit */ 00099 UART2->CR1 &= (uint8_t)(~UART2_CR1_M); 00100 /* Set the word length bit according to UART2_WordLength value */ 00101 UART2->CR1 |= (uint8_t)WordLength; 00102 00103 /* Clear the STOP bits */ 00104 UART2->CR3 &= (uint8_t)(~UART2_CR3_STOP); 00105 /* Set the STOP bits number according to UART2_StopBits value */ 00106 UART2->CR3 |= (uint8_t)StopBits; 00107 00108 /* Clear the Parity Control bit */ 00109 UART2->CR1 &= (uint8_t)(~(UART2_CR1_PCEN | UART2_CR1_PS )); 00110 /* Set the Parity Control bit to UART2_Parity value */ 00111 UART2->CR1 |= (uint8_t)Parity; 00112 00113 /* Clear the LSB mantissa of UART2DIV */ 00114 UART2->BRR1 &= (uint8_t)(~UART2_BRR1_DIVM); 00115 /* Clear the MSB mantissa of UART2DIV */ 00116 UART2->BRR2 &= (uint8_t)(~UART2_BRR2_DIVM); 00117 /* Clear the Fraction bits of UART2DIV */ 00118 UART2->BRR2 &= (uint8_t)(~UART2_BRR2_DIVF); 00119 00120 /* Set the UART2 BaudRates in BRR1 and BRR2 registers according to UART2_BaudRate value */ 00121 BaudRate_Mantissa = ((uint32_t)CLK_GetClockFreq() / (BaudRate << 4)); 00122 BaudRate_Mantissa100 = (((uint32_t)CLK_GetClockFreq() * 100) / (BaudRate << 4)); 00123 00124 /* The fraction and MSB mantissa should be loaded in one step in the BRR2 register*/ 00125 /* Set the fraction of UARTDIV */ 00126 BRR2_1 = (uint8_t)((uint8_t)(((BaudRate_Mantissa100 - (BaudRate_Mantissa * 100)) 00127 << 4) / 100) & (uint8_t)0x0F); 00128 BRR2_2 = (uint8_t)((BaudRate_Mantissa >> 4) & (uint8_t)0xF0); 00129 00130 UART2->BRR2 = (uint8_t)(BRR2_1 | BRR2_2); 00131 /* Set the LSB mantissa of UARTDIV */ 00132 UART2->BRR1 = (uint8_t)BaudRate_Mantissa; 00133 00134 /* Disable the Transmitter and Receiver before seting the LBCL, CPOL and CPHA bits */ 00135 UART2->CR2 &= (uint8_t)~(UART2_CR2_TEN | UART2_CR2_REN); 00136 /* Clear the Clock Polarity, lock Phase, Last Bit Clock pulse */ 00137 UART2->CR3 &= (uint8_t)~(UART2_CR3_CPOL | UART2_CR3_CPHA | UART2_CR3_LBCL); 00138 /* Set the Clock Polarity, lock Phase, Last Bit Clock pulse */ 00139 UART2->CR3 |= (uint8_t)((uint8_t)SyncMode & (uint8_t)(UART2_CR3_CPOL | \ 00140 UART2_CR3_CPHA | UART2_CR3_LBCL)); 00141 00142 if ((uint8_t)(Mode & UART2_MODE_TX_ENABLE)) 00143 { 00144 /* Set the Transmitter Enable bit */ 00145 UART2->CR2 |= (uint8_t)UART2_CR2_TEN; 00146 } 00147 else 00148 { 00149 /* Clear the Transmitter Disable bit */ 00150 UART2->CR2 &= (uint8_t)(~UART2_CR2_TEN); 00151 } 00152 if ((uint8_t)(Mode & UART2_MODE_RX_ENABLE)) 00153 { 00154 /* Set the Receiver Enable bit */ 00155 UART2->CR2 |= (uint8_t)UART2_CR2_REN; 00156 } 00157 else 00158 { 00159 /* Clear the Receiver Disable bit */ 00160 UART2->CR2 &= (uint8_t)(~UART2_CR2_REN); 00161 } 00162 /* Set the Clock Enable bit, lock Polarity, lock Phase and Last Bit Clock 00163 pulse bits according to UART2_Mode value */ 00164 if ((uint8_t)(SyncMode & UART2_SYNCMODE_CLOCK_DISABLE)) 00165 { 00166 /* Clear the Clock Enable bit */ 00167 UART2->CR3 &= (uint8_t)(~UART2_CR3_CKEN); 00168 } 00169 else 00170 { 00171 UART2->CR3 |= (uint8_t)((uint8_t)SyncMode & UART2_CR3_CKEN); 00172 } 00173 } 00174 00175 /** 00176 * @brief Enable the UART2 peripheral. 00177 * @param NewState : The new state of the UART Communication. 00178 * This parameter can be any of the @ref FunctionalState enumeration. 00179 * @retval None 00180 */ 00181 void UART2_Cmd(FunctionalState NewState) 00182 { 00183 if (NewState != DISABLE) 00184 { 00185 /* UART2 Enable */ 00186 UART2->CR1 &= (uint8_t)(~UART2_CR1_UARTD); 00187 } 00188 else 00189 { 00190 /* UART2 Disable */ 00191 UART2->CR1 |= UART2_CR1_UARTD; 00192 } 00193 } 00194 00195 /** 00196 * @brief Enables or disables the specified UART2 interrupts. 00197 * @param UART2_IT specifies the UART2 interrupt sources to be enabled or disabled. 00198 * This parameter can be one of the following values: 00199 * - UART2_IT_LBDF: LIN Break detection interrupt 00200 * - UART2_IT_LHDF: LIN Break detection interrupt 00201 * - UART2_IT_TXE: Tansmit Data Register empty interrupt 00202 * - UART2_IT_TC: Transmission complete interrupt 00203 * - UART2_IT_RXNE_OR: Receive Data register not empty/Over run error interrupt 00204 * - UART2_IT_IDLE: Idle line detection interrupt 00205 * - UART2_IT_PE: Parity Error interrupt 00206 * @param NewState new state of the specified UART2 interrupts. 00207 * This parameter can be: ENABLE or DISABLE. 00208 * @retval None 00209 */ 00210 void UART2_ITConfig(UART2_IT_TypeDef UART2_IT, FunctionalState NewState) 00211 { 00212 uint8_t uartreg = 0, itpos = 0x00; 00213 00214 /* Check the parameters */ 00215 assert_param(IS_UART2_CONFIG_IT_OK(UART2_IT)); 00216 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00217 00218 /* Get the UART2 register index */ 00219 uartreg = (uint8_t)((uint16_t)UART2_IT >> 0x08); 00220 00221 /* Get the UART2 IT index */ 00222 itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART2_IT & (uint8_t)0x0F)); 00223 00224 if (NewState != DISABLE) 00225 { 00226 /* Enable the Interrupt bits according to UART2_IT mask */ 00227 if (uartreg == 0x01) 00228 { 00229 UART2->CR1 |= itpos; 00230 } 00231 else if (uartreg == 0x02) 00232 { 00233 UART2->CR2 |= itpos; 00234 } 00235 else if (uartreg == 0x03) 00236 { 00237 UART2->CR4 |= itpos; 00238 } 00239 else 00240 { 00241 UART2->CR6 |= itpos; 00242 } 00243 } 00244 else 00245 { 00246 /* Disable the interrupt bits according to UART2_IT mask */ 00247 if (uartreg == 0x01) 00248 { 00249 UART2->CR1 &= (uint8_t)(~itpos); 00250 } 00251 else if (uartreg == 0x02) 00252 { 00253 UART2->CR2 &= (uint8_t)(~itpos); 00254 } 00255 else if (uartreg == 0x03) 00256 { 00257 UART2->CR4 &= (uint8_t)(~itpos); 00258 } 00259 else 00260 { 00261 UART2->CR6 &= (uint8_t)(~itpos); 00262 } 00263 } 00264 } 00265 00266 /** 00267 * @brief Configures the UART2�s IrDA interface. 00268 * @param UART2_IrDAMode specifies the IrDA mode. 00269 * This parameter can be any of the @ref UART2_IrDAMode_TypeDef values. 00270 * @retval None 00271 */ 00272 void UART2_IrDAConfig(UART2_IrDAMode_TypeDef UART2_IrDAMode) 00273 { 00274 assert_param(IS_UART2_IRDAMODE_OK(UART2_IrDAMode)); 00275 00276 if (UART2_IrDAMode != UART2_IRDAMODE_NORMAL) 00277 { 00278 UART2->CR5 |= UART2_CR5_IRLP; 00279 } 00280 else 00281 { 00282 UART2->CR5 &= ((uint8_t)~UART2_CR5_IRLP); 00283 } 00284 } 00285 00286 /** 00287 * @brief Enables or disables the UART2�s IrDA interface. 00288 * @param NewState new state of the IrDA mode. 00289 * This parameter can be: ENABLE or DISABLE. 00290 * @retval None 00291 */ 00292 void UART2_IrDACmd(FunctionalState NewState) 00293 { 00294 /* Check parameters */ 00295 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00296 00297 if (NewState != DISABLE) 00298 { 00299 /* Enable the IrDA mode by setting the IREN bit in the CR3 register */ 00300 UART2->CR5 |= UART2_CR5_IREN; 00301 } 00302 else 00303 { 00304 /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */ 00305 UART2->CR5 &= ((uint8_t)~UART2_CR5_IREN); 00306 } 00307 } 00308 00309 /** 00310 * @brief Sets the UART2 LIN Break detection length. 00311 * @param UART2_LINBreakDetectionLength specifies the LIN break detection length. 00312 * This parameter can be any of the 00313 * @ref UART2_LINBreakDetectionLength_TypeDef values. 00314 * @retval None 00315 */ 00316 void UART2_LINBreakDetectionConfig(UART2_LINBreakDetectionLength_TypeDef UART2_LINBreakDetectionLength) 00317 { 00318 /* Check parameters */ 00319 assert_param(IS_UART2_LINBREAKDETECTIONLENGTH_OK(UART2_LINBreakDetectionLength)); 00320 00321 if (UART2_LINBreakDetectionLength != UART2_LINBREAKDETECTIONLENGTH_10BITS) 00322 { 00323 UART2->CR4 |= UART2_CR4_LBDL; 00324 } 00325 else 00326 { 00327 UART2->CR4 &= ((uint8_t)~UART2_CR4_LBDL); 00328 } 00329 } 00330 00331 /** 00332 * @brief Configure the UART2 peripheral. 00333 * @param UART2_Mode specifies the LIN mode. 00334 * This parameter can be any of the @ref UART2_LinMode_TypeDef values. 00335 * @param UART2_Autosync specifies the LIN automatic resynchronization mode. 00336 * This parameter can be any of the @ref UART2_LinAutosync_TypeDef values. 00337 * @param UART2_DivUp specifies the LIN divider update method. 00338 * This parameter can be any of the @ref UART2_LinDivUp_TypeDef values. 00339 * @retval None 00340 */ 00341 void UART2_LINConfig(UART2_LinMode_TypeDef UART2_Mode, 00342 UART2_LinAutosync_TypeDef UART2_Autosync, 00343 UART2_LinDivUp_TypeDef UART2_DivUp) 00344 { 00345 /* Check parameters */ 00346 assert_param(IS_UART2_SLAVE_OK(UART2_Mode)); 00347 assert_param(IS_UART2_AUTOSYNC_OK(UART2_Autosync)); 00348 assert_param(IS_UART2_DIVUP_OK(UART2_DivUp)); 00349 00350 if (UART2_Mode != UART2_LIN_MODE_MASTER) 00351 { 00352 UART2->CR6 |= UART2_CR6_LSLV; 00353 } 00354 else 00355 { 00356 UART2->CR6 &= ((uint8_t)~UART2_CR6_LSLV); 00357 } 00358 00359 if (UART2_Autosync != UART2_LIN_AUTOSYNC_DISABLE) 00360 { 00361 UART2->CR6 |= UART2_CR6_LASE ; 00362 } 00363 else 00364 { 00365 UART2->CR6 &= ((uint8_t)~ UART2_CR6_LASE ); 00366 } 00367 00368 if (UART2_DivUp != UART2_LIN_DIVUP_LBRR1) 00369 { 00370 UART2->CR6 |= UART2_CR6_LDUM; 00371 } 00372 else 00373 { 00374 UART2->CR6 &= ((uint8_t)~ UART2_CR6_LDUM); 00375 } 00376 } 00377 00378 /** 00379 * @brief Enables or disables the UART2 LIN mode. 00380 * @param NewState is new state of the UART2 LIN mode. 00381 * This parameter can be ENABLE or DISABLE 00382 * @retval None 00383 */ 00384 void UART2_LINCmd(FunctionalState NewState) 00385 { 00386 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00387 00388 if (NewState != DISABLE) 00389 { 00390 /* Enable the LIN mode by setting the LINE bit in the CR2 register */ 00391 UART2->CR3 |= UART2_CR3_LINEN; 00392 } 00393 else 00394 { 00395 /* Disable the LIN mode by clearing the LINE bit in the CR2 register */ 00396 UART2->CR3 &= ((uint8_t)~UART2_CR3_LINEN); 00397 } 00398 } 00399 00400 /** 00401 * @brief Enables or disables the UART2 Smart Card mode. 00402 * @param NewState: new state of the Smart Card mode. 00403 * This parameter can be: ENABLE or DISABLE. 00404 * @retval None 00405 */ 00406 void UART2_SmartCardCmd(FunctionalState NewState) 00407 { 00408 /* Check parameters */ 00409 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00410 00411 if (NewState != DISABLE) 00412 { 00413 /* Enable the SC mode by setting the SCEN bit in the CR5 register */ 00414 UART2->CR5 |= UART2_CR5_SCEN; 00415 } 00416 else 00417 { 00418 /* Disable the SC mode by clearing the SCEN bit in the CR5 register */ 00419 UART2->CR5 &= ((uint8_t)(~UART2_CR5_SCEN)); 00420 } 00421 } 00422 00423 /** 00424 * @brief Enables or disables NACK transmission. 00425 * @param NewState: new state of the Smart Card mode. 00426 * This parameter can be: ENABLE or DISABLE. 00427 * @retval None 00428 */ 00429 void UART2_SmartCardNACKCmd(FunctionalState NewState) 00430 { 00431 /* Check parameters */ 00432 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00433 00434 if (NewState != DISABLE) 00435 { 00436 /* Enable the NACK transmission by setting the NACK bit in the CR5 register */ 00437 UART2->CR5 |= UART2_CR5_NACK; 00438 } 00439 else 00440 { 00441 /* Disable the NACK transmission by clearing the NACK bit in the CR5 register */ 00442 UART2->CR5 &= ((uint8_t)~(UART2_CR5_NACK)); 00443 } 00444 } 00445 00446 /** 00447 * @brief Selects the UART2 WakeUp method. 00448 * @param UART2_WakeUp: specifies the UART2 wakeup method. 00449 * This parameter can be any of the @ref UART2_WakeUp_TypeDef values. 00450 * @retval None 00451 */ 00452 void UART2_WakeUpConfig(UART2_WakeUp_TypeDef UART2_WakeUp) 00453 { 00454 assert_param(IS_UART2_WAKEUP_OK(UART2_WakeUp)); 00455 00456 UART2->CR1 &= ((uint8_t)~UART2_CR1_WAKE); 00457 UART2->CR1 |= (uint8_t)UART2_WakeUp; 00458 } 00459 00460 /** 00461 * @brief Determines if the UART2 is in mute mode or not. 00462 * @param NewState: new state of the UART2 mode. 00463 * This parameter can be ENABLE or DISABLE 00464 * @retval None 00465 */ 00466 void UART2_ReceiverWakeUpCmd(FunctionalState NewState) 00467 { 00468 assert_param(IS_FUNCTIONALSTATE_OK(NewState)); 00469 00470 if (NewState != DISABLE) 00471 { 00472 /* Enable the mute mode UART2 by setting the RWU bit in the CR2 register */ 00473 UART2->CR2 |= UART2_CR2_RWU; 00474 } 00475 else 00476 { 00477 /* Disable the mute mode UART2 by clearing the RWU bit in the CR1 register */ 00478 UART2->CR2 &= ((uint8_t)~UART2_CR2_RWU); 00479 } 00480 } 00481 00482 /** 00483 * @brief Returns the most recent received data by the UART2 peripheral. 00484 * @param None 00485 * @retval Received Data 00486 */ 00487 uint8_t UART2_ReceiveData8(void) 00488 { 00489 return ((uint8_t)UART2->DR); 00490 } 00491 00492 /** 00493 * @brief Returns the most recent received data by the UART2 peripheral. 00494 * @param None 00495 * @retval Received Data 00496 */ 00497 uint16_t UART2_ReceiveData9(void) 00498 { 00499 uint16_t temp = 0; 00500 00501 temp = ((uint16_t)(((uint16_t)((uint16_t)UART2->CR1 & (uint16_t)UART2_CR1_R8)) << 1)); 00502 00503 return (uint16_t)((((uint16_t)UART2->DR) | temp) & ((uint16_t)0x01FF)); 00504 } 00505 00506 /** 00507 * @brief Transmits 8 bit data through the UART2 peripheral. 00508 * @param Data: the data to transmit. 00509 * @retval None 00510 */ 00511 void UART2_SendData8(uint8_t Data) 00512 { 00513 /* Transmit Data */ 00514 UART2->DR = Data; 00515 } 00516 00517 /** 00518 * @brief Transmits 9 bit data through the UART2 peripheral. 00519 * @param Data: the data to transmit. 00520 * @retval None 00521 */ 00522 void UART2_SendData9(uint16_t Data) 00523 { 00524 /* Clear the transmit data bit 8 */ 00525 UART2->CR1 &= ((uint8_t)~UART2_CR1_T8); 00526 00527 /* Write the transmit data bit [8] */ 00528 UART2->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & UART2_CR1_T8); 00529 00530 /* Write the transmit data bit [0:7] */ 00531 UART2->DR = (uint8_t)(Data); 00532 } 00533 00534 /** 00535 * @brief Transmits break characters. 00536 * @param None 00537 * @retval None 00538 */ 00539 void UART2_SendBreak(void) 00540 { 00541 UART2->CR2 |= UART2_CR2_SBK; 00542 } 00543 00544 /** 00545 * @brief Sets the address of the UART2 node. 00546 * @param UART2_Address: Indicates the address of the UART2 node. 00547 * @retval None 00548 */ 00549 void UART2_SetAddress(uint8_t UART2_Address) 00550 { 00551 /*assert_param for x UART2_Address*/ 00552 assert_param(IS_UART2_ADDRESS_OK(UART2_Address)); 00553 00554 /* Clear the UART2 address */ 00555 UART2->CR4 &= ((uint8_t)~UART2_CR4_ADD); 00556 /* Set the UART2 address node */ 00557 UART2->CR4 |= UART2_Address; 00558 } 00559 00560 /** 00561 * @brief Sets the specified UART2 guard time. 00562 * @note SmartCard Mode should be Enabled 00563 * @param UART2_GuardTime: specifies the guard time. 00564 * @retval None 00565 */ 00566 void UART2_SetGuardTime(uint8_t UART2_GuardTime) 00567 { 00568 /* Set the UART2 guard time */ 00569 UART2->GTR = UART2_GuardTime; 00570 } 00571 00572 /** 00573 * @brief Sets the system clock prescaler. 00574 * @note IrDA Low Power mode or smartcard mode should be enabled 00575 * @note This function is related to SmartCard and IrDa mode. 00576 * @param UART2_Prescaler: specifies the prescaler clock. 00577 * This parameter can be one of the following values: 00578 * @par IrDA Low Power Mode 00579 * The clock source is divided by the value given in the register (8 bits) 00580 * - 0000 0000 Reserved 00581 * - 0000 0001 divides the clock source by 1 00582 * - 0000 0010 divides the clock source by 2 00583 * - ... 00584 * @par Smart Card Mode 00585 * The clock source is divided by the value given in the register 00586 * (5 significant bits) multiped by 2 00587 * - 0 0000 Reserved 00588 * - 0 0001 divides the clock source by 2 00589 * - 0 0010 divides the clock source by 4 00590 * - 0 0011 divides the clock source by 6 00591 * - ... 00592 * @retval None 00593 */ 00594 void UART2_SetPrescaler(uint8_t UART2_Prescaler) 00595 { 00596 /* Load the UART2 prescaler value*/ 00597 UART2->PSCR = UART2_Prescaler; 00598 } 00599 00600 /** 00601 * @brief Checks whether the specified UART2 flag is set or not. 00602 * @param UART2_FLAG specifies the flag to check. 00603 * This parameter can be any of the @ref UART2_Flag_TypeDef enumeration. 00604 * @retval FlagStatus (SET or RESET) 00605 */ 00606 FlagStatus UART2_GetFlagStatus(UART2_Flag_TypeDef UART2_FLAG) 00607 { 00608 FlagStatus status = RESET; 00609 00610 /* Check parameters */ 00611 assert_param(IS_UART2_FLAG_OK(UART2_FLAG)); 00612 00613 /* Check the status of the specified UART2 flag*/ 00614 if (UART2_FLAG == UART2_FLAG_LBDF) 00615 { 00616 if ((UART2->CR4 & (uint8_t)UART2_FLAG) != (uint8_t)0x00) 00617 { 00618 /* UART2_FLAG is set*/ 00619 status = SET; 00620 } 00621 else 00622 { 00623 /* UART2_FLAG is reset*/ 00624 status = RESET; 00625 } 00626 } 00627 else if (UART2_FLAG == UART2_FLAG_SBK) 00628 { 00629 if ((UART2->CR2 & (uint8_t)UART2_FLAG) != (uint8_t)0x00) 00630 { 00631 /* UART2_FLAG is set*/ 00632 status = SET; 00633 } 00634 else 00635 { 00636 /* UART2_FLAG is reset*/ 00637 status = RESET; 00638 } 00639 } 00640 else if ((UART2_FLAG == UART2_FLAG_LHDF) || (UART2_FLAG == UART2_FLAG_LSF)) 00641 { 00642 if ((UART2->CR6 & (uint8_t)UART2_FLAG) != (uint8_t)0x00) 00643 { 00644 /* UART2_FLAG is set*/ 00645 status = SET; 00646 } 00647 else 00648 { 00649 /* UART2_FLAG is reset*/ 00650 status = RESET; 00651 } 00652 } 00653 else 00654 { 00655 if ((UART2->SR & (uint8_t)UART2_FLAG) != (uint8_t)0x00) 00656 { 00657 /* UART2_FLAG is set*/ 00658 status = SET; 00659 } 00660 else 00661 { 00662 /* UART2_FLAG is reset*/ 00663 status = RESET; 00664 } 00665 } 00666 00667 /* Return the UART2_FLAG status*/ 00668 return status; 00669 } 00670 00671 /** 00672 * @brief Clears the UART2 flags. 00673 * @param UART2_FLAG specifies the flag to clear 00674 * This parameter can be any combination of the following values: 00675 * - UART2_FLAG_LBDF: LIN Break detection flag. 00676 * - UART2_FLAG_LHDF: LIN Header detection flag. 00677 * - UART2_FLAG_LSF: LIN synchrone field flag. 00678 * - UART2_FLAG_RXNE: Receive data register not empty flag. 00679 * @note: 00680 * - PE (Parity error), FE (Framing error), NE (Noise error), 00681 * OR (OverRun error) and IDLE (Idle line detected) flags are cleared 00682 * by software sequence: a read operation to UART2_SR register 00683 * (UART2_GetFlagStatus())followed by a read operation to UART2_DR 00684 * register(UART2_ReceiveData8() or UART2_ReceiveData9()). 00685 * 00686 * - RXNE flag can be also cleared by a read to the UART2_DR register 00687 * (UART2_ReceiveData8()or UART2_ReceiveData9()). 00688 * 00689 * - TC flag can be also cleared by software sequence: a read operation 00690 * to UART2_SR register (UART2_GetFlagStatus()) followed by a write 00691 * operation to UART2_DR register (UART2_SendData8() or UART2_SendData9()). 00692 * 00693 * - TXE flag is cleared only by a write to the UART2_DR register 00694 * (UART2_SendData8() or UART2_SendData9()). 00695 * 00696 * - SBK flag is cleared during the stop bit of break. 00697 * @retval None 00698 */ 00699 void UART2_ClearFlag(UART2_Flag_TypeDef UART2_FLAG) 00700 { 00701 assert_param(IS_UART2_CLEAR_FLAG_OK(UART2_FLAG)); 00702 00703 /* Clear the Receive Register Not Empty flag */ 00704 if (UART2_FLAG == UART2_FLAG_RXNE) 00705 { 00706 UART2->SR = (uint8_t)~(UART2_SR_RXNE); 00707 } 00708 /* Clear the LIN Break Detection flag */ 00709 else if (UART2_FLAG == UART2_FLAG_LBDF) 00710 { 00711 UART2->CR4 &= (uint8_t)(~UART2_CR4_LBDF); 00712 } 00713 /* Clear the LIN Header Detection Flag */ 00714 else if (UART2_FLAG == UART2_FLAG_LHDF) 00715 { 00716 UART2->CR6 &= (uint8_t)(~UART2_CR6_LHDF); 00717 } 00718 /* Clear the LIN Synch Field flag */ 00719 else 00720 { 00721 UART2->CR6 &= (uint8_t)(~UART2_CR6_LSF); 00722 } 00723 } 00724 00725 /** 00726 * @brief Checks whether the specified UART2 interrupt has occurred or not. 00727 * @param UART2_IT: Specifies the UART2 interrupt pending bit to check. 00728 * This parameter can be one of the following values: 00729 * - UART2_IT_LBDF: LIN Break detection interrupt 00730 * - UART2_IT_TXE: Tansmit Data Register empty interrupt 00731 * - UART2_IT_TC: Transmission complete interrupt 00732 * - UART2_IT_RXNE: Receive Data register not empty interrupt 00733 * - UART2_IT_IDLE: Idle line detection interrupt 00734 * - UART2_IT_OR: OverRun Error interrupt 00735 * - UART2_IT_PE: Parity Error interrupt 00736 * @retval The state of UART2_IT (SET or RESET). 00737 */ 00738 ITStatus UART2_GetITStatus(UART2_IT_TypeDef UART2_IT) 00739 { 00740 ITStatus pendingbitstatus = RESET; 00741 uint8_t itpos = 0; 00742 uint8_t itmask1 = 0; 00743 uint8_t itmask2 = 0; 00744 uint8_t enablestatus = 0; 00745 00746 /* Check parameters */ 00747 assert_param(IS_UART2_GET_IT_OK(UART2_IT)); 00748 00749 /* Get the UART2 IT index*/ 00750 itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)UART2_IT & (uint8_t)0x0F)); 00751 /* Get the UART2 IT index*/ 00752 itmask1 = (uint8_t)((uint8_t)UART2_IT >> (uint8_t)4); 00753 /* Set the IT mask*/ 00754 itmask2 = (uint8_t)((uint8_t)1 << itmask1); 00755 00756 /* Check the status of the specified UART2 pending bit*/ 00757 if (UART2_IT == UART2_IT_PE) 00758 { 00759 /* Get the UART2_ITPENDINGBIT enable bit status*/ 00760 enablestatus = (uint8_t)((uint8_t)UART2->CR1 & itmask2); 00761 /* Check the status of the specified UART2 interrupt*/ 00762 00763 if (((UART2->SR & itpos) != (uint8_t)0x00) && enablestatus) 00764 { 00765 /* Interrupt occurred*/ 00766 pendingbitstatus = SET; 00767 } 00768 else 00769 { 00770 /* Interrupt not occurred*/ 00771 pendingbitstatus = RESET; 00772 } 00773 } 00774 else if (UART2_IT == UART2_IT_LBDF) 00775 { 00776 /* Get the UART2_IT enable bit status*/ 00777 enablestatus = (uint8_t)((uint8_t)UART2->CR4 & itmask2); 00778 /* Check the status of the specified UART2 interrupt*/ 00779 if (((UART2->CR4 & itpos) != (uint8_t)0x00) && enablestatus) 00780 { 00781 /* Interrupt occurred*/ 00782 pendingbitstatus = SET; 00783 } 00784 else 00785 { 00786 /* Interrupt not occurred*/ 00787 pendingbitstatus = RESET; 00788 } 00789 } 00790 else if (UART2_IT == UART2_IT_LHDF) 00791 { 00792 /* Get the UART2_IT enable bit status*/ 00793 enablestatus = (uint8_t)((uint8_t)UART2->CR6 & itmask2); 00794 /* Check the status of the specified UART2 interrupt*/ 00795 if (((UART2->CR6 & itpos) != (uint8_t)0x00) && enablestatus) 00796 { 00797 /* Interrupt occurred*/ 00798 pendingbitstatus = SET; 00799 } 00800 else 00801 { 00802 /* Interrupt not occurred*/ 00803 pendingbitstatus = RESET; 00804 } 00805 } 00806 else 00807 { 00808 /* Get the UART2_IT enable bit status*/ 00809 enablestatus = (uint8_t)((uint8_t)UART2->CR2 & itmask2); 00810 /* Check the status of the specified UART2 interrupt*/ 00811 if (((UART2->SR & itpos) != (uint8_t)0x00) && enablestatus) 00812 { 00813 /* Interrupt occurred*/ 00814 pendingbitstatus = SET; 00815 } 00816 else 00817 { 00818 /* Interrupt not occurred*/ 00819 pendingbitstatus = RESET; 00820 } 00821 } 00822 /* Return the UART2_IT status*/ 00823 return pendingbitstatus; 00824 } 00825 00826 /** 00827 * @brief Clears the UART2 pending flags. 00828 * @param UART2_IT specifies the pending bit to clear 00829 * This parameter can be one of the following values: 00830 * - UART2_IT_LBDF: LIN Break detection interrupt 00831 * - UART2_IT_LHDF: LIN Header detection interrupt 00832 * - UART2_IT_RXNE: Receive Data register not empty interrupt. 00833 * @note 00834 * - PE (Parity error), FE (Framing error), NE (Noise error), 00835 * OR (OverRun error) and IDLE (Idle line detected) pending bits are 00836 * cleared by software sequence: a read operation to UART2_SR register 00837 * (UART2_GetITStatus()) followed by a read operation to UART2_DR register 00838 * (UART2_ReceiveData8() or UART2_ReceiveData9()). 00839 * 00840 * - RXNE pending bit can be also cleared by a read to the UART2_DR 00841 * register (UART2_ReceiveData8() or UART2_ReceiveData9()). 00842 * 00843 * - TC (Transmit complete) pending bit can be cleared by software 00844 * sequence: a read operation to UART2_SR register 00845 * (UART2_GetITStatus()) followed by a write operation to UART2_DR 00846 * register (UART2_SendData8()or UART2_SendData9()). 00847 * 00848 * - TXE pending bit is cleared only by a write to the UART2_DR register 00849 * (UART2_SendData8() or UART2_SendData9()). 00850 * @retval None 00851 */ 00852 void UART2_ClearITPendingBit(UART2_IT_TypeDef UART2_IT) 00853 { 00854 assert_param(IS_UART2_CLEAR_IT_OK(UART2_IT)); 00855 00856 /* Clear the Receive Register Not Empty pending bit */ 00857 if (UART2_IT == UART2_IT_RXNE) 00858 { 00859 UART2->SR = (uint8_t)~(UART2_SR_RXNE); 00860 } 00861 /* Clear the LIN Break Detection pending bit */ 00862 else if (UART2_IT == UART2_IT_LBDF) 00863 { 00864 UART2->CR4 &= (uint8_t)~(UART2_CR4_LBDF); 00865 } 00866 /* Clear the LIN Header Detection pending bit */ 00867 else 00868 { 00869 UART2->CR6 &= (uint8_t)(~UART2_CR6_LHDF); 00870 } 00871 } 00872 00873 /** 00874 * @} 00875 */ 00876 00877 /** 00878 * @} 00879 */ 00880 00881 00882 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/