Socket APIs: Ethernet/W5300/w5300.c Source File

Wiznet Socket API

w5300.c
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1 //*****************************************************************************
2 //
41 //
42 //*****************************************************************************
43 
44 #include <stdint.h>
45 #include "wizchip_conf.h"
46 
47 #if _WIZCHIP_ == 5300
48 
49  extern uint8_t sock_remained_byte[_WIZCHIP_SOCK_NUM_];
50  extern uint8_t sock_pack_info[_WIZCHIP_SOCK_NUM_];
51 
52 
53 /***********************
54  * Basic I/O Function *
55  ***********************/
56 
57 void WIZCHIP_WRITE(uint32_t AddrSel, uint16_t wb )
58 {
60  WIZCHIP.CS._select();
61 
62 #if ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) )
63  #if(_WIZCHIP_IO_BUS_WIDTH_ == 8)
64  WIZCHIP.IF.BUS._write_data(AddrSel, (uint8_t)(wb>>8));
65  WIZCHIP.IF.BUS._write_data(WIZCHIP_OFFSET_INC(AddrSel,1),(uint8_t)wb);
66  #elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
67  WIZCHIP.IF.BUS._write_data(AddrSel, wb);
68  #else
69  #error "Abnoraml _WIZCHIP_IO_BUS_WIDTH_. Should be 8 or 16"
70  #endif
71 #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
72  #if(_WIZCHIP_IO_BUS_WIDTH_ == 8)
73  WIZCHIP.IF.BUS._write_data(IDM_AR, (uint8_t)(AddrSel >> 8));
74  WIZCHIP.IF.BUS._write_data(WIZCHIP_OFFSET_INC(IDM_AR,1),(uint8_t)AddrSel);
75  WIZCHIP.IF.BUS._write_data(IDM_DR,(uint8_t)(wb>>8));
76  WIZCHIP.IF.BUS._write_data(WIZCHIP_OFFSET_INC(IDM_DR,1),(uint8_t)wb);
77  #elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
78  WIZCHIP.IF.BUS._write_data(IDM_AR, (uint16_t)AddrSel);
79  WIZCHIP.IF.BUS._write_data(IDM_DR, wb);
80  #else
81  #error "Abnoraml _WIZCHIP_IO_BUS_WIDTH_. Should be 8 or 16"
82  #endif
83 #else
84  #error "Unknown _WIZCHIP_IO_MODE_ in W5300. !!!"
85 #endif
86 
89 }
90 
91 uint16_t WIZCHIP_READ(uint32_t AddrSel)
92 {
93  uint16_t ret;
94 
96  WIZCHIP.CS._select();
97 
98 #if ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) )
99  #if (_WIZCHIP_IO_BUS_WIDTH_ == 8)
100  ret = (((uint16_t)WIZCHIP.IF.BUS._read_data(AddrSel)) << 8) |
101  (((uint16_t)WIZCHIP.IF.BUS._read_data(WIZCHIP_OFFSET_INC(AddrSel,1))) & 0x00FF) ;
102  #elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
103  ret = WIZCHIP.IF.BUS._read_data(AddrSel);
104  #else
105  #error "Abnoraml _WIZCHIP_IO_BUS_WIDTH_. Should be 8 or 16"
106  #endif
107 #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
108  #if(_WIZCHIP_IO_BUS_WIDTH_ == 8)
109  WIZCHIP.IF.BUS._write_data(IDM_AR, (uint8_t)(AddrSel >> 8));
110  WIZCHIP.IF.BUS._write_data(WIZCHIP_OFFSET_INC(IDM_AR,1),(uint8_t)AddrSel);
111  ret = (((uint16_t)WIZCHIP.IF.BUS._read_data(IDM_DR)) << 8) |
112  (((uint16_t)WIZCHIP.IF.BUS._read_data(WIZCHIP_OFFSET_INC(IDM_DR,1))) & 0x00FF);
113  #elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
114  WIZCHIP.IF.BUS._write_data(IDM_AR, (uint16_t)AddrSel);
115  ret = WIZCHIP.IF.BUS._read_data(IDM_DR);
116  #else
117  #error "Abnoraml _WIZCHIP_IO_BUS_WIDTH_. Should be 8 or 16"
118  #endif
119 #else
120  #error "Unknown _WIZCHIP_IO_MODE_ in W5300. !!!"
121 #endif
122 
123  WIZCHIP.CS._deselect();
125  return ret;
126 }
127 
128 
129 void setTMSR(uint8_t sn,uint8_t tmsr)
130 {
131  uint16_t tmem;
132  tmem = WIZCHIP_READ(WIZCHIP_OFFSET_INC(TMS01R, (sn & 0xFE)));
133  if(sn & 0x01) tmem = (tmem & 0xFF00) | (((uint16_t)tmsr ) & 0x00FF) ;
134  else tmem = (tmem & 0x00FF) | (((uint16_t)tmsr) << 8) ;
135  WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(TMS01R, (sn & 0xFE)),tmem);
136 }
137 
138 uint8_t getTMSR(uint8_t sn)
139 {
140  if(sn & 0x01)
141  return (uint8_t)(WIZCHIP_READ(WIZCHIP_OFFSET_INC(TMS01R, (sn & 0xFE))) & 0x00FF);
142  return (uint8_t)(WIZCHIP_READ(WIZCHIP_OFFSET_INC(TMS01R, (sn & 0xFE))) >> 8);
143 }
144 
145 void setRMSR(uint8_t sn,uint8_t rmsr)
146 {
147  uint16_t rmem;
148  rmem = WIZCHIP_READ(WIZCHIP_OFFSET_INC(RMS01R, (sn & 0xFE)));
149  if(sn & 0x01) rmem = (rmem & 0xFF00) | (((uint16_t)rmsr ) & 0x00FF) ;
150  else rmem = (rmem & 0x00FF) | (((uint16_t)rmsr) << 8) ;
151  WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(RMS01R, (sn & 0xFE)),rmem);
152 }
153 
154 uint8_t getRMSR(uint8_t sn)
155 {
156  if(sn & 0x01)
157  return (uint8_t)(WIZCHIP_READ(WIZCHIP_OFFSET_INC(RMS01R, (sn & 0xFE))) & 0x00FF);
158  return (uint8_t)(WIZCHIP_READ(WIZCHIP_OFFSET_INC(RMS01R, (sn & 0xFE))) >> 8);
159 }
160 
161 uint32_t getSn_TX_FSR(uint8_t sn)
162 {
163  uint32_t free_tx_size=0;
164  uint32_t free_tx_size1=1;
165  while(1)
166  {
167  free_tx_size = (((uint32_t)WIZCHIP_READ(Sn_TX_FSR(sn))) << 16) |
168  (((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_FSR(sn),2))) & 0x0000FFFF); // read
169  if(free_tx_size == free_tx_size1) break; // if first == sencond, Sn_TX_FSR value is valid.
170  free_tx_size1 = free_tx_size; // save second value into first
171  }
172  return free_tx_size;
173 }
174 
175 uint32_t getSn_RX_RSR(uint8_t sn)
176 {
177  uint32_t received_rx_size=0;
178  uint32_t received_rx_size1=1;
179  while(1)
180  {
181  received_rx_size = (((uint32_t)WIZCHIP_READ(Sn_RX_RSR(sn))) << 16) |
182  (((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RSR(sn),2))) & 0x0000FFFF);
183  if(received_rx_size == received_rx_size1) break;
184  received_rx_size1 = received_rx_size; // if first == sencond, Sn_RX_RSR value is valid.
185  } // save second value into first
186  return received_rx_size + (uint32_t)((sock_pack_info[sn] & 0x02) ? 1 : 0);
187 }
188 
189 
190 void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint32_t len)
191 {
192  uint32_t i = 0;
193  if(len == 0) return;
194 
195  for(i = 0; i < len ; i += 2)
196  setSn_TX_FIFOR(sn, (((uint16_t)wizdata[i]) << 8) | (((uint16_t)wizdata[i+1]) & 0x00FF))
197 }
198 
199 void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint32_t len)
200 {
201  uint16_t rd = 0;
202  uint32_t i = 0;
203 
204  if(len == 0) return;
205 
206  for(i = 0; i < len; i++)
207  {
208  if((i & 0x01)==0)
209  {
210  rd = getSn_RX_FIFOR(sn);
211  wizdata[i] = (uint8_t)(rd >> 8);
212  }
213  else wizdata[i] = (uint8_t)rd; // For checking the memory access violation
214  }
215  sock_remained_byte[sn] = (uint8_t)rd; // back up the remaind fifo byte.
216 }
217 
218 void wiz_recv_ignore(uint8_t sn, uint32_t len)
219 {
220  uint32_t i = 0;
221  for(i = 0; i < len ; i += 2) getSn_RX_FIFOR(sn);
222 }
223 
224 
225 #endif
_WIZCHIP WIZCHIP
Definition: wizchip_conf.c:165
union __WIZCHIP::_IF IF
void wiz_recv_ignore(uint8_t sn, uint16_t len)
It discard the received data in RX memory.
void(* _write_data)(uint32_t AddrSel, iodata_t wb)
Definition: wizchip_conf.h:238
uint16_t getSn_RX_RSR(uint8_t sn)
Get Sn_RX_RSR register.
void(* _select)(void)
_WIZCHIP_ selected
Definition: wizchip_conf.h:218
void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len)
It copies data to your buffer from internal RX memory.
uint8_t WIZCHIP_READ(uint32_t AddrSel)
It reads 1 byte value from a register.
void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len)
It copies data to internal TX memory.
uint16_t getSn_TX_FSR(uint8_t sn)
Get Sn_TX_FSR register.
void(* _deselect)(void)
_WIZCHIP_ deselected
Definition: wizchip_conf.h:219
#define WIZCHIP_CRITICAL_ENTER()
Enter a critical section.
Definition: w5100.h:1032
iodata_t(* _read_data)(uint32_t AddrSel)
Definition: wizchip_conf.h:237
#define WIZCHIP_OFFSET_INC(ADDR, N)
Increase offset address.
Definition: w5100.h:59
#define TMS01R
TX memory size of SOCKET 0 & 1.
Definition: w5300.h:316
void setTMSR(uint8_t sn, uint8_t tmsr)
Set TMSR0 ~ TMSR7 register.
#define Sn_TX_FSR(sn)
Transmit free memory size register(R)
Definition: w5100.h:510
uint8_t getTMSR(uint8_t sn)
Get TMSR0 ~ TMSR7 register.
#define setSn_TX_FIFOR(sn, txfifo)
Set Sn_TX_FIFOR register.
Definition: w5300.h:2181
uint8_t sock_pack_info[_WIZCHIP_SOCK_NUM_]
Definition: socket.c:70
#define Sn_RX_RSR(sn)
Received data size register(R)
Definition: w5100.h:545
void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb)
It writes 1 byte value to a register.
uint8_t getRMSR(uint8_t sn)
Get RMS01R ~ RMS67R register.
void setRMSR(uint8_t sn, uint8_t rmsr)
Set RMS01R ~ RMS67R register.
#define _WIZCHIP_SOCK_NUM_
The count of independant socket of WIZCHIP.
Definition: wizchip_conf.h:188
#define WIZCHIP_CRITICAL_EXIT()
Exit a critical section.
Definition: w5100.h:1049
struct __WIZCHIP::_CS CS
struct __WIZCHIP::_IF::@0 BUS
#define RMS01R
RX memory size of SOCKET 0 & 1.
Definition: w5300.h:403
WIZCHIP Config Header File.
#define getSn_RX_FIFOR(sn)
Get Sn_RX_FIFOR register.
Definition: w5300.h:2190
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