W5200 HAL Header File. More...

#include <stdint.h> #include "wizchip_conf.h"

Macros
#define	_WIZCHIP_SN_BASE_ (0x4000)

#define	_WIZCHIP_SN_SIZE_ (0x0100)

#define	_WIZCHIP_IO_TXBUF_ (0x8000) /* Internal Tx buffer address of the iinchip */

#define	_WIZCHIP_IO_RXBUF_ (0xC000) /* Internal Rx buffer address of the iinchip */

#define	_W5200_SPI_READ_ (0x00 << 7)
	SPI interface Read operation in Control Phase. More...

#define	_W5200_SPI_WRITE_ (0x01 << 7)
	SPI interface Write operation in Control Phase. More...

#define	WIZCHIP_CREG_BLOCK 0x00
	Common register block. More...

#define	WIZCHIP_SREG_BLOCK(N) (_WIZCHIP_SN_BASE_+ _WIZCHIP_SN_SIZE_*N)
	Socket N register block. More...

#define	WIZCHIP_OFFSET_INC(ADDR, N) (ADDR + N)
	Increase offset address. More...

#define	IINCHIP_READ(ADDR) WIZCHIP_READ(ADDR)
	The defined for legacy chip driver. More...

#define	IINCHIP_WRITE(ADDR, VAL) WIZCHIP_WRITE(ADDR,VAL)
	The defined for legacy chip driver. More...

#define	IINCHIP_READ_BUF(ADDR, BUF, LEN) WIZCHIP_READ_BUF(ADDR,BUF,LEN)
	The defined for legacy chip driver. More...

#define	IINCHIP_WRITE_BUF(ADDR, BUF, LEN) WIZCHIP_WRITE(ADDR,BUF,LEN)
	The defined for legacy chip driver. More...

#define	MR (_W5200_IO_BASE_ + (0x0000))
	Mode Register address(R/W) MR is used for S/W reset, ping block mode, PPPoE mode and etc. More...

#define	GAR (_W5200_IO_BASE_ + (0x0001))
	Gateway IP Register address(R/W) More...

#define	SUBR (_W5200_IO_BASE_ + (0x0005))
	Subnet mask Register address(R/W) More...

#define	SHAR (_W5200_IO_BASE_ + (0x0009))
	Source MAC Register address(R/W) More...

#define	SIPR (_W5200_IO_BASE_ + (0x000F))
	Source IP Register address(R/W) More...

#define	IR (_W5200_IO_BASE_ + (0x0015))
	Interrupt Register(R/W) More...

#define	_IMR_ (_W5200_IO_BASE_ + (0x0016))
	Socket Interrupt Mask Register(R/W) More...

#define	_RTR_ (_W5200_IO_BASE_ + (0x0017))
	Timeout register address( 1 is 100us )(R/W) More...

#define	_RCR_ (_W5200_IO_BASE_ + (0x0019))
	Retry count register(R/W) More...

#define	PATR (_W5200_IO_BASE_ + (0x001C))
	PPP LCP Request Timer register in PPPoE mode(R) More...

#define	PPPALGO (_W5200_IO_BASE_ + (0x001E))
	PPP LCP Request Timer register in PPPoE mode(R) More...

#define	VERSIONR (_W5200_IO_BASE_ + (0x001F))
	chip version register address(R) More...

#define	PTIMER (_W5200_IO_BASE_ + (0x0028))
	PPP LCP Request Timer register in PPPoE mode(R) More...

#define	PMAGIC (_W5200_IO_BASE_ + (0x0029))
	PPP LCP Magic number register in PPPoE mode(R) More...

#define	INTLEVEL (_W5200_IO_BASE_ + (0x0030))
	Set Interrupt low level timer register address(R/W) More...

#define	IR2 (_W5200_IO_BASE_ + (0x0034))
	Socket Interrupt Register(R/W) More...

#define	PHYSTATUS (_W5200_IO_BASE_ + (0x0035))
	PHYSTATUS(R/W) More...

#define	IMR2 (_W5200_IO_BASE_ + (0x0036))
	Interrupt mask register(R/W) More...

#define	Sn_MR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0000))
	socket Mode register(R/W) More...

#define	Sn_CR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0001))
	Socket command register(R/W) More...

#define	Sn_IR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0002))
	Socket interrupt register(R) More...

#define	Sn_SR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0003))
	Socket status register(R) More...

#define	Sn_PORT(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0004))
	source port register(R/W) More...

#define	Sn_DHAR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0006))
	Peer MAC register address(R/W) More...

#define	Sn_DIPR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x000C))
	Peer IP register address(R/W) More...

#define	Sn_DPORT(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0010))
	Peer port register address(R/W) More...

#define	Sn_MSSR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0012))
	Maximum Segment Size(Sn_MSSR0) register address(R/W) More...

#define	Sn_PROTO(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0014))
	IP Protocol(PROTO) Register(R/W) More...

#define	Sn_TOS(sn) (WIZCHIP_SREG_BLOCK(sn) + 0x0015)
	IP Type of Service(TOS) Register(R/W) More...

#define	Sn_TTL(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0016))
	IP Time to live(TTL) Register(R/W) More...

#define	Sn_RXMEM_SIZE(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x001E))
	Receive memory size register(R/W) More...

#define	Sn_TXMEM_SIZE(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x001F))
	Transmit memory size register(R/W) More...

#define	Sn_TX_FSR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0020))
	Transmit free memory size register(R) More...

#define	Sn_TX_RD(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0022))
	Transmit memory read pointer register address(R) More...

#define	Sn_TX_WR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0024))
	Transmit memory write pointer register address(R/W) More...

#define	Sn_RX_RSR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0026))
	Received data size register(R) More...

#define	Sn_RX_RD(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0028))
	Read point of Receive memory(R/W) More...

#define	Sn_RX_WR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x002A))
	Write point of Receive memory(R) More...

#define	Sn_IMR(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x002C))
	socket interrupt mask register(R) More...

#define	Sn_FRAG(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x002D))
	Fragment field value in IP header register(R/W) More...

#define	MR_RST 0x80
	Reset. More...

#define	MR_WOL 0x20
	Wake on LAN. More...

#define	MR_PB 0x10
	Ping block. More...

#define	MR_PPPOE 0x08
	Enable PPPoE. More...

#define	MR_AI 0x02
	Address Auto-Increment in Indirect Bus Interface. More...

#define	MR_IND 0x01
	Indirect Bus Interface mode. More...

#define	IR_CONFLICT 0x80
	Check IP conflict. More...

#define	IR_PPPoE 0x20
	Get the PPPoE close message. More...

#define	PHYSTATUS_LINK 0x20
	Link Status [Read Only]. More...

#define	PHYSTATUS_POWERSAVE 0x10
	Power save mode of PHY. More...

#define	PHYSTATUS_POWERDOWN 0x08
	Power down mode of PHY. More...

#define	Sn_MR_CLOSE 0x00
	Unused socket. More...

#define	Sn_MR_TCP 0x01
	TCP. More...

#define	Sn_MR_UDP 0x02
	UDP. More...

#define	Sn_MR_IPRAW 0x03
	IP LAYER RAW SOCK. More...

#define	Sn_MR_MACRAW 0x04
	MAC LAYER RAW SOCK. More...

#define	Sn_MR_PPPOE 0x05
	PPPoE. More...

#define	Sn_MR_ND 0x20
	No Delayed Ack(TCP), Multicast flag. More...

#define	Sn_MR_MC Sn_MR_ND
	Support UDP Multicasting. More...

#define	Sn_MR_MF 0x40
	Multicast Blocking in Sn_MR_MACRAW mode. More...

#define	Sn_MR_MFEN Sn_MR_MF

#define	Sn_MR_MULTI 0x80
	Support UDP Multicasting. More...

#define	Sn_CR_OPEN 0x01
	Initialize or open socket. More...

#define	Sn_CR_LISTEN 0x02
	Wait connection request in TCP mode(Server mode) More...

#define	Sn_CR_CONNECT 0x04
	Send connection request in TCP mode(Client mode) More...

#define	Sn_CR_DISCON 0x08
	Send closing request in TCP mode. More...

#define	Sn_CR_CLOSE 0x10
	Close socket. More...

#define	Sn_CR_SEND 0x20
	Update TX buffer pointer and send data. More...

#define	Sn_CR_SEND_MAC 0x21
	Send data with MAC address, so without ARP process. More...

#define	Sn_CR_SEND_KEEP 0x22
	Send keep alive message. More...

#define	Sn_CR_RECV 0x40
	Update RX buffer pointer and receive data. More...

#define	Sn_CR_PCON 0x23
	PPPoE connection. More...

#define	Sn_CR_PDISCON 0x24
	Closes PPPoE connection. More...

#define	Sn_CR_PCR 0x25
	REQ message transmission. More...

#define	Sn_CR_PCN 0x26
	NAK massage transmission. More...

#define	Sn_CR_PCJ 0x27
	REJECT message transmission. More...

#define	Sn_IR_PRECV 0x80
	PPP Receive Interrupt. More...

#define	Sn_IR_PFAIL 0x40
	PPP Fail Interrupt. More...

#define	Sn_IR_PNEXT 0x20
	PPP Next Phase Interrupt. More...

#define	Sn_IR_SENDOK 0x10
	SEND_OK Interrupt. More...

#define	Sn_IR_TIMEOUT 0x08
	TIMEOUT Interrupt. More...

#define	Sn_IR_RECV 0x04
	RECV Interrupt. More...

#define	Sn_IR_DISCON 0x02
	DISCON Interrupt. More...

#define	Sn_IR_CON 0x01
	CON Interrupt. More...

#define	SOCK_CLOSED 0x00
	Closed. More...

#define	SOCK_INIT 0x13
	Initiate state. More...

#define	SOCK_LISTEN 0x14
	Listen state. More...

#define	SOCK_SYNSENT 0x15
	Connection state. More...

#define	SOCK_SYNRECV 0x16
	Connection state. More...

#define	SOCK_ESTABLISHED 0x17
	Success to connect. More...

#define	SOCK_FIN_WAIT 0x18
	Closing state. More...

#define	SOCK_CLOSING 0x1A
	Closing state. More...

#define	SOCK_TIME_WAIT 0x1B
	Closing state. More...

#define	SOCK_CLOSE_WAIT 0x1C
	Closing state. More...

#define	SOCK_LAST_ACK 0x1D
	Closing state. More...

#define	SOCK_UDP 0x22
	UDP socket. More...

#define	SOCK_IPRAW 0x32
	IP raw mode socket. More...

#define	SOCK_MACRAW 0x42
	MAC raw mode socket. More...

#define	SOCK_PPPOE 0x5F
	PPPoE mode socket. More...

#define	IPPROTO_IP 0
	Dummy for IP. More...

#define	IPPROTO_ICMP 1
	Control message protocol. More...

#define	IPPROTO_IGMP 2
	Internet group management protocol. More...

#define	IPPROTO_GGP 3
	GW^2 (deprecated) More...

#define	IPPROTO_TCP 6
	TCP. More...

#define	IPPROTO_PUP 12
	PUP. More...

#define	IPPROTO_UDP 17
	UDP. More...

#define	IPPROTO_IDP 22
	XNS idp. More...

#define	IPPROTO_ND 77
	UNOFFICIAL net disk protocol. More...

#define	IPPROTO_RAW 255
	Raw IP packet. More...

#define	WIZCHIP_CRITICAL_ENTER() WIZCHIP.CRIS._enter()
	Enter a critical section. More...

#define	WIZCHIP_CRITICAL_EXIT() WIZCHIP.CRIS._exit()
	Exit a critical section. More...

#define	setMR(mr) (((uint8_t)MR) = mr)
	Set Mode Register. More...

#define	getMR() ((uint8_t)MR)
	Get MR. More...

#define	setGAR(gar) WIZCHIP_WRITE_BUF(GAR,gar,4)
	Set GAR. More...

#define	getGAR(gar) WIZCHIP_READ_BUF(GAR,gar,4)
	Get GAR. More...

#define	setSUBR(subr) WIZCHIP_WRITE_BUF(SUBR, subr,4)
	Set SUBR. More...

#define	getSUBR(subr) WIZCHIP_READ_BUF(SUBR, subr, 4)
	Get SUBR. More...

#define	setSHAR(shar) WIZCHIP_WRITE_BUF(SHAR, shar, 6)
	Set SHAR. More...

#define	getSHAR(shar) WIZCHIP_READ_BUF(SHAR, shar, 6)
	Get SHAR. More...

#define	setSIPR(sipr) WIZCHIP_WRITE_BUF(SIPR, sipr, 4)
	Set SIPR. More...

#define	getSIPR(sipr) WIZCHIP_READ_BUF(SIPR, sipr, 4)
	Get SIPR. More...

#define	setIR(ir) WIZCHIP_WRITE(IR, (ir & 0xA0))
	Set IR register. More...

#define	getIR() (WIZCHIP_READ(IR) & 0xA0)
	Get IR register. More...

#define	setIMR(imr) WIZCHIP_WRITE(IMR2, imr & 0xA0)
	Set IMR2 register. More...

#define	getIMR() (WIZCHIP_READ(IMR2) & 0xA0)
	Get IMR2 register. More...

#define	setRTR(rtr)
	Set RTR register. More...

#define	getRTR() (((uint16_t)WIZCHIP_READ(_RTR_) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_RTR_,1)))
	Get RTR register. More...

#define	setRCR(rcr) WIZCHIP_WRITE(_RCR_, rcr)
	Set RCR register. More...

#define	getRCR() WIZCHIP_READ(_RCR_)
	Get RCR register. More...

#define	getPATR() (((uint16_t)WIZCHIP_READ(PATR) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PATR,1)))
	Get PATR register. More...

#define	getPPPALGO() WIZCHIP_READ(PPPALGO)
	Get PPPALGO register. More...

#define	getVERSIONR() WIZCHIP_READ(VERSIONR)
	Get VERSIONR register. More...

#define	setPTIMER(ptimer) WIZCHIP_WRITE(PTIMER, ptimer)
	Set PTIMER register. More...

#define	getPTIMER() WIZCHIP_READ(PTIMER)
	Get PTIMER register. More...

#define	setPMAGIC(pmagic) WIZCHIP_WRITE(PMAGIC, pmagic)
	Set PMAGIC register. More...

#define	getPMAGIC() WIZCHIP_READ(PMAGIC)
	Get PMAGIC register. More...

#define	setINTLEVEL(intlevel)
	Set INTLEVEL register. More...

#define	getINTLEVEL() (((uint16_t)WIZCHIP_READ(INTLEVEL) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(INTLEVEL,1)))
	Get INTLEVEL register. More...

#define	setIR2(ir2) WIZCHIP_WRITE(IR2, ir2)
	Set IR2 register. More...

#define	setSIR(ir2) setIR2(ir2)

#define	getIR2() WIZCHIP_READ(IR2)
	Get IR2 register. More...

#define	getSIR() getIR2()

#define	getPHYSTATUS() WIZCHIP_READ(PHYSTATUS)
	Get PHYSTATUS register. More...

#define	setIMR2(imr2) WIZCHIP_WRITE(_IMR_, imr2)
	Set IMR register. More...

#define	setSIMR(imr2) setIMR2(imr2)

#define	getIMR2() WIZCHIP_READ(_IMR_)
	Get IMR register. More...

#define	getSIMR() getIMR2()

#define	setSn_MR(sn, mr) WIZCHIP_WRITE(Sn_MR(sn),mr)
	Set Sn_MR register. More...

#define	getSn_MR(sn) WIZCHIP_READ(Sn_MR(sn))
	Get Sn_MR register. More...

#define	setSn_CR(sn, cr) WIZCHIP_WRITE(Sn_CR(sn), cr)
	Set Sn_CR register. More...

#define	getSn_CR(sn) WIZCHIP_READ(Sn_CR(sn))
	Get Sn_CR register. More...

#define	setSn_IR(sn, ir) WIZCHIP_WRITE(Sn_IR(sn), ir)
	Set Sn_IR register. More...

#define	getSn_IR(sn) WIZCHIP_READ(Sn_IR(sn))
	Get Sn_IR register. More...

#define	setSn_IMR(sn, imr) WIZCHIP_WRITE(Sn_IMR(sn), imr)
	Set Sn_IMR register. More...

#define	getSn_IMR(sn) WIZCHIP_READ(Sn_IMR(sn))
	Get Sn_IMR register. More...

#define	getSn_SR(sn) WIZCHIP_READ(Sn_SR(sn))
	Get Sn_SR register. More...

#define	setSn_PORT(sn, port)
	Set Sn_PORT register. More...

#define	getSn_PORT(sn) (((uint16_t)WIZCHIP_READ(Sn_PORT(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_PORT(sn),1)))
	Get Sn_PORT register. More...

#define	setSn_DHAR(sn, dhar) WIZCHIP_WRITE_BUF(Sn_DHAR(sn), dhar, 6)
	Set Sn_DHAR register. More...

#define	getSn_DHAR(sn, dhar) WIZCHIP_READ_BUF(Sn_DHAR(sn), dhar, 6)
	Get Sn_DHAR register. More...

#define	setSn_DIPR(sn, dipr) WIZCHIP_WRITE_BUF(Sn_DIPR(sn), dipr, 4)
	Set Sn_DIPR register. More...

#define	getSn_DIPR(sn, dipr) WIZCHIP_READ_BUF(Sn_DIPR(sn), dipr, 4)
	Get Sn_DIPR register. More...

#define	setSn_DPORT(sn, dport)
	Set Sn_DPORT register. More...

#define	getSn_DPORT(sn) (((uint16_t)WIZCHIP_READ(Sn_DPORT(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_DPORT(sn),1)))
	Get Sn_DPORT register. More...

#define	setSn_MSSR(sn, mss)
	Set Sn_MSSR register. More...

#define	getSn_MSSR(sn) (((uint16_t)WIZCHIP_READ(Sn_MSSR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_MSSR(sn),1)))
	Get Sn_MSSR register. More...

#define	setSn_PROTO(sn, proto) WIZCHIP_WRITE(Sn_PROTO(sn), proto)
	Set Sn_PROTO register. More...

#define	getSn_PROTO(sn) WIZCHIP_READ(Sn_PROTO(sn))
	Get Sn_PROTO register. More...

#define	setSn_TOS(sn, tos) WIZCHIP_WRITE(Sn_TOS(sn), tos)
	Set Sn_TOS register. More...

#define	getSn_TOS(sn) WIZCHIP_READ(Sn_TOS(sn))
	Get Sn_TOS register. More...

#define	setSn_TTL(sn, ttl) WIZCHIP_WRITE(Sn_TTL(sn), ttl)
	Set Sn_TTL register. More...

#define	getSn_TTL(sn) WIZCHIP_READ(Sn_TTL(sn))
	Get Sn_TTL register. More...

#define	setSn_RXMEM_SIZE(sn, rxmemsize) WIZCHIP_WRITE(Sn_RXMEM_SIZE(sn),rxmemsize)
	Set Sn_RXMEM_SIZE register. More...

#define	setSn_RXBUF_SIZE(sn, rxmemsize) setSn_RXMEM_SIZE(sn,rxmemsize)

#define	getSn_RXMEM_SIZE(sn) WIZCHIP_READ(Sn_RXMEM_SIZE(sn))
	Get Sn_RXMEM_SIZE register. More...

#define	getSn_RXBUF_SIZE(sn) getSn_RXMEM_SIZE(sn)

#define	setSn_TXMEM_SIZE(sn, txmemsize) WIZCHIP_WRITE(Sn_TXMEM_SIZE(sn), txmemsize)
	Set Sn_TXMEM_SIZE register. More...

#define	setSn_TXBUF_SIZE(sn, txmemsize) setSn_TXMEM_SIZE(sn,txmemsize)

#define	getSn_TXMEM_SIZE(sn) WIZCHIP_READ(Sn_TXMEM_SIZE(sn))
	Get Sn_TXMEM_SIZE register. More...

#define	getSn_TXBUF_SIZE(sn) getSn_TXMEM_SIZE(sn)

#define	getSn_TX_RD(sn) (((uint16_t)WIZCHIP_READ(Sn_TX_RD(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_RD(sn),1)))
	Get Sn_TX_RD register. More...

#define	setSn_TX_WR(sn, txwr)
	Set Sn_TX_WR register. More...

#define	getSn_TX_WR(sn) (((uint16_t)WIZCHIP_READ(Sn_TX_WR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_WR(sn),1)))
	Get Sn_TX_WR register. More...

#define	setSn_RX_RD(sn, rxrd)
	Set Sn_RX_RD register. More...

#define	getSn_RX_RD(sn) (((uint16_t)WIZCHIP_READ(Sn_RX_RD(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RD(sn),1)))
	Get Sn_RX_RD register. More...

#define	setSn_RX_WR(sn, rxwr)
	Set Sn_RX_WR register. More...

#define	getSn_RX_WR(sn) (((uint16_t)WIZCHIP_READ(Sn_RX_WR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_WR(sn),1)))
	Get Sn_RX_WR register. More...

#define	setSn_IMR(sn, imr) WIZCHIP_WRITE(Sn_IMR(sn), imr)
	Set Sn_IMR register. More...

#define	getSn_IMR(sn) WIZCHIP_READ(Sn_IMR(sn))
	Get Sn_IMR register. More...

#define	setSn_FRAG(sn, frag)
	Set Sn_FRAG register. More...

#define	getSn_FRAG(sn) (((uint16_t)WIZCHIP_READ(Sn_FRAG(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1)))
	Get Sn_FRAG register. More...

#define	getSn_RxMAX(sn) ((uint16_t)getSn_RXMEM_SIZE(sn) << 10)
	Get the max RX buffer size of socket sn. More...

#define	getSn_TxMAX(sn) ((uint16_t)getSn_TXMEM_SIZE(sn) << 10)
	Get the max TX buffer size of socket sn. More...

#define	getSn_RxMASK(sn) ((uint16_t)getSn_RxMAX(sn) - 1)
	Get the mask of socket sn RX buffer. More...

#define	getSn_TxMASK(sn) ((uint16_t)getSn_TxMAX(sn) - 1)
	Get the mask of socket sn TX buffer. More...

Functions
uint8_t	WIZCHIP_READ (uint32_t AddrSel)
	It reads 1 byte value from a register. More...

void	WIZCHIP_WRITE (uint32_t AddrSel, uint8_t wb)
	It writes 1 byte value to a register. More...

void	WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t *pBuf, uint16_t len)
	It reads sequence data from registers. More...

void	WIZCHIP_WRITE_BUF (uint32_t AddrSel, uint8_t *pBuf, uint16_t len)
	It writes sequence data to registers. More...

uint16_t	getSn_TX_FSR (uint8_t sn)
	Get Sn_TX_FSR register. More...

uint16_t	getSn_RX_RSR (uint8_t sn)
	Get Sn_RX_RSR register. More...

uint16_t	getSn_RxBASE (uint8_t sn)
	Get the base address of socket sn RX buffer. More...

uint16_t	getSn_TxBASE (uint8_t sn)
	Get the base address of socket sn TX buffer. More...

void	wiz_send_data (uint8_t sn, uint8_t *wizdata, uint16_t len)
	It copies data to internal TX memory. More...

void	wiz_recv_data (uint8_t sn, uint8_t *wizdata, uint16_t len)
	It copies data to your buffer from internal RX memory. More...

void	wiz_recv_ignore (uint8_t sn, uint16_t len)
	It discard the received data in RX memory. More...

Detailed Description

W5200 HAL Header File.

Version: 1.0.0

Date: 2015/03/23

Revision history: <2013/10/21> 1st Release

Author: MidnightCow

Copyright

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

* Redistributions of source code must retain the above copyright

notice, this list of conditions and the following disclaimer.

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Definition in file w5200.h.

Macro Definition Documentation

#define _WIZCHIP_SN_BASE_ (0x4000)

Definition at line 50 of file w5200.h.

#define _WIZCHIP_SN_SIZE_ (0x0100)

Definition at line 51 of file w5200.h.

#define _WIZCHIP_IO_TXBUF_ (0x8000) /* Internal Tx buffer address of the iinchip */

Definition at line 52 of file w5200.h.

#define _WIZCHIP_IO_RXBUF_ (0xC000) /* Internal Rx buffer address of the iinchip */

Definition at line 53 of file w5200.h.

#define _W5200_SPI_READ_ (0x00 << 7)

SPI interface Read operation in Control Phase.

Definition at line 55 of file w5200.h.

#define _W5200_SPI_WRITE_ (0x01 << 7)

SPI interface Write operation in Control Phase.

Definition at line 56 of file w5200.h.

#define WIZCHIP_CREG_BLOCK 0x00

Common register block.

Definition at line 58 of file w5200.h.

#define WIZCHIP_SREG_BLOCK ( N ) (_WIZCHIP_SN_BASE_+ _WIZCHIP_SN_SIZE_*N)

Socket N register block.

Definition at line 59 of file w5200.h.

#define WIZCHIP_OFFSET_INC	(	ADDR,
		N
	)	(ADDR + N)

Increase offset address.

Definition at line 61 of file w5200.h.

#define IINCHIP_READ ( ADDR ) WIZCHIP_READ(ADDR)

The defined for legacy chip driver.

Definition at line 75 of file w5200.h.

#define IINCHIP_WRITE	(	ADDR,
		VAL
	)	WIZCHIP_WRITE(ADDR,VAL)

The defined for legacy chip driver.

Definition at line 76 of file w5200.h.

#define IINCHIP_READ_BUF	(	ADDR,
		BUF,
		LEN
	)	WIZCHIP_READ_BUF(ADDR,BUF,LEN)

The defined for legacy chip driver.

Definition at line 77 of file w5200.h.

#define IINCHIP_WRITE_BUF	(	ADDR,
		BUF,
		LEN
	)	WIZCHIP_WRITE(ADDR,BUF,LEN)

The defined for legacy chip driver.

Definition at line 78 of file w5200.h.

#define MR_RST 0x80

Reset.

If this bit is All internal registers will be initialized. It will be automatically cleared as after S/W reset.reset

Definition at line 694 of file w5200.h.

#define MR_WOL 0x20

Wake on LAN.

0 : Disable WOL mode
1 : Enable WOL mode
If WOL mode is enabled and the received magic packet over UDP has been normally processed, the Interrupt PIN (INTn) asserts to low. When using WOL mode, the UDP Socket should be opened with any source port number. (Refer to Socket n Mode Register (Sn_MR) for opening Socket.)

Note: The magic packet over UDP supported by W5200 consists of 6 bytes synchronization stream (xFFFFFFFFFFFF and 16 times Target MAC address stream in UDP payload. The options such like password are ignored. You can use any UDP source port number for WOL mode.Wake on Lan

Definition at line 705 of file w5200.h.

#define MR_PB 0x10

Ping block.

0 : Disable Ping block
1 : Enable Ping block
If the bit is it blocks the response to a ping request.ping block

Definition at line 713 of file w5200.h.

#define MR_PPPOE 0x08

Enable PPPoE.

0 : DisablePPPoE mode
1 : EnablePPPoE mode
If you use ADSL, this bit should be '1'.enable pppoe

Definition at line 721 of file w5200.h.

#define MR_AI 0x02

Address Auto-Increment in Indirect Bus Interface.

0 : Disable auto-increment
1 : Enable auto-incremente
At the Indirect Bus Interface mode, if this bit is set as ��1��, the address will be automatically increased by 1 whenever read and write are performed.auto-increment in indirect mode

Definition at line 730 of file w5200.h.

#define MR_IND 0x01

Indirect Bus Interface mode.

0 : Disable Indirect bus Interface mode
1 : Enable Indirect bus Interface mode
If this bit is set as ��1��, Indirect Bus Interface mode is set.enable indirect mode

Definition at line 738 of file w5200.h.

#define IR_CONFLICT 0x80

Check IP conflict.

Bit is set as when own source IP address is same with the sender IP address in the received ARP request.check ip confict

Definition at line 745 of file w5200.h.

#define IR_PPPoE 0x20

Get the PPPoE close message.

When PPPoE is disconnected during PPPoE mode, this bit is set.get the PPPoE close message

Definition at line 751 of file w5200.h.

#define PHYSTATUS_LINK 0x20

Link Status [Read Only].

0: Link down
1: Link up

Definition at line 757 of file w5200.h.

Referenced by wizphy_getphylink().

#define PHYSTATUS_POWERSAVE 0x10

Power save mode of PHY.

0: Disable Power save mode
1: Enable Power save mode

Definition at line 763 of file w5200.h.

#define PHYSTATUS_POWERDOWN 0x08

Power down mode of PHY.

0: Disable Power down mode
1: Enable Power down mode

Definition at line 769 of file w5200.h.

Referenced by wizphy_getphypmode().

#define Sn_MR_CLOSE 0x00

Unused socket.

This configures the protocol mode of Socket n.unused socket

Definition at line 777 of file w5200.h.

#define Sn_MR_TCP 0x01

TCP.

This configures the protocol mode of Socket n.TCP

Definition at line 783 of file w5200.h.

#define Sn_MR_UDP 0x02

UDP.

This configures the protocol mode of Socket n.UDP

Definition at line 789 of file w5200.h.

#define Sn_MR_IPRAW 0x03

IP LAYER RAW SOCK.

Definition at line 790 of file w5200.h.

#define Sn_MR_MACRAW 0x04

MAC LAYER RAW SOCK.

This configures the protocol mode of Socket n.

Note: MACRAW mode should be only used in Socket 0.MAC LAYER RAW SOCK

Definition at line 797 of file w5200.h.

#define Sn_MR_PPPOE 0x05

PPPoE.

This configures the protocol mode of Socket n.

Note: PPPoE mode should be only used in Socket 0.PPPoE

Definition at line 804 of file w5200.h.

#define Sn_MR_ND 0x20

No Delayed Ack(TCP), Multicast flag.

0 : Disable No Delayed ACK option
1 : Enable No Delayed ACK option
This bit is applied only during TCP mode (P[3:0] = 001).
When this bit is It sends the ACK packet without delay as soon as a Data packet is received from a peer.
When this bit is It sends the ACK packet after waiting for the timeout time configured by RTR.No Delayed Ack(TCP) flag

Definition at line 814 of file w5200.h.

#define Sn_MR_MC Sn_MR_ND

Support UDP Multicasting.

0 : disable Multicasting
1 : enable Multicasting
This bit is applied only during UDP mode(P[3:0] = 010).
To use multicasting, Sn_DIPR & Sn_DPORT should be respectively configured with the multicast group IP address & port number before Socket n is opened by OPEN command of Sn_CR.Select IGMP version 1(0) or 2(1)

Definition at line 825 of file w5200.h.

#define Sn_MR_MF 0x40

Multicast Blocking in Sn_MR_MACRAW mode.

0 : using IGMP version 2
1 : using IGMP version 1
This bit is applied only during UDP mode(P[3:0] = 010 and MULTI = '1') It configures the version for IGMP messages (Join/Leave/Report).Use MAC filter

Definition at line 834 of file w5200.h.

#define Sn_MR_MFEN Sn_MR_MF

Definition at line 835 of file w5200.h.

#define Sn_MR_MULTI 0x80

Support UDP Multicasting.

0 : disable Multicasting
1 : enable Multicasting
This bit is applied only during UDP mode(P[3:0] = 010).
To use multicasting, Sn_DIPR & Sn_DPORT should be respectively configured with the multicast group IP address & port number before Socket n is opened by OPEN command of Sn_CR.support multicating

Definition at line 846 of file w5200.h.

#define Sn_CR_OPEN 0x01

Initialize or open socket.

Socket n is initialized and opened according to the protocol selected in Sn_MR(P3:P0). The table below shows the value of Sn_SR corresponding to Sn_MR.

Sn_MR (P[3:0])	Sn_SR
Sn_MR_CLOSE (000)	–
Sn_MR_TCP (001)	SOCK_INIT (0x13)
Sn_MR_UDP (010)	SOCK_UDP (0x22)
S0_MR_IPRAW (011)	SOCK_IPRAW (0x32)
S0_MR_MACRAW (100)	SOCK_MACRAW (0x42)
S0_MR_PPPoE (101)	SOCK_PPPoE (0x5F)

initialize or open socket

Definition at line 863 of file w5200.h.

#define Sn_CR_LISTEN 0x02

Wait connection request in TCP mode(Server mode)

This is valid only in TCP mode (Sn_MR(P3:P0) = Sn_MR_TCP).// In this mode, Socket n operates as a 'TCP server' and waits for connection-request (SYN packet) from any 'TCP client'.// The Sn_SR changes the state from SOCK_INIT to SOCKET_LISTEN.// When a 'TCP client' connection request is successfully established, the Sn_SR changes from SOCK_LISTEN to SOCK_ESTABLISHED and the Sn_IR(0) becomes But when a 'TCP client' connection request is failed, Sn_IR(3) becomes and the status of Sn_SR changes to SOCK_CLOSED.wait connection request in tcp mode(Server mode)

Definition at line 874 of file w5200.h.

#define Sn_CR_CONNECT 0x04

Send connection request in TCP mode(Client mode)

To connect, a connect-request (SYN packet) is sent to TCP serverconfigured by Sn_DIPR & Sn_DPORT(destination address & port). If the connect-request is successful, the Sn_SR is changed to SOCK_ESTABLISHED and the Sn_IR(0) becomes

The connect-request fails in the following three cases.

When a ARPTO occurs (Sn_IR[3] = '1') because destination hardware address is not acquired through the ARP-process.
When a SYN/ACK packet is not received and TCPTO (Sn_IR(3) ='1')
When a RST packet is received instead of a SYN/ACK packet. In these cases, Sn_SR is changed to SOCK_CLOSED.
Note
This is valid only in TCP mode and operates when Socket n acts as TCP clientsend connection request in tcp mode(Client mode)

Definition at line 886 of file w5200.h.

#define Sn_CR_DISCON 0x08

Send closing request in TCP mode.

Regardless of TCP serveror TCP client the DISCON command processes the disconnect-process (Active closeor Passive close.

Active close: it transmits disconnect-request(FIN packet) to the connected peer

Passive close: When FIN packet is received from peer, a FIN packet is replied back to the peer.

When the disconnect-process is successful (that is, FIN/ACK packet is received successfully), Sn_SR is changed to SOCK_CLOSED.
Otherwise, TCPTO occurs (Sn_IR(3)='1') and then Sn_SR is changed to SOCK_CLOSED.

Note: Valid only in TCP mode.send closing reqeuset in tcp mode

Definition at line 899 of file w5200.h.

#define Sn_CR_CLOSE 0x10

Close socket.

Sn_SR is changed to SOCK_CLOSED.

Definition at line 905 of file w5200.h.

#define Sn_CR_SEND 0x20

Update TX buffer pointer and send data.

SEND transmits all the data in the Socket n TX buffer.
For more details, please refer to Socket n TX Free Size Register (Sn_TX_FSR), Socket n, TX Write Pointer Register(Sn_TX_WR), and Socket n TX Read Pointer Register(Sn_TX_RD).

Definition at line 913 of file w5200.h.

#define Sn_CR_SEND_MAC 0x21

Send data with MAC address, so without ARP process.

The basic operation is same as SEND.
Normally SEND transmits data after destination hardware address is acquired by the automatic ARP-process(Address Resolution Protocol).
But SEND_MAC transmits data without the automatic ARP-process.
In this case, the destination hardware address is acquired from Sn_DHAR configured by host, instead of APR-process.

Note: Valid only in UDP mode.

Definition at line 923 of file w5200.h.

#define Sn_CR_SEND_KEEP 0x22

Send keep alive message.

It checks the connection status by sending 1byte keep-alive packet.
If the peer can not respond to the keep-alive packet during timeout time, the connection is terminated and the timeout interrupt will occur.

Note: Valid only in TCP mode.

Definition at line 931 of file w5200.h.

#define Sn_CR_RECV 0x40

Update RX buffer pointer and receive data.

RECV completes the processing of the received data in Socket n RX Buffer by using a RX read pointer register (Sn_RX_RD).
For more details, refer to Socket n RX Received Size Register (Sn_RX_RSR), Socket n RX Write Pointer Register (Sn_RX_WR), and Socket n RX Read Pointer Register (Sn_RX_RD).

Definition at line 939 of file w5200.h.

#define Sn_CR_PCON 0x23

PPPoE connection.

PPPoE connection begins by transmitting PPPoE discovery packet

Definition at line 945 of file w5200.h.

#define Sn_CR_PDISCON 0x24

Closes PPPoE connection.

Closes PPPoE connection

Definition at line 951 of file w5200.h.

#define Sn_CR_PCR 0x25

REQ message transmission.

In each phase, it transmits REQ message.

Definition at line 957 of file w5200.h.

#define Sn_CR_PCN 0x26

NAK massage transmission.

In each phase, it transmits NAK message.

Definition at line 963 of file w5200.h.

#define Sn_CR_PCJ 0x27

REJECT message transmission.

In each phase, it transmits REJECT message.

Definition at line 969 of file w5200.h.

#define Sn_IR_PRECV 0x80

PPP Receive Interrupt.

PPP Receive Interrupts when the option which is not supported is received.

Definition at line 976 of file w5200.h.

#define Sn_IR_PFAIL 0x40

PPP Fail Interrupt.

PPP Fail Interrupts when PAP Authentication is failed.

Definition at line 982 of file w5200.h.

#define Sn_IR_PNEXT 0x20

PPP Next Phase Interrupt.

PPP Next Phase Interrupts when the phase is changed during ADSL connection process.

Definition at line 988 of file w5200.h.

#define Sn_IR_SENDOK 0x10

SEND_OK Interrupt.

This is issued when SEND command is completed.complete sending

Definition at line 994 of file w5200.h.

#define Sn_IR_TIMEOUT 0x08

TIMEOUT Interrupt.

This is issued when ARPTO or TCPTO occurs.assert timeout

Definition at line 1000 of file w5200.h.

#define Sn_IR_RECV 0x04

RECV Interrupt.

This is issued whenever data is received from a peer.

Definition at line 1006 of file w5200.h.

#define Sn_IR_DISCON 0x02

DISCON Interrupt.

This is issued when FIN or FIN/ACK packet is received from a peer.

Definition at line 1012 of file w5200.h.

#define Sn_IR_CON 0x01

CON Interrupt.

This is issued one time when the connection with peer is successful and then Sn_SR is changed to SOCK_ESTABLISHED.

Definition at line 1018 of file w5200.h.

#define SOCK_CLOSED 0x00

Closed.

This indicates that Socket n is released.
When DICON, CLOSE command is ordered, or when a timeout occurs, it is changed to SOCK_CLOSED regardless of previous status.closed

Definition at line 1026 of file w5200.h.

#define SOCK_INIT 0x13

Initiate state.

This indicates Socket n is opened with TCP mode.
It is changed to SOCK_INIT when Sn_MR(P[3:0]) = 001)and OPEN command is ordered.
After SOCK_INIT, user can use LISTEN /CONNECT command.init state

Definition at line 1034 of file w5200.h.

#define SOCK_LISTEN 0x14

Listen state.

This indicates Socket n is operating as TCP servermode and waiting for connection-request (SYN packet) from a peer (TCP client).
It will change to SOCK_ESTABLISHED when the connection-request is successfully accepted.
Otherwise it will change to SOCK_CLOSED after TCPTO occurred (Sn_IR(TIMEOUT) = '1').

Definition at line 1042 of file w5200.h.

#define SOCK_SYNSENT 0x15

Connection state.

This indicates Socket n sent the connect-request packet (SYN packet) to a peer.
It is temporarily shown when Sn_SR is changed from SOCK_INIT to SOCK_ESTABLISHED by CONNECT command.
If connect-accept(SYN/ACK packet) is received from the peer at SOCK_SYNSENT, it changes to SOCK_ESTABLISHED.
Otherwise, it changes to SOCK_CLOSED after TCPTO (Sn_IR[TIMEOUT] = '1') is occurred.

Definition at line 1051 of file w5200.h.

#define SOCK_SYNRECV 0x16

Connection state.

It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.
If socket n sends the response (SYN/ACK packet) to the peer successfully, it changes to SOCK_ESTABLISHED.
If not, it changes to SOCK_CLOSED after timeout occurs (Sn_IR[TIMEOUT] = '1').

Definition at line 1059 of file w5200.h.

#define SOCK_ESTABLISHED 0x17

Success to connect.

This indicates the status of the connection of Socket n.
It changes to SOCK_ESTABLISHED when the TCP SERVERprocessed the SYN packet from the TCP CLIENTduring SOCK_LISTEN, or when the CONNECT command is successful.
During SOCK_ESTABLISHED, DATA packet can be transferred using SEND or RECV command.

Definition at line 1068 of file w5200.h.

#define SOCK_FIN_WAIT 0x18

Closing state.

These indicate Socket n is closing.
These are shown in disconnect-process such as active-close and passive-close.
When Disconnect-process is successfully completed, or when timeout occurs, these change to SOCK_CLOSED.

Definition at line 1076 of file w5200.h.

#define SOCK_CLOSING 0x1A

Closing state.

These indicate Socket n is closing.
These are shown in disconnect-process such as active-close and passive-close.
When Disconnect-process is successfully completed, or when timeout occurs, these change to SOCK_CLOSED.

Definition at line 1084 of file w5200.h.

#define SOCK_TIME_WAIT 0x1B

Closing state.

These indicate Socket n is closing.
These are shown in disconnect-process such as active-close and passive-close.
When Disconnect-process is successfully completed, or when timeout occurs, these change to SOCK_CLOSED.

Definition at line 1092 of file w5200.h.

#define SOCK_CLOSE_WAIT 0x1C

Closing state.

This indicates Socket n received the disconnect-request (FIN packet) from the connected peer.
This is half-closing status, and data can be transferred.
For full-closing, DISCON command is used. But For just-closing, CLOSE command is used.

Definition at line 1100 of file w5200.h.

#define SOCK_LAST_ACK 0x1D

Closing state.

This indicates Socket n is waiting for the response (FIN/ACK packet) to the disconnect-request (FIN packet) by passive-close.
It changes to SOCK_CLOSED when Socket n received the response successfully, or when timeout occurs (Sn_IR[TIMEOUT] = '1').

Definition at line 1107 of file w5200.h.

#define SOCK_UDP 0x22

UDP socket.

This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010).
It changes to SOCK_UDP when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.
Unlike TCP mode, data can be transfered without the connection-process.udp socket

Definition at line 1115 of file w5200.h.

#define SOCK_IPRAW 0x32

IP raw mode socket.

TThe socket is opened in IPRAW mode. The SOCKET status is change to SOCK_IPRAW when Sn_MR (P3:P0) is Sn_MR_IPRAW and OPEN command is used.
IP Packet can be transferred without a connection similar to the UDP mode.ip raw mode socket

Definition at line 1123 of file w5200.h.

#define SOCK_MACRAW 0x42

MAC raw mode socket.

This indicates Socket 0 is opened in MACRAW mode (S0_MR(P[3:0]) = 100and is valid only in Socket 0.
It changes to SOCK_MACRAW when S0_MR(P[3:0] = 100)and OPEN command is ordered.
Like UDP mode socket, MACRAW mode Socket 0 can transfer a MAC packet (Ethernet frame) without the connection-process.mac raw mode socket

Definition at line 1131 of file w5200.h.

#define SOCK_PPPOE 0x5F

PPPoE mode socket.

It is the status that SOCKET0 is open as PPPoE mode. It is changed to SOCK_PPPoE in case of S0_CR=OPEN and S0_MR (P3:P0)=S0_MR_PPPoE.
It is temporarily used at the PPPoE connection.pppoe socket

Definition at line 1140 of file w5200.h.

#define IPPROTO_IP 0

Dummy for IP.

Definition at line 1143 of file w5200.h.

#define IPPROTO_ICMP 1

Control message protocol.

Definition at line 1144 of file w5200.h.

#define IPPROTO_IGMP 2

Internet group management protocol.

Definition at line 1145 of file w5200.h.

#define IPPROTO_GGP 3

GW^2 (deprecated)

Definition at line 1146 of file w5200.h.

#define IPPROTO_TCP 6

TCP.

Definition at line 1147 of file w5200.h.

#define IPPROTO_PUP 12

PUP.

Definition at line 1148 of file w5200.h.

#define IPPROTO_UDP 17

UDP.

Definition at line 1149 of file w5200.h.

#define IPPROTO_IDP 22

XNS idp.

Definition at line 1150 of file w5200.h.

#define IPPROTO_ND 77

UNOFFICIAL net disk protocol.

Definition at line 1151 of file w5200.h.

#define IPPROTO_RAW 255

Raw IP packet.

Definition at line 1152 of file w5200.h.

#define WIZCHIP_CRITICAL_ENTER ( ) WIZCHIP.CRIS._enter()

Enter a critical section.

It is provided to protect your shared code which are executed without distribution.

In non-OS environment, It can be just implemented by disabling whole interrupt.
In OS environment, You can replace it to critical section api supported by OS.

See also: WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF(); WIZCHIP_CRITICAL_EXIT()

Definition at line 1165 of file w5200.h.

#define WIZCHIP_CRITICAL_EXIT ( ) WIZCHIP.CRIS._exit()

Exit a critical section.

It is provided to protect your shared code which are executed without distribution.

In non-OS environment, It can be just implemented by disabling whole interrupt.
In OS environment, You can replace it to critical section api supported by OS.