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Socket APIs
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Socket register group
Socket register configures and control SOCKETn which is necessary to data communication.
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Macros | |
| #define | Sn_MR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0000)) |
| socket Mode register(R/W) More... | |
| #define | Sn_CR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0001)) |
| Socket command register(R/W) More... | |
| #define | Sn_IR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0002)) |
| Socket interrupt register(R) More... | |
| #define | Sn_SR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0003)) |
| Socket status register(R) More... | |
| #define | Sn_PORT(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0004)) |
| source port register(R/W) More... | |
| #define | Sn_DHAR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0006)) |
| Peer MAC register address(R/W) More... | |
| #define | Sn_DIPR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x000C)) |
| Peer IP register address(R/W) More... | |
| #define | Sn_DPORT(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0010)) |
| Peer port register address(R/W) More... | |
| #define | Sn_MSSR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0012)) |
| Maximum Segment Size(Sn_MSSR0) register address(R/W) More... | |
| #define | Sn_PROTO(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0014)) |
| IP Protocol(PROTO) Register(R/W) More... | |
| #define | Sn_TOS(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + 0x0015) |
| IP Type of Service(TOS) Register(R/W) More... | |
| #define | Sn_TTL(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0016)) |
| IP Time to live(TTL) Register(R/W) More... | |
| #define | Sn_TX_FSR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0020)) |
| Transmit free memory size register(R) More... | |
| #define | Sn_TX_RD(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0022)) |
| Transmit memory read pointer register address(R) More... | |
| #define | Sn_TX_WR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0024)) |
| Transmit memory write pointer register address(R/W) More... | |
| #define | Sn_RX_RSR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0026)) |
| Received data size register(R) More... | |
| #define | Sn_RX_RD(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0028)) |
| Read point of Receive memory(R/W) More... | |
| #define | Sn_RX_WR(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x002A)) |
| Write point of Receive memory(R) More... | |
Detailed Description
Socket register group
Socket register configures and control SOCKETn which is necessary to data communication.
- See also
- Sn_MR, Sn_CR, Sn_IR : SOCKETn Control
- Sn_SR, Sn_PORT, Sn_DHAR, Sn_DIPR, Sn_DPORT : SOCKETn Information
- Sn_MSSR, Sn_TOS, Sn_TTL, Sn_FRAG : Internet protocol.
- Sn_RXMEM_SIZE, Sn_TXMEM_SIZE, Sn_TX_FSR, Sn_TX_RD, Sn_TX_WR, Sn_RX_RSR, Sn_RX_RD, Sn_RX_WR : Data communication
Macro Definition Documentation
| #define Sn_MR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0000)) |
socket Mode register(R/W)
Sn_MR configures the option or protocol type of Socket n.
Each bit of Sn_MR defined as the following.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| MULTI | MF | ND/MC | Reserved | Protocol[3] | Protocol[2] | Protocol[1] | Protocol[0] |
- Sn_MR_MULTI : Support UDP Multicasting
- Sn_MR_MF : Support MACRAW
- Sn_MR_ND : No Delayed Ack(TCP) flag
- Sn_MR_MC : IGMP version used in UDP mulitcasting
- Protocol
Protocol[3] Protocol[2] Protocol[1] Protocol[0] Meaning 0 0 0 0 Closed 0 0 0 1 TCP 0 0 1 0 UDP 0 1 0 0 MACRAW - In case of Socket 0
Protocol[3] Protocol[2] Protocol[1] Protocol[0] Meaning 0 1 0 0 MACRAW 0 1 0 1 PPPoE - Sn_MR_MACRAW : MAC LAYER RAW SOCK
- Sn_MR_MACRAW : MAC LAYER RAW SOCK
Sn_MR_UDP : UDP
- Sn_MR_TCP : TCP
- Sn_MR_CLOSE : Unused socket
- Note
- MACRAW mode should be only used in Socket 0.
| #define Sn_CR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0001)) |
Socket command register(R/W)
This is used to set the command for Socket n such as OPEN, CLOSE, CONNECT, LISTEN, SEND, and RECEIVE.
After W5100 accepts the command, the Sn_CR register is automatically cleared to 0x00. Even though Sn_CR is cleared to 0x00, the command is still being processed.
To check whether the command is completed or not, please check the Sn_IR or Sn_SR.
- Sn_CR_OPEN : Initialize or open socket.
- Sn_CR_LISTEN : Wait connection request in TCP mode(Server mode)
- Sn_CR_CONNECT : Send connection request in TCP mode(Client mode)
- Sn_CR_DISCON : Send closing request in TCP mode.
- Sn_CR_CLOSE : Close socket.
- Sn_CR_SEND : Update TX buffer pointer and send data.
- Sn_CR_SEND_MAC : Send data with MAC address, so without ARP process.
- Sn_CR_SEND_KEEP : Send keep alive message.
- Sn_CR_RECV : Update RX buffer pointer and receive data.
- In case of S0_MR(P3:P0) = S0_MR_PPPoE
Value Symbol Description 0x23 PCON PPPoE connection begins by transmitting PPPoE discovery packet 0x24 PDISCON Closes PPPoE connection 0x25 PCR In each phase, it transmits REQ message. 0x26 PCN In each phase, it transmits NAK message. 0x27 PCJ In each phase, it transmits REJECT message.
| #define Sn_IR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0002)) |
Socket interrupt register(R)
Sn_IR indicates the status of Socket Interrupt such as establishment, termination, receiving data, timeout).
When an interrupt occurs and the corresponding bit IR_SOCK(N) in IMR are set, IR_SOCK(N) in IR becomes '1'.
In order to clear the Sn_IR bit, the host should write the bit to
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PRECV | PFAIL | PNEXT | SEND_OK | TIMEOUT | RECV | DISCON | CON |
- Sn_IR_PRECV : PPP Receive Interrupt
- Sn_IR_PFAIL : PPP Fail Interrupt
- Sn_IR_PNEXT : PPP Next Phase Interrupt
- Sn_IR_SENDOK : SEND_OK Interrupt
- Sn_IR_TIMEOUT : TIMEOUT Interrupt
- Sn_IR_RECV : RECV Interrupt
- Sn_IR_DISCON : DISCON Interrupt
- Sn_IR_CON : CON Interrupt
| #define Sn_SR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0003)) |
Socket status register(R)
Sn_SR indicates the status of Socket n.
The status of Socket n is changed by Sn_CR or some special control packet as SYN, FIN packet in TCP.
- Normal status
- SOCK_CLOSED : Closed
- SOCK_INIT : Initiate state
- SOCK_LISTEN : Listen state
- SOCK_ESTABLISHED : Success to connect
- SOCK_CLOSE_WAIT : Closing state
- SOCK_UDP : UDP socket
- SOCK_MACRAW : MAC raw mode socket
- Temporary status during changing the status of Socket n.
- SOCK_SYNSENT : This indicates Socket n sent the connect-request packet (SYN packet) to a peer.
- SOCK_SYNRECV : It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.
- SOCK_FIN_WAIT : Connection state
- SOCK_CLOSING : Closing state
- SOCK_TIME_WAIT : Closing state
- SOCK_LAST_ACK : Closing state
| #define Sn_PORT | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0004)) |
| #define Sn_DHAR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0006)) |
| #define Sn_DIPR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x000C)) |
Peer IP register address(R/W)
Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode. In TCP client mode, it configures an IP address of TCP server before CONNECT command. In TCP server mode, it indicates an IP address of TCP client after successfully establishing connection. In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command.
| #define Sn_DPORT | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0010)) |
Peer port register address(R/W)
Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode. In TCP clientmode, it configures the listen port number of TCP server before CONNECT command. In TCP Servermode, it indicates the port number of TCP client after successfully establishing connection. In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command.
| #define Sn_MSSR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0012)) |
| #define Sn_PROTO | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0014)) |
| #define Sn_TOS | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + 0x0015) |
| #define Sn_TTL | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0016)) |
| #define Sn_TX_FSR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0020)) |
Transmit free memory size register(R)
Sn_TX_FSR indicates the free size of Socket n TX Buffer Block. It is initialized to the configured size by Sn_TXMEM_SIZE. Data bigger than Sn_TX_FSR should not be saved in the Socket n TX Buffer because the bigger data overwrites the previous saved data not yet sent. Therefore, check before saving the data to the Socket n TX Buffer, and if data is equal or smaller than its checked size, transmit the data with SEND/SEND_MAC command after saving the data in Socket n TX buffer. But, if data is bigger than its checked size, transmit the data after dividing into the checked size and saving in the Socket n TX buffer.
| #define Sn_TX_RD | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0022)) |
Transmit memory read pointer register address(R)
Sn_TX_RD is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001), it is re-initialized while connecting with TCP. After its initialization, it is auto-increased by SEND command. SEND command transmits the saved data from the current Sn_TX_RD to the Sn_TX_WR in the Socket n TX Buffer. After transmitting the saved data, the SEND command increases the Sn_TX_RD as same as the Sn_TX_WR. If its increment value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), then the carry bit is ignored and will automatically update with the lower 16bits value.
| #define Sn_TX_WR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0024)) |
Transmit memory write pointer register address(R/W)
Sn_TX_WR is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001), it is re-initialized while connecting with TCP.
It should be read or be updated like as follows.
- Read the starting address for saving the transmitting data.
- Save the transmitting data from the starting address of Socket n TX buffer.
- After saving the transmitting data, update Sn_TX_WR to the increased value as many as transmitting data size. If the increment value exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry bit occurs), then the carry bit is ignored and will automatically update with the lower 16bits value.
- Transmit the saved data in Socket n TX Buffer by using SEND/SEND command
| #define Sn_RX_RSR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0026)) |
Received data size register(R)
Sn_RX_RSR indicates the data size received and saved in Socket n RX Buffer. Sn_RX_RSR does not exceed the Sn_RXMEM_SIZE and is calculated as the difference between Socket n RX Write Pointer (Sn_RX_WR)and Socket n RX Read Pointer (Sn_RX_RD)
| #define Sn_RX_RD | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0028)) |
Read point of Receive memory(R/W)
Sn_RX_RD is initialized by OPEN command. Make sure to be read or updated as follows.
- Read the starting save address of the received data.
- Read data from the starting address of Socket n RX Buffer.
- After reading the received data, Update Sn_RX_RD to the increased value as many as the reading size. If the increment value exceeds the maximum value 0xFFFF, that is, is greater than 0x10000 and the carry bit occurs, update with the lower 16bits value ignored the carry bit.
- Order RECV command is for notifying the updated Sn_RX_RD to W5100.
| #define Sn_RX_WR | ( | sn | ) | (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x002A)) |
Write point of Receive memory(R)
Sn_RX_WR is initialized by OPEN command and it is auto-increased by the data reception. If the increased value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), then the carry bit is ignored and will automatically update with the lower 16bits value.
Generated on Wed May 4 2016 16:44:00 for Socket APIs by
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