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Socket APIs
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Socket register group.
Socket register configures and control SOCKETn which is necessary to data communication.
More...
Macros | |
| #define | Sn_MR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x00) |
| Socket Mode register(R/W) More... | |
| #define | Sn_CR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x02) |
| Socket command register(R/W) More... | |
| #define | Sn_IMR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x04) |
| socket interrupt mask register(R) More... | |
| #define | Sn_IR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x06) |
| Socket interrupt register(R) More... | |
| #define | Sn_SSR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x08) |
| Socket status register(R) More... | |
| #define | Sn_PORTR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x0A) |
| source port register(R/W) More... | |
| #define | Sn_DHAR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x0C) |
| Peer MAC register address(R/W) More... | |
| #define | Sn_DPORTR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x12) |
| Peer port register address(R/W) More... | |
| #define | Sn_DIPR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x14) |
| Peer IP register address(R/W) More... | |
| #define | Sn_MSSR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x18) |
| Maximum Segment Size(Sn_MSSR0) register address(R/W) More... | |
| #define | Sn_KPALVTR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x1A) |
| Keep Alive Timer register(R/W) More... | |
| #define | Sn_PROTOR(n) Sn_KPALVTR(n) |
| IP Protocol(PROTO) Register(R/W) More... | |
| #define | Sn_TOSR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x1C) |
| IP Type of Service(TOS) Register(R/W) More... | |
| #define | Sn_TTLR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x1E) |
| IP Time to live(TTL) Register(R/W) More... | |
| #define | Sn_TX_WRSR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x20) |
| SOCKETn TX write size register(R/W) More... | |
| #define | Sn_TX_FSR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x0024) |
| Transmit free memory size register(R) More... | |
| #define | Sn_FRAGR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x002C) |
| Fragment field value in IP header register(R/W) More... | |
| #define | Sn_TX_FIFOR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x2E) |
| SOCKET n TX FIFO regsiter. More... | |
| #define | Sn_RX_FIFOR(n) (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x30) |
| SOCKET n RX FIFO register. More... | |
Detailed Description
Socket register group.
Socket register configures and control SOCKETn which is necessary to data communication.
- See also
- Sn_MR, Sn_CR, Sn_IR, Sn_IMR : SOCKETn Control
- Sn_SR, Sn_PORT, Sn_DHAR, Sn_DIPR, Sn_DPORT : SOCKETn Information
- Sn_MSSR, Sn_TOS, Sn_TTL, Sn_KPALVTR, Sn_FRAG : Internet protocol.
- Sn_TX_WRSR, Sn_TX_FSR, Sn_TX_RD, Sn_TX_WR, Sn_RX_RSR, Sn_RX_RD, Sn_RX_WR, Sn_TX_FIFOR, Sn_RX_FIFOR : Data communication
Macro Definition Documentation
| #define Sn_MR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x00) |
Socket Mode register(R/W)
Sn_MR configures the option or protocol type of Socket n.
Each bit of Sn_MR defined as the following.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| Reserved. Read as 0 | ALIGN | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| MULTI | MF | ND/IGMPv | Reserved | PROTOCOL[3:0] | |||
- Sn_MR_ALIGN : Alignment bit of Sn_MR, Only valid in Sn_MR_TCP. (C0 : Include TCP PACK_INFO, 1 : Not include TCP PACK_INFO)
- Sn_MR_MULTI : Support UDP Multicasting
- Sn_MR_MF : Enable MAC Filter (0 : Disable, 1 - Enable), When enabled, W5300 can receive only both own and broadcast packet.
- Sn_MR_ND : No Delayed Ack(TCP) flag
- Sn_MR_IGMPv : IGMP version used in UDP mulitcasting. (0 : Version 2, 1 : Version 2)
- PROTOCOL[3:0]
Protocol[3] Protocol[2] Protocol[1] Protocol[0] Meaning 0 0 0 0 Closed 0 0 0 1 TCP 0 0 1 0 UDP 0 0 1 1 IPCRAW 0 1 0 0 MACRAW 0 1 0 1 PPPoE - Sn_MR_PPPoE : PPPoE
- Sn_MR_MACRAW : MAC LAYER RAW SOCK
- Sn_MR_IPRAW : IP LAYER RAW SOCK
- Sn_MR_UDP : UDP
- Sn_MR_TCP : TCP
- Sn_MR_CLOSE : Unused socket
- Note
- MACRAW mode should be only used in Socket 0.
- Sn_MR_PPPoE : PPPoE
| #define Sn_CR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x02) |
Socket command register(R/W)
This is used to set the command for Socket n such as OPEN, CLOSE, CONNECT, LISTEN, SEND, and RECEIVE.
After W5500 accepts the command, the Sn_CR register is automatically cleared to 0x00. Even though Sn_CR is cleared to 0x00, the command is still being processed.
To check whether the command is completed or not, please check the Sn_IR or Sn_SR.
- Sn_CR_OPEN : Initialize or open socket.
- Sn_CR_LISTEN : Wait connection request in TCP mode(Server mode)
- Sn_CR_CONNECT : Send connection request in TCP mode(Client mode)
- Sn_CR_DISCON : Send closing request in TCP mode.
- Sn_CR_CLOSE : Close socket.
- Sn_CR_SEND : Update TX buffer pointer and send data.
- Sn_CR_SEND_MAC : Send data with MAC address, so without ARP process.
- Sn_CR_SEND_KEEP : Send keep alive message.
- Sn_CR_RECV : Update RX buffer pointer and receive data.
- Sn_CR_PCON : PPPoE connection begins by transmitting PPPoE discovery packet.
- Sn_CR_PDISCON : Closes PPPoE connection.
- Sn_CR_PCR : In each phase, it transmits REQ message.
- Sn_CR_PCN : In each phase, it transmits NAK message.
- Sn_CR_PCJ : In each phase, it transmits REJECT message.
| #define Sn_IMR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x04) |
socket interrupt mask register(R)
Sn_IMR masks the interrupt of Socket n. Each bit corresponds to each bit of Sn_IR. When a Socket n Interrupt is occurred and the corresponding bit of Sn_IMR is the corresponding bit of Sn_IR becomes When both the corresponding bit of Sn_IMR and Sn_IR are and the n-th bit of IR is Host is interrupted by asserted INTn PIN to low.
| #define Sn_IR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x06) |
Socket interrupt register(R)
Sn_IR indicates the status of Socket Interrupt such as establishment, termination, receiving data, timeout).
When an interrupt occurs and the corresponding bit of Sn_IMR is the corresponding bit of Sn_IR becomes
In order to clear the Sn_IR bit, the host should write the bit to
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| Reserved. Read as 0 | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PRECV | PFAIL | PNEXT | SENDOK | TIMEOUT | RECV | DISCON | CON |
- Sn_IR_PRECV : PPP receive
- Sn_IR_PFAIL : PPP fail
- Sn_IR_PNEXT : PPP next phase
- Sn_IR_SENDOK : SENDOK
- Sn_IR_TIMEOUT : TIMEOUT
- Sn_IR_RECV : RECV
- Sn_IR_DISCON : DISCON
- Sn_IR_CON : CON
| #define Sn_SSR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x08) |
Socket status register(R)
Sn_SSR indicates the status of Socket n.
The status of Socket n is changed by Sn_CR or some special control packet as SYN, FIN packet in TCP.
- Normal status
- SOCK_CLOSED : Closed
- SOCK_INIT : Initiate state
- SOCK_LISTEN : Listen state
- SOCK_ESTABLISHED : Success to connect
- SOCK_CLOSE_WAIT : Closing state
- SOCK_UDP : UDP socket
- SOCK_IPRAW : IPRAW socket
- SOCK_MACRAW : MAC raw mode socket
- SOCK_PPPoE : PPPoE mode Socket
- Temporary status during changing the status of Socket n.
- SOCK_SYNSENT : This indicates Socket n sent the connect-request packet (SYN packet) to a peer.
- SOCK_SYNRECV : It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.
- SOCK_FIN_WAIT : Connection state
- SOCK_CLOSING : Closing state
- SOCK_TIME_WAIT : Closing state
- SOCK_LAST_ACK : Closing state
- SOCK_ARP : ARP request state
| #define Sn_PORTR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x0A) |
| #define Sn_DHAR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x0C) |
| #define Sn_DPORTR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x12) |
Peer port register address(R/W)
Sn_DPORTR configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode. In TCP clientmode, it configures the listen port number of TCP serverbefore CONNECT command. In TCP Servermode, it indicates the port number of TCP client after successfully establishing connection. In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command.
| #define Sn_DIPR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x14) |
Peer IP register address(R/W)
Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode. In TCP client mode, it configures an IP address of TCP serverbefore CONNECT command. In TCP server mode, it indicates an IP address of TCP clientafter successfully establishing connection. In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command.
| #define Sn_MSSR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x18) |
| #define Sn_KPALVTR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x1A) |
Keep Alive Timer register(R/W)
Sn_KPALVTR configures the transmitting timer of KEEP ALIVE(KA)packet of SOCKETn. It is valid only in TCP mode, and ignored in other modes. The time unit is 5s. KA packet is transmittable after Sn_SR is changed to SOCK_ESTABLISHED and after the data is transmitted or received to/from a peer at least once. In case of 'Sn_KPALVTR > 0', W5500 automatically transmits KA packet after time-period for checking the TCP connection (Auto-keepalive-process). In case of 'Sn_KPALVTR = 0', Auto-keep-alive-process will not operate, and KA packet can be transmitted by SEND_KEEP command by the host (Manual-keep-alive-process). Manual-keep-alive-process is ignored in case of 'Sn_KPALVTR > 0'.
| #define Sn_PROTOR | ( | n | ) | Sn_KPALVTR(n) |
| #define Sn_TOSR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x1C) |
| #define Sn_TTLR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x1E) |
| #define Sn_TX_WRSR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x20) |
SOCKETn TX write size register(R/W)
It sets the byte size of the data written in internal TX memory through Sn_TX_FIFOR. It is set before SEND or SEND_MAC command, and can't be bigger than internal TX memory size set by TMSR such as TMS01R, TMS23R and etc.
| #define Sn_TX_FSR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x0024) |
Transmit free memory size register(R)
Sn_TX_FSR indicates the free size of Socket n TX Buffer Block. It is initialized to the configured size by TMSR such as TMS01SR. Data bigger than Sn_TX_FSR should not be saved in the Socket n TX Buffer because the bigger data overwrites the previous saved data not yet sent. Therefore, check before saving the data to the Socket n TX Buffer, and if data is equal or smaller than its checked size, transmit the data with SEND/SEND_MAC command after saving the data in Socket n TX buffer. But, if data is bigger than its checked size, transmit the data after dividing into the checked size and saving in the Socket n TX buffer.
| #define Sn_FRAGR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x002C) |
| #define Sn_TX_FIFOR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x2E) |
SOCKET n TX FIFO regsiter.
It indirectly accesses internal TX memory of SOCKETn. The internal TX memory can't be accessed directly by the host, but can be accessed through Sn_TX_FIFOR. If MR(MT) = '0', only the Host-Write of internal TX memory is allowed through Sn_TX_FIFOR. But if MR(MT) is '1', both of Host-Read and Host-Write are allowed.
| #define Sn_RX_FIFOR | ( | n | ) | (_W5300_IO_BASE_ + WIZCHIP_SREG_BLOCK(n) + 0x30) |
SOCKET n RX FIFO register.
It indirectly accesses to internal RX memory of SOCKETn. The internal RX memory can't be directly accessed by the host, but can be accessed through Sn_RX_FIFOR. If MR(MT) = '0', only the Host-Read of internal RX memory is allowed through Sn_RX_FIFOR. But if MR(MT) is '1', both of Host-Read and Host-Write are allowed.
Generated on Wed May 4 2016 16:44:00 for Socket APIs by
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