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STM8S/A Standard Peripherals Firmware Library
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stm8s_itc.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8s_itc.h 00004 * @author MCD Application Team 00005 * @version V2.2.0 00006 * @date 30-September-2014 00007 * @brief This file contains all functions prototype and macros for the ITC peripheral. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Define to prevent recursive inclusion -------------------------------------*/ 00029 #ifndef __STM8S_ITC_H__ 00030 #define __STM8S_ITC_H__ 00031 00032 /* Includes ------------------------------------------------------------------*/ 00033 #include "stm8s.h" 00034 00035 /* Exported types ------------------------------------------------------------*/ 00036 00037 /** @addtogroup ITC_Exported_Types 00038 * @{ 00039 */ 00040 00041 /** 00042 * @brief ITC Interrupt Lines selection 00043 */ 00044 typedef enum { 00045 ITC_IRQ_TLI = (uint8_t)0, /*!< Software interrupt */ 00046 ITC_IRQ_AWU = (uint8_t)1, /*!< Auto wake up from halt interrupt */ 00047 ITC_IRQ_CLK = (uint8_t)2, /*!< Clock controller interrupt */ 00048 ITC_IRQ_PORTA = (uint8_t)3, /*!< Port A external interrupts */ 00049 ITC_IRQ_PORTB = (uint8_t)4, /*!< Port B external interrupts */ 00050 ITC_IRQ_PORTC = (uint8_t)5, /*!< Port C external interrupts */ 00051 ITC_IRQ_PORTD = (uint8_t)6, /*!< Port D external interrupts */ 00052 ITC_IRQ_PORTE = (uint8_t)7, /*!< Port E external interrupts */ 00053 00054 #if defined(STM8S208) || defined(STM8AF52Ax) 00055 ITC_IRQ_CAN_RX = (uint8_t)8, /*!< beCAN RX interrupt */ 00056 ITC_IRQ_CAN_TX = (uint8_t)9, /*!< beCAN TX/ER/SC interrupt */ 00057 #endif /*STM8S208 or STM8AF52Ax */ 00058 00059 #if defined(STM8S903) || defined(STM8AF622x) 00060 ITC_IRQ_PORTF = (uint8_t)8, /*!< Port F external interrupts */ 00061 #endif /*STM8S903 or STM8AF622x */ 00062 00063 ITC_IRQ_SPI = (uint8_t)10, /*!< SPI interrupt */ 00064 ITC_IRQ_TIM1_OVF = (uint8_t)11, /*!< TIM1 update/overflow/underflow/trigger/ 00065 break interrupt*/ 00066 ITC_IRQ_TIM1_CAPCOM = (uint8_t)12, /*!< TIM1 capture/compare interrupt */ 00067 00068 #if defined(STM8S903) || defined(STM8AF622x) 00069 ITC_IRQ_TIM5_OVFTRI = (uint8_t)13, /*!< TIM5 update/overflow/underflow/trigger/ 00070 interrupt */ 00071 ITC_IRQ_TIM5_CAPCOM = (uint8_t)14, /*!< TIM5 capture/compare interrupt */ 00072 #else 00073 ITC_IRQ_TIM2_OVF = (uint8_t)13, /*!< TIM2 update /overflow interrupt */ 00074 ITC_IRQ_TIM2_CAPCOM = (uint8_t)14, /*!< TIM2 capture/compare interrupt */ 00075 #endif /*STM8S903 or STM8AF622x */ 00076 00077 ITC_IRQ_TIM3_OVF = (uint8_t)15, /*!< TIM3 update /overflow interrupt*/ 00078 ITC_IRQ_TIM3_CAPCOM = (uint8_t)16, /*!< TIM3 update /overflow interrupt */ 00079 00080 #if defined(STM8S208) ||defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \ 00081 defined(STM8S003) ||defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax) 00082 ITC_IRQ_UART1_TX = (uint8_t)17, /*!< UART1 TX interrupt */ 00083 ITC_IRQ_UART1_RX = (uint8_t)18, /*!< UART1 RX interrupt */ 00084 #endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */ 00085 #if defined(STM8AF622x) 00086 ITC_IRQ_UART4_TX = (uint8_t)17, /*!< UART4 TX interrupt */ 00087 ITC_IRQ_UART4_RX = (uint8_t)18, /*!< UART4 RX interrupt */ 00088 #endif /*STM8AF622x */ 00089 00090 ITC_IRQ_I2C = (uint8_t)19, /*!< I2C interrupt */ 00091 00092 #if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x) 00093 ITC_IRQ_UART2_TX = (uint8_t)20, /*!< USART2 TX interrupt */ 00094 ITC_IRQ_UART2_RX = (uint8_t)21, /*!< USART2 RX interrupt */ 00095 #endif /*STM8S105 or STM8AF626x */ 00096 00097 #if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax) 00098 ITC_IRQ_UART3_TX = (uint8_t)20, /*!< USART3 TX interrupt */ 00099 ITC_IRQ_UART3_RX = (uint8_t)21, /*!< USART3 RX interrupt */ 00100 ITC_IRQ_ADC2 = (uint8_t)22, /*!< ADC2 interrupt */ 00101 #endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */ 00102 00103 #if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x) 00104 ITC_IRQ_ADC1 = (uint8_t)22, /*!< ADC2 interrupt */ 00105 #endif /*STM8S105 or STM8S005 or STM8S003 or STM8S103 or STM8S903 or STM8AF626x or STM8AF622x */ 00106 00107 #if defined(STM8S903) || defined(STM8AF622x) 00108 ITC_IRQ_TIM6_OVFTRI = (uint8_t)23, /*!< TIM6 update/overflow/underflow/trigger/ 00109 interrupt */ 00110 #else 00111 ITC_IRQ_TIM4_OVF = (uint8_t)23, /*!< TIM4 update /overflow interrupt */ 00112 #endif /*STM8S903 or STM8AF622x */ 00113 00114 ITC_IRQ_EEPROM_EEC = (uint8_t)24 /*!< Flash interrupt */ 00115 } ITC_Irq_TypeDef; 00116 00117 /** 00118 * @brief ITC Priority Levels selection 00119 */ 00120 typedef enum { 00121 ITC_PRIORITYLEVEL_0 = (uint8_t)0x02, /*!< Software priority level 0 (cannot be written) */ 00122 ITC_PRIORITYLEVEL_1 = (uint8_t)0x01, /*!< Software priority level 1 */ 00123 ITC_PRIORITYLEVEL_2 = (uint8_t)0x00, /*!< Software priority level 2 */ 00124 ITC_PRIORITYLEVEL_3 = (uint8_t)0x03 /*!< Software priority level 3 */ 00125 } ITC_PriorityLevel_TypeDef; 00126 00127 /** 00128 * @} 00129 */ 00130 00131 /* Exported constants --------------------------------------------------------*/ 00132 00133 /** @addtogroup ITC_Exported_Constants 00134 * @{ 00135 */ 00136 #define CPU_SOFT_INT_DISABLED ((uint8_t)0x28) /*!< Mask for I1 and I0 bits in CPU_CC register */ 00137 00138 /** 00139 * @} 00140 */ 00141 00142 /* Private macros ------------------------------------------------------------*/ 00143 00144 /** 00145 * @brief Macros used by the assert function in order to check the different functions parameters. 00146 * @addtogroup ITC_Private_Macros 00147 * @{ 00148 */ 00149 00150 /* Used by assert function */ 00151 #define IS_ITC_IRQ_OK(IRQ) ((IRQ) <= (uint8_t)24) 00152 00153 /* Used by assert function */ 00154 #define IS_ITC_PRIORITY_OK(PriorityValue) \ 00155 (((PriorityValue) == ITC_PRIORITYLEVEL_0) || \ 00156 ((PriorityValue) == ITC_PRIORITYLEVEL_1) || \ 00157 ((PriorityValue) == ITC_PRIORITYLEVEL_2) || \ 00158 ((PriorityValue) == ITC_PRIORITYLEVEL_3)) 00159 00160 /* Used by assert function */ 00161 #define IS_ITC_INTERRUPTS_DISABLED (ITC_GetSoftIntStatus() == CPU_SOFT_INT_DISABLED) 00162 00163 /** 00164 * @} 00165 */ 00166 00167 /* Exported functions ------------------------------------------------------- */ 00168 00169 /** @addtogroup ITC_Exported_Functions 00170 * @{ 00171 */ 00172 00173 uint8_t ITC_GetCPUCC(void); 00174 void ITC_DeInit(void); 00175 uint8_t ITC_GetSoftIntStatus(void); 00176 void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue); 00177 ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum); 00178 00179 /** 00180 * @} 00181 */ 00182 00183 #endif /* __STM8S_ITC_H__ */ 00184 00185 00186 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/