STM8S/A Standard Peripherals Firmware Library
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STM8S_StdPeriph_Examples/TIM2/TIM2_OC_InactiveMode/stm8s_it.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm8s_it.c 00004 * @author MCD Application Team 00005 * @version V2.2.0 00006 * @date 30-September-2014 00007 * @brief Main Interrupt Service Routines. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 00012 * 00013 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00014 * You may not use this file except in compliance with the License. 00015 * You may obtain a copy of the License at: 00016 * 00017 * http://www.st.com/software_license_agreement_liberty_v2 00018 * 00019 * Unless required by applicable law or agreed to in writing, software 00020 * distributed under the License is distributed on an "AS IS" BASIS, 00021 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00022 * See the License for the specific language governing permissions and 00023 * limitations under the License. 00024 * 00025 ****************************************************************************** 00026 */ 00027 00028 /* Includes ------------------------------------------------------------------*/ 00029 #include "stm8s_it.h" 00030 00031 /* Private typedef -----------------------------------------------------------*/ 00032 /* Private define ------------------------------------------------------------*/ 00033 /* Private macro -------------------------------------------------------------*/ 00034 /* Private variables ---------------------------------------------------------*/ 00035 /* Private function prototypes -----------------------------------------------*/ 00036 /* Private functions ---------------------------------------------------------*/ 00037 00038 /* Public functions ----------------------------------------------------------*/ 00039 00040 /** @addtogroup TIM2_OC_InactiveMode 00041 * @{ 00042 */ 00043 #ifdef _COSMIC_ 00044 /** 00045 * @brief Dummy interrupt routine 00046 * @param None 00047 * @retval None 00048 */ 00049 INTERRUPT_HANDLER(NonHandledInterrupt, 25) 00050 { 00051 /* In order to detect unexpected events during development, 00052 it is recommended to set a breakpoint on the following instruction. 00053 */ 00054 } 00055 #endif /*_COSMIC_*/ 00056 00057 /** 00058 * @brief TRAP interrupt routine 00059 * @param None 00060 * @retval None 00061 */ 00062 INTERRUPT_HANDLER_TRAP(TRAP_IRQHandler) 00063 { 00064 /* In order to detect unexpected events during development, 00065 it is recommended to set a breakpoint on the following instruction. 00066 */ 00067 } 00068 /** 00069 * @brief Top Level Interrupt routine 00070 * @param None 00071 * @retval None 00072 */ 00073 INTERRUPT_HANDLER(TLI_IRQHandler, 0) 00074 { 00075 /* In order to detect unexpected events during development, 00076 it is recommended to set a breakpoint on the following instruction. 00077 */ 00078 } 00079 00080 /** 00081 * @brief Auto Wake Up Interrupt routine 00082 * @param None 00083 * @retval None 00084 */ 00085 INTERRUPT_HANDLER(AWU_IRQHandler, 1) 00086 { 00087 /* In order to detect unexpected events during development, 00088 it is recommended to set a breakpoint on the following instruction. 00089 */ 00090 } 00091 00092 /** 00093 * @brief Clock Controller Interrupt routine 00094 * @param None 00095 * @retval None 00096 */ 00097 INTERRUPT_HANDLER(CLK_IRQHandler, 2) 00098 { 00099 /* In order to detect unexpected events during development, 00100 it is recommended to set a breakpoint on the following instruction. 00101 */ 00102 } 00103 00104 /** 00105 * @brief External Interrupt PORTA Interrupt routine 00106 * @param None 00107 * @retval None 00108 */ 00109 INTERRUPT_HANDLER(EXTI_PORTA_IRQHandler, 3) 00110 { 00111 /* In order to detect unexpected events during development, 00112 it is recommended to set a breakpoint on the following instruction. 00113 */ 00114 } 00115 00116 /** 00117 * @brief External Interrupt PORTB Interrupt routine 00118 * @param None 00119 * @retval None 00120 */ 00121 INTERRUPT_HANDLER(EXTI_PORTB_IRQHandler, 4) 00122 { 00123 /* In order to detect unexpected events during development, 00124 it is recommended to set a breakpoint on the following instruction. 00125 */ 00126 } 00127 00128 /** 00129 * @brief External Interrupt PORTC Interrupt routine 00130 * @param None 00131 * @retval None 00132 */ 00133 INTERRUPT_HANDLER(EXTI_PORTC_IRQHandler, 5) 00134 { 00135 /* In order to detect unexpected events during development, 00136 it is recommended to set a breakpoint on the following instruction. 00137 */ 00138 } 00139 00140 /** 00141 * @brief External Interrupt PORTD Interrupt routine 00142 * @param None 00143 * @retval None 00144 */ 00145 INTERRUPT_HANDLER(EXTI_PORTD_IRQHandler, 6) 00146 { 00147 /* In order to detect unexpected events during development, 00148 it is recommended to set a breakpoint on the following instruction. 00149 */ 00150 } 00151 00152 /** 00153 * @brief External Interrupt PORTE Interrupt routine 00154 * @param None 00155 * @retval None 00156 */ 00157 INTERRUPT_HANDLER(EXTI_PORTE_IRQHandler, 7) 00158 { 00159 /* In order to detect unexpected events during development, 00160 it is recommended to set a breakpoint on the following instruction. 00161 */ 00162 } 00163 #ifdef STM8S903 00164 /** 00165 * @brief External Interrupt PORTF Interrupt routine 00166 * @param None 00167 * @retval None 00168 */ 00169 INTERRUPT_HANDLER(EXTI_PORTF_IRQHandler, 8) 00170 { 00171 /* In order to detect unexpected events during development, 00172 it is recommended to set a breakpoint on the following instruction. 00173 */ 00174 } 00175 #endif /*STM8S903*/ 00176 00177 #if defined (STM8S208) || defined (STM8AF52Ax) 00178 /** 00179 * @brief CAN RX Interrupt routine. 00180 * @param None 00181 * @retval None 00182 */ 00183 INTERRUPT_HANDLER(CAN_RX_IRQHandler, 8) 00184 { 00185 /* In order to detect unexpected events during development, 00186 it is recommended to set a breakpoint on the following instruction. 00187 */ 00188 } 00189 00190 /** 00191 * @brief CAN TX Interrupt routine 00192 * @param None 00193 * @retval None 00194 */ 00195 INTERRUPT_HANDLER(CAN_TX_IRQHandler, 9) 00196 { 00197 /* In order to detect unexpected events during development, 00198 it is recommended to set a breakpoint on the following instruction. 00199 */ 00200 } 00201 #endif /*STM8S208 || STM8AF52Ax */ 00202 00203 /** 00204 * @brief SPI Interrupt routine 00205 * @param None 00206 * @retval None 00207 */ 00208 INTERRUPT_HANDLER(SPI_IRQHandler, 10) 00209 { 00210 /* In order to detect unexpected events during development, 00211 it is recommended to set a breakpoint on the following instruction. 00212 */ 00213 } 00214 00215 /** 00216 * @brief Timer1 Update/Overflow/Trigger/Break Interrupt routine 00217 * @param None 00218 * @retval None 00219 */ 00220 INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11) 00221 { 00222 /* In order to detect unexpected events during development, 00223 it is recommended to set a breakpoint on the following instruction. 00224 */ 00225 } 00226 00227 /** 00228 * @brief Timer1 Capture/Compare Interrupt routine 00229 * @param None 00230 * @retval None 00231 */ 00232 INTERRUPT_HANDLER(TIM1_CAP_COM_IRQHandler, 12) 00233 { 00234 /* In order to detect unexpected events during development, 00235 it is recommended to set a breakpoint on the following instruction. 00236 */ 00237 } 00238 00239 #ifdef STM8S903 00240 /** 00241 * @brief Timer5 Update/Overflow/Break/Trigger Interrupt routine 00242 * @param None 00243 * @retval None 00244 */ 00245 INTERRUPT_HANDLER(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13) 00246 { 00247 /* In order to detect unexpected events during development, 00248 it is recommended to set a breakpoint on the following instruction. 00249 */ 00250 } 00251 /** 00252 * @brief Timer5 Capture/Compare Interrupt routine 00253 * @param None 00254 * @retval None 00255 */ 00256 INTERRUPT_HANDLER(TIM5_CAP_COM_IRQHandler, 14) 00257 { 00258 /* In order to detect unexpected events during development, 00259 it is recommended to set a breakpoint on the following instruction. 00260 */ 00261 } 00262 00263 #else /*STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x */ 00264 /** 00265 * @brief Timer2 Update/Overflow/Break Interrupt routine 00266 * @param None 00267 * @retval None 00268 */ 00269 INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13) 00270 { 00271 /* In order to detect unexpected events during development, 00272 it is recommended to set a breakpoint on the following instruction. 00273 */ 00274 } 00275 00276 /** 00277 * @brief Timer2 Capture/Compare Interrupt routine 00278 * @param None 00279 * @retval None 00280 */ 00281 INTERRUPT_HANDLER(TIM2_CAP_COM_IRQHandler, 14) 00282 { 00283 if (TIM2_GetITStatus(TIM2_IT_CC1) != RESET) 00284 { 00285 /* Clear TIM2 Capture Compare1 interrupt pending bit*/ 00286 TIM2_ClearITPendingBit(TIM2_IT_CC1); 00287 00288 /* PG.5 toggles after 1000 ms */ 00289 GPIO_WriteLow(GPIOG, GPIO_PIN_5); 00290 00291 } 00292 00293 if (TIM2_GetITStatus(TIM2_IT_CC2) != RESET) 00294 { 00295 /* Clear TIM2 Capture Compare2 interrupt pending bit*/ 00296 TIM2_ClearITPendingBit(TIM2_IT_CC2); 00297 00298 /* PG.6 toggles after 500 ms */ 00299 GPIO_WriteLow(GPIOG, GPIO_PIN_6); 00300 } 00301 00302 if (TIM2_GetITStatus(TIM2_IT_CC3) != RESET) 00303 { 00304 /* Clear TIM2 Capture Compare3 interrupt pending bit*/ 00305 TIM2_ClearITPendingBit(TIM2_IT_CC3); 00306 00307 /* PG.7 toggles after 250 ms */ 00308 GPIO_WriteLow(GPIOG, GPIO_PIN_7); 00309 } 00310 } 00311 #endif /*STM8S903*/ 00312 00313 #if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ 00314 defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x) 00315 /** 00316 * @brief Timer3 Update/Overflow/Break Interrupt routine. 00317 * @param None 00318 * @retval None 00319 */ 00320 INTERRUPT_HANDLER(TIM3_UPD_OVF_BRK_IRQHandler, 15) 00321 { 00322 /* In order to detect unexpected events during development, 00323 it is recommended to set a breakpoint on the following instruction. 00324 */ 00325 } 00326 00327 /** 00328 * @brief Timer3 Capture/Compare Interrupt routine 00329 * @param None 00330 * @retval None 00331 */ 00332 INTERRUPT_HANDLER(TIM3_CAP_COM_IRQHandler, 16) 00333 { 00334 /* In order to detect unexpected events during development, 00335 it is recommended to set a breakpoint on the following instruction. 00336 */ 00337 } 00338 #endif /*STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x */ 00339 00340 #if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \ 00341 defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903) 00342 /** 00343 * @brief UART1 TX Interrupt routine 00344 * @param None 00345 * @retval None 00346 */ 00347 INTERRUPT_HANDLER(UART1_TX_IRQHandler, 17) 00348 { 00349 /* In order to detect unexpected events during development, 00350 it is recommended to set a breakpoint on the following instruction. 00351 */ 00352 } 00353 00354 /** 00355 * @brief UART1 RX Interrupt routine 00356 * @param None 00357 * @retval None 00358 */ 00359 INTERRUPT_HANDLER(UART1_RX_IRQHandler, 18) 00360 { 00361 /* In order to detect unexpected events during development, 00362 it is recommended to set a breakpoint on the following instruction. 00363 */ 00364 } 00365 #endif /*STM8S105*/ 00366 00367 /** 00368 * @brief I2C Interrupt routine 00369 * @param None 00370 * @retval None 00371 */ 00372 INTERRUPT_HANDLER(I2C_IRQHandler, 19) 00373 { 00374 /* In order to detect unexpected events during development, 00375 it is recommended to set a breakpoint on the following instruction. 00376 */ 00377 } 00378 00379 #if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x) 00380 /** 00381 * @brief UART2 TX interrupt routine. 00382 * @param None 00383 * @retval None 00384 */ 00385 INTERRUPT_HANDLER(UART2_TX_IRQHandler, 20) 00386 { 00387 /* In order to detect unexpected events during development, 00388 it is recommended to set a breakpoint on the following instruction. 00389 */ 00390 } 00391 00392 /** 00393 * @brief UART2 RX interrupt routine. 00394 * @param None 00395 * @retval None 00396 */ 00397 INTERRUPT_HANDLER(UART2_RX_IRQHandler, 21) 00398 { 00399 /* In order to detect unexpected events during development, 00400 it is recommended to set a breakpoint on the following instruction. 00401 */ 00402 } 00403 #endif /* STM8S105*/ 00404 00405 #if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax) 00406 /** 00407 * @brief UART3 TX interrupt routine. 00408 * @param None 00409 * @retval None 00410 */ 00411 INTERRUPT_HANDLER(UART3_TX_IRQHandler, 20) 00412 { 00413 /* In order to detect unexpected events during development, 00414 it is recommended to set a breakpoint on the following instruction. 00415 */ 00416 } 00417 00418 /** 00419 * @brief UART3 RX interrupt routine. 00420 * @param None 00421 * @retval None 00422 */ 00423 INTERRUPT_HANDLER(UART3_RX_IRQHandler, 21) 00424 { 00425 /* In order to detect unexpected events during development, 00426 it is recommended to set a breakpoint on the following instruction. 00427 */ 00428 } 00429 #endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */ 00430 00431 #if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax) 00432 /** 00433 * @brief ADC2 interrupt routine. 00434 * @param None 00435 * @retval None 00436 */ 00437 INTERRUPT_HANDLER(ADC2_IRQHandler, 22) 00438 { 00439 00440 /* In order to detect unexpected events during development, 00441 it is recommended to set a breakpoint on the following instruction. 00442 */ 00443 return; 00444 00445 } 00446 #else /*STM8S105, STM8S103 or STM8S903 or STM8AF626x */ 00447 /** 00448 * @brief ADC1 interrupt routine. 00449 * @param None 00450 * @retval None 00451 */ 00452 INTERRUPT_HANDLER(ADC1_IRQHandler, 22) 00453 { 00454 00455 /* In order to detect unexpected events during development, 00456 it is recommended to set a breakpoint on the following instruction. 00457 */ 00458 return; 00459 00460 } 00461 #endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */ 00462 00463 #ifdef STM8S903 00464 /** 00465 * @brief Timer6 Update/Overflow/Trigger Interrupt routine 00466 * @param None 00467 * @retval None 00468 */ 00469 INTERRUPT_HANDLER(TIM6_UPD_OVF_TRG_IRQHandler, 23) 00470 { 00471 /* In order to detect unexpected events during development, 00472 it is recommended to set a breakpoint on the following instruction. 00473 */ 00474 } 00475 #else /*STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x */ 00476 /** 00477 * @brief Timer4 Update/Overflow Interrupt routine 00478 * @param None 00479 * @retval None 00480 */ 00481 INTERRUPT_HANDLER(TIM4_UPD_OVF_IRQHandler, 23) 00482 { 00483 /* In order to detect unexpected events during development, 00484 it is recommended to set a breakpoint on the following instruction. 00485 */ 00486 } 00487 #endif /*STM8S903*/ 00488 00489 /** 00490 * @brief Eeprom EEC Interrupt routine 00491 * @param None 00492 * @retval None 00493 */ 00494 INTERRUPT_HANDLER(EEPROM_EEC_IRQHandler, 24) 00495 { 00496 /* In order to detect unexpected events during development, 00497 it is recommended to set a breakpoint on the following instruction. 00498 */ 00499 } 00500 00501 /** 00502 * @} 00503 */ 00504 00505 00506 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/