STM8S/A Standard Peripherals Drivers
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Define Documentation
#define TIM5_ARRH_ARR ((uint8_t)0xFF) |
#define TIM5_ARRL_ARR ((uint8_t)0xFF) |
#define TIM5_CCER1_CC1E ((uint8_t)0x01) |
Capture/Compare 1 output enable mask.
Definition at line 1228 of file stm8s.h.
Referenced by TI1_Config(), TIM5_CCxCmd(), TIM5_OC1Init(), and TIM5_SelectOCxM().
#define TIM5_CCER1_CC1P ((uint8_t)0x02) |
Capture/Compare 1 output Polarity mask.
Definition at line 1227 of file stm8s.h.
Referenced by TI1_Config(), TIM5_EncoderInterfaceConfig(), TIM5_OC1Init(), and TIM5_OC1PolarityConfig().
#define TIM5_CCER1_CC2E ((uint8_t)0x10) |
Capture/Compare 2 output enable mask.
Definition at line 1226 of file stm8s.h.
Referenced by TI2_Config(), TIM5_CCxCmd(), TIM5_OC2Init(), and TIM5_SelectOCxM().
#define TIM5_CCER1_CC2P ((uint8_t)0x20) |
Capture/Compare 2 output Polarity mask.
Definition at line 1225 of file stm8s.h.
Referenced by TI2_Config(), TIM5_EncoderInterfaceConfig(), TIM5_OC2Init(), and TIM5_OC2PolarityConfig().
#define TIM5_CCER2_CC3E ((uint8_t)0x01) |
Capture/Compare 3 output enable mask.
Definition at line 1231 of file stm8s.h.
Referenced by TI3_Config(), TIM5_CCxCmd(), TIM5_OC3Init(), and TIM5_SelectOCxM().
#define TIM5_CCER2_CC3P ((uint8_t)0x02) |
Capture/Compare 3 output Polarity mask.
Definition at line 1230 of file stm8s.h.
Referenced by TI3_Config(), TIM5_OC3Init(), and TIM5_OC3PolarityConfig().
#define TIM5_CCMR_CCxS ((uint8_t)0x03) |
Capture/Compare x Selection mask.
Definition at line 1223 of file stm8s.h.
Referenced by TI1_Config(), TI2_Config(), TI3_Config(), and TIM5_EncoderInterfaceConfig().
#define TIM5_CCMR_ICxF ((uint8_t)0xF0) |
Input Capture x Filter mask.
Definition at line 1220 of file stm8s.h.
Referenced by TI1_Config(), TI2_Config(), and TI3_Config().
#define TIM5_CCMR_ICxPSC ((uint8_t)0x0C) |
Input Capture x Prescaler mask.
Definition at line 1219 of file stm8s.h.
Referenced by TIM5_SetIC1Prescaler(), TIM5_SetIC2Prescaler(), and TIM5_SetIC3Prescaler().
#define TIM5_CCMR_OCM ((uint8_t)0x70) |
Output Compare x Mode mask.
Definition at line 1221 of file stm8s.h.
Referenced by TIM5_ForcedOC1Config(), TIM5_ForcedOC2Config(), TIM5_ForcedOC3Config(), TIM5_OC1Init(), TIM5_OC2Init(), TIM5_OC3Init(), and TIM5_SelectOCxM().
#define TIM5_CCMR_OCxPE ((uint8_t)0x08) |
Output Compare x Preload Enable mask.
Definition at line 1222 of file stm8s.h.
Referenced by TIM5_OC1PreloadConfig(), TIM5_OC2PreloadConfig(), and TIM5_OC3PreloadConfig().
#define TIM5_CCMR_TIxDirect_Set ((uint8_t)0x01) |
Definition at line 1250 of file stm8s.h.
Referenced by TIM5_EncoderInterfaceConfig().
#define TIM5_CCR1H_CCR1 ((uint8_t)0xFF) |
#define TIM5_CCR1L_CCR1 ((uint8_t)0xFF) |
#define TIM5_CCR2H_CCR2 ((uint8_t)0xFF) |
#define TIM5_CCR2L_CCR2 ((uint8_t)0xFF) |
#define TIM5_CCR3H_CCR3 ((uint8_t)0xFF) |
#define TIM5_CCR3L_CCR3 ((uint8_t)0xFF) |
#define TIM5_CNTRH_CNT ((uint8_t)0xFF) |
#define TIM5_CNTRL_CNT ((uint8_t)0xFF) |
#define TIM5_CR1_ARPE ((uint8_t)0x80) |
Auto-Reload Preload Enable mask.
Definition at line 1184 of file stm8s.h.
Referenced by TIM5_ARRPreloadConfig().
#define TIM5_CR1_CEN ((uint8_t)0x01) |
#define TIM5_CR1_OPM ((uint8_t)0x08) |
One Pulse Mode mask.
Definition at line 1185 of file stm8s.h.
Referenced by TIM5_SelectOnePulseMode().
#define TIM5_CR1_UDIS ((uint8_t)0x02) |
Update DIsable mask.
Definition at line 1187 of file stm8s.h.
Referenced by TIM5_UpdateDisableConfig().
#define TIM5_CR1_URS ((uint8_t)0x04) |
Update Request Source mask.
Definition at line 1186 of file stm8s.h.
Referenced by TIM5_UpdateRequestConfig().
#define TIM5_CR2_MMS ((uint8_t)0x70) |
MMS Selection Mask.
Definition at line 1191 of file stm8s.h.
Referenced by TIM5_SelectOutputTrigger().
#define TIM5_EGR_CC1G ((uint8_t)0x02) |
#define TIM5_EGR_CC2G ((uint8_t)0x04) |
#define TIM5_EGR_CC3G ((uint8_t)0x08) |
#define TIM5_EGR_TG ((uint8_t)0x40) |
#define TIM5_EGR_UG ((uint8_t)0x01) |
#define TIM5_IER_CC1IE ((uint8_t)0x02) |
#define TIM5_IER_CC2IE ((uint8_t)0x04) |
#define TIM5_IER_CC3IE ((uint8_t)0x08) |
#define TIM5_IER_TIE ((uint8_t)0x40) |
#define TIM5_IER_UIE ((uint8_t)0x01) |
#define TIM5_PSCR_PSC ((uint8_t)0xFF) |
#define TIM5_SMCR_MSM ((uint8_t)0x80) |
Master/Slave Mode Mask.
Definition at line 1193 of file stm8s.h.
Referenced by TIM5_EncoderInterfaceConfig().
#define TIM5_SMCR_SMS ((uint8_t)0x07) |
Slave Mode Selection Mask.
Definition at line 1195 of file stm8s.h.
Referenced by TIM5_InternalClockConfig(), and TIM5_SelectSlaveMode().
#define TIM5_SMCR_TS ((uint8_t)0x70) |
Trigger Selection Mask.
Definition at line 1194 of file stm8s.h.
Referenced by TIM5_EncoderInterfaceConfig(), and TIM5_SelectInputTrigger().
#define TIM5_SR1_CC1IF ((uint8_t)0x02) |
#define TIM5_SR1_CC2IF ((uint8_t)0x04) |
#define TIM5_SR1_CC3IF ((uint8_t)0x08) |
#define TIM5_SR1_TIF ((uint8_t)0x40) |
#define TIM5_SR1_UIF ((uint8_t)0x01) |
#define TIM5_SR2_CC1OF ((uint8_t)0x02) |
#define TIM5_SR2_CC2OF ((uint8_t)0x04) |