UART1_Exported_Types

Enumerations
enum	UART1_Flag_TypeDef {   UART1_FLAG_TXE = (uint16_t)0x0080, UART1_FLAG_TC = (uint16_t)0x0040, UART1_FLAG_RXNE = (uint16_t)0x0020, UART1_FLAG_IDLE = (uint16_t)0x0010,   UART1_FLAG_OR = (uint16_t)0x0008, UART1_FLAG_NF = (uint16_t)0x0004, UART1_FLAG_FE = (uint16_t)0x0002, UART1_FLAG_PE = (uint16_t)0x0001,   UART1_FLAG_LBDF = (uint16_t)0x0210, UART1_FLAG_SBK = (uint16_t)0x0101 }
	UART1 Flag possible values. More...
enum	UART1_IrDAMode_TypeDef { UART1_IRDAMODE_NORMAL = (uint8_t)0x00, UART1_IRDAMODE_LOWPOWER = (uint8_t)0x01 }
	UART1 Irda Modes. More...
enum	UART1_IT_TypeDef {   UART1_IT_TXE = (uint16_t)0x0277, UART1_IT_TC = (uint16_t)0x0266, UART1_IT_RXNE = (uint16_t)0x0255, UART1_IT_IDLE = (uint16_t)0x0244,   UART1_IT_OR = (uint16_t)0x0235, UART1_IT_PE = (uint16_t)0x0100, UART1_IT_LBDF = (uint16_t)0x0346, UART1_IT_RXNE_OR = (uint16_t)0x0205 }
	UART1 Interrupt definition UART1_IT possible values Elements values convention: 0xZYX X: Position of the corresponding Interrupt. More...
enum	UART1_LINBreakDetectionLength_TypeDef { UART1_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, UART1_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 }
	UART1 LIN Break detection length possible values. More...
enum	UART1_Mode_TypeDef {   UART1_MODE_RX_ENABLE = (uint8_t)0x08, UART1_MODE_TX_ENABLE = (uint8_t)0x04, UART1_MODE_TX_DISABLE = (uint8_t)0x80, UART1_MODE_RX_DISABLE = (uint8_t)0x40,   UART1_MODE_TXRX_ENABLE = (uint8_t)0x0C }
	UART1 Mode possible values. More...
enum	UART1_Parity_TypeDef { UART1_PARITY_NO = (uint8_t)0x00, UART1_PARITY_EVEN = (uint8_t)0x04, UART1_PARITY_ODD = (uint8_t)0x06 }
	UART1 parity possible values. More...
enum	UART1_StopBits_TypeDef { UART1_STOPBITS_1 = (uint8_t)0x00, UART1_STOPBITS_0_5 = (uint8_t)0x10, UART1_STOPBITS_2 = (uint8_t)0x20, UART1_STOPBITS_1_5 = (uint8_t)0x30 }
	UART1 stop bits possible values. More...
enum	UART1_SyncMode_TypeDef {   UART1_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, UART1_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, UART1_SYNCMODE_CPOL_LOW = (uint8_t)0x40, UART1_SYNCMODE_CPOL_HIGH = (uint8_t)0x04,   UART1_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, UART1_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, UART1_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, UART1_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 }
	UART1 Synchrone modes. More...
enum	UART1_WakeUp_TypeDef { UART1_WAKEUP_IDLELINE = (uint8_t)0x00, UART1_WAKEUP_ADDRESSMARK = (uint8_t)0x08 }
	UART1 WakeUP Modes. More...
enum	UART1_WordLength_TypeDef { UART1_WORDLENGTH_8D = (uint8_t)0x00, UART1_WORDLENGTH_9D = (uint8_t)0x10 }
	UART1 Word length possible values. More...

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Enumeration Type Documentation

enum UART1_Flag_TypeDef

UART1 Flag possible values.

Enumerator:

UART1_FLAG_TXE	Transmit Data Register Empty flag
UART1_FLAG_TC	Transmission Complete flag
UART1_FLAG_RXNE	Read Data Register Not Empty flag
UART1_FLAG_IDLE	Idle line detected flag
UART1_FLAG_OR	OverRun error flag
UART1_FLAG_NF	Noise error flag
UART1_FLAG_FE	Framing Error flag
UART1_FLAG_PE	Parity Error flag
UART1_FLAG_LBDF	Line Break Detection Flag
UART1_FLAG_SBK	Send Break characters Flag

Definition at line 119 of file stm8s_uart1.h.

enum UART1_IrDAMode_TypeDef

UART1 Irda Modes.

Enumerator:

UART1_IRDAMODE_NORMAL	0x00 Irda Normal Mode
UART1_IRDAMODE_LOWPOWER	0x01 Irda Low Power Mode

Definition at line 50 of file stm8s_uart1.h.

enum UART1_IT_TypeDef

UART1 Interrupt definition UART1_IT possible values Elements values convention: 0xZYX X: Position of the corresponding Interrupt.

• For the following values, X means the interrupt position in the CR2 register. UART1_IT_TXE UART1_IT_TC UART1_IT_RXNE UART1_IT_IDLE UART1_IT_OR
• For the UART1_IT_PE value, X means the flag position in the CR1 register.
• For the UART1_IT_LBDF value, X means the flag position in the CR4 register. Y: Flag position

For the following values, Y means the flag (pending bit) position in the SR register. UART1_IT_TXE UART1_IT_TC UART1_IT_RXNE UART1_IT_IDLE UART1_IT_OR UART1_IT_PE

• For the UART1_IT_LBDF value, Y means the flag position in the CR4 register. Z: Register index: indicate in which register the dedicated interrupt source is:
• 1==> CR1 register
• 2==> CR2 register
• 3==> CR4 register

Enumerator:

UART1_IT_TXE	Transmit interrupt
UART1_IT_TC	Transmission Complete interrupt
UART1_IT_RXNE	Receive interrupt
UART1_IT_IDLE	IDLE line interrupt
UART1_IT_OR	Overrun Error interrupt
UART1_IT_PE	Parity Error interrupt
UART1_IT_LBDF	LIN break detection interrupt.
UART1_IT_RXNE_OR	Receive/Overrun interrupt

Definition at line 158 of file stm8s_uart1.h.

enum UART1_LINBreakDetectionLength_TypeDef

UART1 LIN Break detection length possible values.

Enumerator:

UART1_LINBREAKDETECTIONLENGTH_10BITS	0x01 10 bits Lin Break detection
UART1_LINBREAKDETECTIONLENGTH_11BITS	0x02 11 bits Lin Break detection

Definition at line 64 of file stm8s_uart1.h.

enum UART1_Mode_TypeDef

UART1 Mode possible values.

Enumerator:

UART1_MODE_RX_ENABLE	0x08 Receive Enable
UART1_MODE_TX_ENABLE	0x04 Transmit Enable
UART1_MODE_TX_DISABLE	0x80 Transmit Disable
UART1_MODE_RX_DISABLE	0x40 Single-wire Half-duplex mode
UART1_MODE_TXRX_ENABLE	0x0C Transmit Enable and Receive Enable

Definition at line 109 of file stm8s_uart1.h.

enum UART1_Parity_TypeDef

UART1 parity possible values.

Enumerator:

UART1_PARITY_NO	No Parity.
UART1_PARITY_EVEN	Even Parity.
UART1_PARITY_ODD	Odd Parity.

Definition at line 81 of file stm8s_uart1.h.

enum UART1_StopBits_TypeDef

UART1 stop bits possible values.

Enumerator:

UART1_STOPBITS_1	One stop bit is transmitted at the end of frame.
UART1_STOPBITS_0_5	Half stop bits is transmitted at the end of frame.
UART1_STOPBITS_2	Two stop bits are transmitted at the end of frame.
UART1_STOPBITS_1_5	One and half stop bits.

Definition at line 72 of file stm8s_uart1.h.

enum UART1_SyncMode_TypeDef

UART1 Synchrone modes.

Enumerator:

UART1_SYNCMODE_CLOCK_DISABLE	0x80 Sync mode Disable, SLK pin Disable
UART1_SYNCMODE_CLOCK_ENABLE	0x08 Sync mode Enable, SLK pin Enable
UART1_SYNCMODE_CPOL_LOW	0x40 Steady low value on SCLK pin outside transmission window
UART1_SYNCMODE_CPOL_HIGH	0x04 Steady high value on SCLK pin outside transmission window
UART1_SYNCMODE_CPHA_MIDDLE	0x20 SCLK clock line activated in middle of data bit
UART1_SYNCMODE_CPHA_BEGINING	0x02 SCLK clock line activated at beginning of data bit
UART1_SYNCMODE_LASTBIT_DISABLE	0x10 The clock pulse of the last data bit is not output to the SCLK pin
UART1_SYNCMODE_LASTBIT_ENABLE	0x01 The clock pulse of the last data bit is output to the SCLK pin

Definition at line 89 of file stm8s_uart1.h.

enum UART1_WakeUp_TypeDef

UART1 WakeUP Modes.

Enumerator:

UART1_WAKEUP_IDLELINE	0x01 Idle Line wake up
UART1_WAKEUP_ADDRESSMARK	0x02 Address Mark wake up

Definition at line 57 of file stm8s_uart1.h.

enum UART1_WordLength_TypeDef

UART1 Word length possible values.

Enumerator:

UART1_WORDLENGTH_8D	0x00 8 bits Data
UART1_WORDLENGTH_9D	0x10 9 bits Data

Definition at line 102 of file stm8s_uart1.h.