STM8S/A Standard Peripherals Drivers: UART3_Exported_Types

STM8S/A

STM8S/A Standard Peripherals Drivers
UART3_Exported_Types

Enumerations

enum  UART3_Flag_TypeDef {
  UART3_FLAG_TXE = (uint16_t)0x0080, UART3_FLAG_TC = (uint16_t)0x0040, UART3_FLAG_RXNE = (uint16_t)0x0020, UART3_FLAG_IDLE = (uint16_t)0x0010,
  UART3_FLAG_OR_LHE = (uint16_t)0x0008, UART3_FLAG_NF = (uint16_t)0x0004, UART3_FLAG_FE = (uint16_t)0x0002, UART3_FLAG_PE = (uint16_t)0x0001,
  UART3_FLAG_SBK = (uint16_t)0x0101, UART3_FLAG_LBDF = (uint16_t)0x0210, UART3_FLAG_LHDF = (uint16_t)0x0302, UART3_FLAG_LSF = (uint16_t)0x0301
}
 UART3 Flag possible values. More...
enum  UART3_IT_TypeDef {
  UART3_IT_TXE = (uint16_t)0x0277, UART3_IT_TC = (uint16_t)0x0266, UART3_IT_RXNE = (uint16_t)0x0255, UART3_IT_IDLE = (uint16_t)0x0244,
  UART3_IT_OR = (uint16_t)0x0235, UART3_IT_PE = (uint16_t)0x0100, UART3_IT_LBDF = (uint16_t)0x0346, UART3_IT_LHDF = (uint16_t)0x0412,
  UART3_IT_RXNE_OR = (uint16_t)0x0205
}
 UART3 Interrupt definition UART3_IT possible values Elements values convention: 0xZYX X: Position of the corresponding Interrupt. More...
enum  UART3_LinAutosync_TypeDef { UART3_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, UART3_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 }
 UART3 automatic resynchronisation possible values. More...
enum  UART3_LINBreakDetectionLength_TypeDef { UART3_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, UART3_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 }
 UART3 LIN Break detection length possible values. More...
enum  UART3_LinDivUp_TypeDef { UART3_LIN_DIVUP_LBRR1 = (uint8_t)0x00, UART3_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 }
 UART3 Divider Update Method possible values. More...
enum  UART3_LinMode_TypeDef { UART3_LIN_MODE_MASTER = (uint8_t)0x00, UART3_LIN_MODE_SLAVE = (uint8_t)0x01 }
 UART3 Mode possible values. More...
enum  UART3_Mode_TypeDef {
  UART3_MODE_RX_ENABLE = (uint8_t)0x08, UART3_MODE_TX_ENABLE = (uint8_t)0x04, UART3_MODE_TX_DISABLE = (uint8_t)0x80, UART3_MODE_RX_DISABLE = (uint8_t)0x40,
  UART3_MODE_TXRX_ENABLE = (uint8_t)0x0C
}
 UART3 Mode Transmit/Receive possible values. More...
enum  UART3_Parity_TypeDef { UART3_PARITY_NO = (uint8_t)0x00, UART3_PARITY_EVEN = (uint8_t)0x04, UART3_PARITY_ODD = (uint8_t)0x06 }
 UART3 parity possible values. More...
enum  UART3_StopBits_TypeDef { UART3_STOPBITS_1 = (uint8_t)0x00, UART3_STOPBITS_2 = (uint8_t)0x20 }
 UART3 stop bits possible values. More...
enum  UART3_WakeUp_TypeDef { UART3_WAKEUP_IDLELINE = (uint8_t)0x00, UART3_WAKEUP_ADDRESSMARK = (uint8_t)0x08 }
 UART3 WakeUP Modes. More...
enum  UART3_WordLength_TypeDef { UART3_WORDLENGTH_8D = (uint8_t)0x00, UART3_WORDLENGTH_9D = (uint8_t)0x10 }
 UART3 Word length possible values. More...

Enumeration Type Documentation

UART3 Flag possible values.

Enumerator:
UART3_FLAG_TXE 

Transmit Data Register Empty flag

UART3_FLAG_TC 

Transmission Complete flag

UART3_FLAG_RXNE 

Read Data Register Not Empty flag

UART3_FLAG_IDLE 

Idle line detected flag

UART3_FLAG_OR_LHE 

OverRun error flag

UART3_FLAG_NF 

Noise error flag

UART3_FLAG_FE 

Framing Error flag

UART3_FLAG_PE 

Parity Error flag

UART3_FLAG_SBK 

Send Break Complete interrupt flag.

UART3_FLAG_LBDF 

LIN Break Detection Flag.

UART3_FLAG_LHDF 

LIN Header Detection Flag.

UART3_FLAG_LSF 

LIN Sync Field Flag.

Definition at line 115 of file stm8s_uart3.h.

UART3 Interrupt definition UART3_IT possible values Elements values convention: 0xZYX X: Position of the corresponding Interrupt.

  • For the following values, X means the interrupt position in the CR2 register. UART3_IT_TXE UART3_IT_TC UART3_IT_RXNE UART3_IT_IDLE UART3_IT_OR
  • For the UART3_IT_PE value, X means the flag position in the CR1 register.
  • For the UART3_IT_LBDF value, X means the flag position in the CR4 register.
  • For the UART3_IT_LHDF value, X means the flag position in the CR6 register. Y: Flag position

For the following values, Y means the flag (pending bit) position in the SR register. UART3_IT_TXE UART3_IT_TC UART3_IT_RXNE UART3_IT_IDLE UART3_IT_OR UART3_IT_PE

  • For the UART3_IT_LBDF value, Y means the flag position in the CR4 register.
  • For the UART3_IT_LHDF value, Y means the flag position in the CR6 register. Z: Register index: indicate in which register the dedicated interrupt source is:
  • 1==> CR1 register
  • 2==> CR2 register
  • 3==> CR4 register
  • 4==> CR6 register
Enumerator:
UART3_IT_TXE 

Transmit interrupt.

UART3_IT_TC 

Transmission Complete interrupt.

UART3_IT_RXNE 

Data Register Not Empty interrupt.

UART3_IT_IDLE 

Idle line detected interrupt.

UART3_IT_OR 

OverRun error interrupt.

UART3_IT_PE 

Parity Error interrupt.

UART3_IT_LBDF 

LIN Break Detection interrupt.

UART3_IT_LHDF 

LIN Header Detection interrupt.

UART3_IT_RXNE_OR 

Receive/Overrun interrupt

Definition at line 161 of file stm8s_uart3.h.

UART3 automatic resynchronisation possible values.

Enumerator:
UART3_LIN_AUTOSYNC_DISABLE 

LIN Autosynchronization Disable.

UART3_LIN_AUTOSYNC_ENABLE 

LIN Autosynchronization Enable.

Definition at line 101 of file stm8s_uart3.h.

UART3 LIN Break detection length possible values.

Enumerator:
UART3_LINBREAKDETECTIONLENGTH_10BITS 

10 bits Lin Break detection

UART3_LINBREAKDETECTIONLENGTH_11BITS 

11 bits Lin Break detection

Definition at line 55 of file stm8s_uart3.h.

UART3 Divider Update Method possible values.

Enumerator:
UART3_LIN_DIVUP_LBRR1 

LIN LDIV is updated as soon as LBRR1 is written.

UART3_LIN_DIVUP_NEXTRXNE 

LIN LDIV is updated at the next received character.

Definition at line 107 of file stm8s_uart3.h.

UART3 Mode possible values.

Enumerator:
UART3_LIN_MODE_MASTER 

LIN Master Mode.

UART3_LIN_MODE_SLAVE 

LIN Slave Mode.

Definition at line 95 of file stm8s_uart3.h.

UART3 Mode Transmit/Receive possible values.

Enumerator:
UART3_MODE_RX_ENABLE 

0x08 Receive Enable

UART3_MODE_TX_ENABLE 

0x04 Transmit Enable

UART3_MODE_TX_DISABLE 

0x80 Receive Enable

UART3_MODE_RX_DISABLE 

0x40 Single-wire Half-duplex mode

UART3_MODE_TXRX_ENABLE 

0x0C Receive Enable and Transmit enable

Definition at line 85 of file stm8s_uart3.h.

UART3 parity possible values.

Enumerator:
UART3_PARITY_NO 

No Parity.

UART3_PARITY_EVEN 

Even Parity.

UART3_PARITY_ODD 

Odd Parity.

Definition at line 70 of file stm8s_uart3.h.

UART3 stop bits possible values.

Enumerator:
UART3_STOPBITS_1 

One stop bit is transmitted at the end of frame.

UART3_STOPBITS_2 

Two stop bits are transmitted at the end of frame.

Definition at line 63 of file stm8s_uart3.h.

UART3 WakeUP Modes.

Enumerator:
UART3_WAKEUP_IDLELINE 

0x01 Idle Line wake up

UART3_WAKEUP_ADDRESSMARK 

0x02 Address Mark wake up

Definition at line 48 of file stm8s_uart3.h.

UART3 Word length possible values.

Enumerator:
UART3_WORDLENGTH_8D 

0x00 8 bits Data

UART3_WORDLENGTH_9D 

0x10 9 bits Data

Definition at line 78 of file stm8s_uart3.h.

STM8 Standard Peripherals Library: Footer

 

 

 

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